/linux-master/drivers/comedi/drivers/ |
H A D | multiq3.c | 77 dev->iobase + MULTIQ3_CTRL_REG); 87 status = inw(dev->iobase + MULTIQ3_STATUS_REG); 111 outw(0, dev->iobase + MULTIQ3_AI_CONV_REG); 119 val = inb(dev->iobase + MULTIQ3_AI_REG) << 8; 120 val |= inb(dev->iobase + MULTIQ3_AI_REG); 143 outw(val, dev->iobase + MULTIQ3_AO_REG); 155 data[1] = inw(dev->iobase + MULTIQ3_DI_REG); 166 outw(s->state, dev->iobase + MULTIQ3_DO_REG); 188 outb(MULTIQ3_BP_RESET, dev->iobase + MULTIQ3_ENC_CTRL_REG); 191 outb(MULTIQ3_TRSFRCNTR_OL, dev->iobase [all...] |
H A D | amplc_pci263.c | 39 outb(s->state & 0xff, dev->iobase + PCI263_DO_0_7_REG); 40 outb((s->state >> 8) & 0xff, dev->iobase + PCI263_DO_8_15_REG); 59 dev->iobase = pci_resource_start(pci_dev, 2); 74 s->state = inb(dev->iobase + PCI263_DO_0_7_REG) | 75 (inb(dev->iobase + PCI263_DO_8_15_REG) << 8);
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H A D | dt2814.c | 56 status = inb(dev->iobase + DT2814_CSR); 80 inb(dev->iobase + DT2814_DATA); 81 inb(dev->iobase + DT2814_DATA); 93 status = inb(dev->iobase + DT2814_CSR); 111 outb(chan, dev->iobase + DT2814_CSR); 117 hi = inb(dev->iobase + DT2814_DATA); 118 lo = inb(dev->iobase + DT2814_DATA); 213 outb(chan | DT2814_ENB | (trigvar << 5), dev->iobase + DT2814_CSR); 225 status = inb(dev->iobase + DT2814_CSR); 234 outb(status & DT2814_CHANMASK, dev->iobase [all...] |
H A D | ke_counter.c | 53 outb((val >> 24) & 0xff, dev->iobase + KE_SIGN_REG(chan)); 54 outb((val >> 16) & 0xff, dev->iobase + KE_MSB_REG(chan)); 55 outb((val >> 8) & 0xff, dev->iobase + KE_MID_REG(chan)); 56 outb((val >> 0) & 0xff, dev->iobase + KE_LSB_REG(chan)); 73 inb(dev->iobase + KE_LATCH_REG(chan)); 75 val = inb(dev->iobase + KE_LSB_REG(chan)); 76 val |= (inb(dev->iobase + KE_MID_REG(chan)) << 8); 77 val |= (inb(dev->iobase + KE_MSB_REG(chan)) << 16); 78 val |= (inb(dev->iobase + KE_SIGN_REG(chan)) << 24); 91 outb(0, dev->iobase [all...] |
H A D | adv_pci_dio.c | 246 unsigned short val = inw(dev->iobase + reg); 273 irqflags = inb(dev->iobase + PCI173X_INT_FLAG_REG); 280 outb(irqflags, dev->iobase + PCI173X_INT_CLR_REG); 356 outb(dev_private->int_rf, dev->iobase + PCI173X_INT_RF_REG); 358 outb(dev_private->int_ctrl, dev->iobase + PCI173X_INT_EN_REG); 385 outb(dev_private->int_ctrl, dev->iobase + PCI173X_INT_EN_REG); 399 unsigned long iobase = dev->iobase + reg; local 401 data[1] = inb(iobase); 412 unsigned long iobase local 431 unsigned long iobase = dev->iobase + reg; local 446 unsigned long iobase = dev->iobase + reg; local 469 unsigned long iobase = dev->iobase + reg; local [all...] |
H A D | quatech_daqp_cs.c | 169 status = inb(dev->iobase + DAQP_STATUS_REG); 189 outb(DAQP_CMD_STOP, dev->iobase + DAQP_CMD_REG); 190 outb(0, dev->iobase + DAQP_CTRL_REG); 191 inb(dev->iobase + DAQP_STATUS_REG); 205 val = inb(dev->iobase + DAQP_AI_FIFO_REG); 206 val |= inb(dev->iobase + DAQP_AI_FIFO_REG) << 8; 221 status = inb(dev->iobase + DAQP_STATUS_REG); 246 status = inb(dev->iobase + DAQP_STATUS_REG); 277 outb(val & 0xff, dev->iobase + DAQP_SCANLIST_REG); 278 outb((val >> 8) & 0xff, dev->iobase [all...] |
H A D | aio_iiro_16.c | 49 val = inb(dev->iobase + AIO_IIRO_16_INPUT_0_7); 50 val |= inb(dev->iobase + AIO_IIRO_16_INPUT_8_15) << 8; 62 status = inb(dev->iobase + AIO_IIRO_16_STATUS); 78 inb(dev->iobase + AIO_IIRO_16_IRQ); 80 outb(0, dev->iobase + AIO_IIRO_16_IRQ); 144 outb(s->state & 0xff, dev->iobase + AIO_IIRO_16_RELAY_0_7); 146 dev->iobase + AIO_IIRO_16_RELAY_8_15); 201 s->state = inb(dev->iobase + AIO_IIRO_16_RELAY_0_7) | 202 (inb(dev->iobase + AIO_IIRO_16_RELAY_8_15) << 8);
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H A D | mpc624.c | 121 outb(0, dev->iobase + MPC624_ADC); 126 outb(bit, dev->iobase + MPC624_ADC); 130 outb(MPC624_ADSCK | bit, dev->iobase + MPC624_ADC); 135 data_in |= (inb(dev->iobase + MPC624_ADC) & MPC624_ADSDO) >> 4; 194 status = inb(dev->iobase + MPC624_ADC); 212 outb(insn->chanspec, dev->iobase + MPC624_GNMUXCH); 216 outb(MPC624_ADSCK, dev->iobase + MPC624_ADC); 218 outb(MPC624_ADCS | MPC624_ADSCK, dev->iobase + MPC624_ADC); 220 outb(0, dev->iobase + MPC624_ADC);
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H A D | addi_apci_1032.c | 93 outl(0x0, dev->iobase + APCI1032_CTRL_REG); 95 inl(dev->iobase + APCI1032_STATUS_REG); 97 outl(0x0, dev->iobase + APCI1032_MODE1_REG); 98 outl(0x0, dev->iobase + APCI1032_MODE2_REG); 244 outl(devpriv->mode1, dev->iobase + APCI1032_MODE1_REG); 245 outl(devpriv->mode2, dev->iobase + APCI1032_MODE2_REG); 246 outl(devpriv->ctrl, dev->iobase + APCI1032_CTRL_REG); 271 ctrl = inl(dev->iobase + APCI1032_CTRL_REG); 276 outl(ctrl & ~APCI1032_CTRL_INT_ENA, dev->iobase + APCI1032_CTRL_REG); 278 s->state = inl(dev->iobase [all...] |
H A D | comedi_parport.c | 77 outb(s->state, dev->iobase + PARPORT_DATA_REG); 79 data[1] = inb(dev->iobase + PARPORT_DATA_REG); 96 ctrl = inb(dev->iobase + PARPORT_CTRL_REG); 101 outb(ctrl, dev->iobase + PARPORT_CTRL_REG); 111 data[1] = inb(dev->iobase + PARPORT_STATUS_REG) >> 3; 124 ctrl = inb(dev->iobase + PARPORT_CTRL_REG); 127 outb(ctrl, dev->iobase + PARPORT_CTRL_REG); 188 ctrl = inb(dev->iobase + PARPORT_CTRL_REG); 190 outb(ctrl, dev->iobase + PARPORT_CTRL_REG); 200 ctrl = inb(dev->iobase [all...] |
H A D | ii_pci20kc.c | 148 void __iomem *iobase = ii20k_module_iobase(dev, s); local 160 writeb(val & 0xff, iobase + II20K_AO_LSB_REG(chan)); 161 writeb((val >> 8) & 0xff, iobase + II20K_AO_MSB_REG(chan)); 162 writeb(0x00, iobase + II20K_AO_STRB_REG(chan)); 173 void __iomem *iobase = ii20k_module_iobase(dev, s); local 176 status = readb(iobase + II20K_AI_STATUS_REG); 186 void __iomem *iobase = ii20k_module_iobase(dev, s); local 192 writeb(II20K_AI_CONF_ENA, iobase + II20K_AI_CONF_REG); 195 writeb(0, iobase + II20K_AI_STATUS_CMD_REG); 199 writeb(val, iobase 227 void __iomem *iobase = ii20k_module_iobase(dev, s); local 378 void __iomem *iobase = ii20k_module_iobase(dev, s); local [all...] |
H A D | ni_at_ao.c | 121 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); 141 dev->iobase + ATAO_AO_REG(chan)); 157 outw(s->state, dev->iobase + ATAO_DIO_REG); 159 data[1] = inw(dev->iobase + ATAO_DIO_REG); 192 outw(devpriv->cfg3, dev->iobase + ATAO_CFG3_REG); 248 outw(bits, dev->iobase + ATAO_CFG2_REG); 250 dev->iobase + ATAO_CFG2_REG); 254 outw(ATAO_CFG2_CALLD(chan), dev->iobase + ATAO_CFG2_REG); 255 outw(ATAO_CFG2_CALLD_NOP, dev->iobase + ATAO_CFG2_REG); 270 outw(devpriv->cfg1, dev->iobase [all...] |
H A D | das08.c | 161 status = inb(dev->iobase + DAS08_STATUS_REG); 182 inb(dev->iobase + DAS08_AI_LSB_REG); 183 inb(dev->iobase + DAS08_AI_MSB_REG); 190 outb(devpriv->do_mux_bits, dev->iobase + DAS08_CONTROL_REG); 197 dev->iobase + DAS08_GAIN_REG); 203 if (inb(dev->iobase + DAS08_AI_MSB_REG) & 0x80) 207 outb_p(0, dev->iobase + DAS08_AI_TRIG_REG); 213 msb = inb(dev->iobase + DAS08_AI_MSB_REG); 214 lsb = inb(dev->iobase + DAS08_AI_LSB_REG); 254 data[1] = DAS08_STATUS_DI(inb(dev->iobase 341 das08_common_attach(struct comedi_device *dev, unsigned long iobase) argument [all...] |
H A D | das08.h | 44 int das08_common_attach(struct comedi_device *dev, unsigned long iobase);
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H A D | das6402.c | 138 outb(DAS6402_MODE_ENHANCED | mode, dev->iobase + DAS6402_MODE_REG); 144 outb(DAS6402_STATUS_W_EXTEND, dev->iobase + DAS6402_STATUS_REG); 145 outb(DAS6402_STATUS_W_EXTEND | val, dev->iobase + DAS6402_STATUS_REG); 146 outb(val, dev->iobase + DAS6402_STATUS_REG); 153 DAS6402_STATUS_W_CLRXIN, dev->iobase + DAS6402_STATUS_REG); 158 outb(DAS6402_STATUS_W_CLRINT, dev->iobase + DAS6402_STATUS_REG); 166 val = inw(dev->iobase + DAS6402_AI_DATA_REG); 180 status = inb(dev->iobase + DAS6402_STATUS_REG); 233 dev->iobase + DAS6402_AI_MUX_REG); 241 DAS6402_CTRL_PACER_TRIG, dev->iobase [all...] |
/linux-master/drivers/char/tpm/ |
H A D | tpm_atmel.c | 46 status = ioread8(priv->iobase + 1); 51 *buf++ = ioread8(priv->iobase); 62 status = ioread8(priv->iobase + 1); 73 status = ioread8(priv->iobase + 1); 78 *buf++ = ioread8(priv->iobase); 82 status = ioread8(priv->iobase + 1); 100 iowrite8(buf[i], priv->iobase); 110 iowrite8(ATML_STATUS_ABORT, priv->iobase + 1); 117 return ioread8(priv->iobase + 1); 145 atmel_put_base_addr(priv->iobase); 161 void __iomem *iobase = NULL; local [all...] |
H A D | tpm_tis.c | 43 void __iomem *iobase; member in struct:tpm_tis_tcg_phy 56 static inline void tpm_tis_flush(void __iomem *iobase) argument 58 ioread8(iobase + TPM_ACCESS(0)); 61 #define tpm_tis_flush(iobase) do { } while (0) 71 static inline void tpm_tis_iowrite8(u8 b, void __iomem *iobase, u32 addr) argument 73 iowrite8(b, iobase + addr); 74 tpm_tis_flush(iobase); 84 static inline void tpm_tis_iowrite32(u32 b, void __iomem *iobase, u32 addr) argument 86 iowrite32(b, iobase + addr); 87 tpm_tis_flush(iobase); [all...] |
H A D | tpm_atmel.h | 24 void __iomem *iobase; member in struct:tpm_atmel_priv 31 #define atmel_getb(priv, offset) readb(priv->iobase + offset) 32 #define atmel_putb(val, priv, offset) writeb(val, priv->iobase + offset) 36 static inline void atmel_put_base_addr(void __iomem *iobase) argument 38 iounmap(iobase); 120 static inline void atmel_put_base_addr(void __iomem *iobase) argument
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/linux-master/drivers/bluetooth/ |
H A D | dtl1_cs.c | 110 static int dtl1_write(unsigned int iobase, int fifo_size, __u8 *buf, int len) argument 115 if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) 121 outb(buf[actual], iobase + UART_TX); 147 unsigned int iobase = info->p_dev->resource[0]->start; local 161 len = dtl1_write(iobase, 32, skb->data, skb->len); 204 unsigned int iobase; local 213 iobase = info->p_dev->resource[0]->start; 229 skb_put_u8(info->rx_skb, inb(iobase + UART_RX)); 285 } while (inb(iobase + UART_LSR) & UART_LSR_DR); 292 unsigned int iobase; local 438 unsigned int iobase = info->p_dev->resource[0]->start; local 507 unsigned int iobase = info->p_dev->resource[0]->start; local [all...] |
/linux-master/include/linux/ |
H A D | cb710.h | 24 void __iomem *iobase; member in struct:cb710_slot 31 void __iomem *iobase; member in struct:cb710_chip 55 iowrite##t(value, slot->iobase + port); \ 61 return ioread##t(slot->iobase + port); \ 68 (ioread##t(slot->iobase + port) & ~clear)|set, \ 69 slot->iobase + port); \
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/linux-master/drivers/net/hamradio/ |
H A D | yam.c | 100 int iobase; member in struct:yam_port 149 #define RBR(iobase) (iobase+0) 150 #define THR(iobase) (iobase+0) 151 #define IER(iobase) (iobase+1) 152 #define IIR(iobase) (iobase+2) 153 #define FCR(iobase) (iobas 291 fpga_reset(int iobase) argument 313 fpga_write(int iobase, unsigned char wrd) argument 429 fpga_download(int iobase, int bitrate) argument 494 yam_check_uart(unsigned int iobase) argument [all...] |
/linux-master/drivers/ata/ |
H A D | pata_rb532_cf.c | 47 void __iomem *iobase; member in struct:rb532_cf_info 92 ap->ioaddr.cmd_addr = info->iobase + RB500_CF_REG_BASE; 93 ap->ioaddr.ctl_addr = info->iobase + RB500_CF_REG_CTRL; 94 ap->ioaddr.altstatus_addr = info->iobase + RB500_CF_REG_CTRL; 98 ap->ioaddr.data_addr = info->iobase + RB500_CF_REG_DBUF32; 99 ap->ioaddr.error_addr = info->iobase + RB500_CF_REG_ERR; 143 info->iobase = devm_ioremap(&pdev->dev, res->start, 145 if (!info->iobase)
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/linux-master/drivers/gpu/drm/i915/ |
H A D | i915_mm.h | 33 struct scatterlist *sgl, resource_size_t iobase);
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/linux-master/drivers/i2c/busses/ |
H A D | i2c-hisi.c | 92 void __iomem *iobase; member in struct:hisi_i2c_controller 116 writel_relaxed(mask, ctlr->iobase + HISI_I2C_INT_MASK); 121 writel_relaxed((~mask) & HISI_I2C_INT_ALL, ctlr->iobase + HISI_I2C_INT_MASK); 126 writel_relaxed(mask, ctlr->iobase + HISI_I2C_INT_CLR); 131 writel_relaxed(mask, ctlr->iobase + HISI_I2C_TX_INT_CLR); 139 reg = readl(ctlr->iobase + HISI_I2C_FIFO_STATE); 160 reg = readl(ctlr->iobase + HISI_I2C_FRAME_CTRL); 164 writel(reg, ctlr->iobase + HISI_I2C_FRAME_CTRL); 166 reg = readl(ctlr->iobase + HISI_I2C_SLV_ADDR); 169 writel(reg, ctlr->iobase [all...] |
/linux-master/drivers/staging/vt6655/ |
H A D | srom.h | 77 unsigned char SROMbyReadEmbedded(void __iomem *iobase, 80 void SROMvReadAllContents(void __iomem *iobase, unsigned char *pbyEepromRegs); 82 void SROMvReadEtherAddress(void __iomem *iobase,
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