/linux-master/drivers/comedi/drivers/ |
H A D | adv_pci1724.c | 44 * PCI bar 2 Register I/O map (dev->iobase) 79 status = inl(dev->iobase + PCI1724_SYNC_CTRL_REG); 99 outl(0, dev->iobase + PCI1724_SYNC_CTRL_REG); 109 dev->iobase + PCI1724_DAC_CTRL_REG); 129 dev->iobase = pci_resource_start(pcidev, 2); 130 board_id = inl(dev->iobase + PCI1724_BOARD_ID_REG);
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H A D | addi_apci_16xx.c | 69 outl(s->io_bits, dev->iobase + APCI16XX_DIR_REG(s->index)); 80 outl(s->state, dev->iobase + APCI16XX_OUT_REG(s->index)); 82 data[1] = inl(dev->iobase + APCI16XX_IN_REG(s->index)); 109 dev->iobase = pci_resource_start(pcidev, 0); 141 outl(s->io_bits, dev->iobase + APCI16XX_DIR_REG(i));
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H A D | pcmuio.c | 131 return dev->iobase + (asic * PCMUIO_ASIC_IOSIZE); 157 unsigned long iobase = pcmuio_asic_iobase(dev, asic); local 163 outb(val & 0xff, iobase + PCMUIO_PORT_REG(port + 0)); 164 outb((val >> 8) & 0xff, iobase + PCMUIO_PORT_REG(port + 1)); 165 outb((val >> 16) & 0xff, iobase + PCMUIO_PORT_REG(port + 2)); 167 outb(PCMUIO_PAGE(page), iobase + PCMUIO_PAGE_LOCK_REG); 168 outb(val & 0xff, iobase + PCMUIO_PAGE_REG(0)); 169 outb((val >> 8) & 0xff, iobase + PCMUIO_PAGE_REG(1)); 170 outb((val >> 16) & 0xff, iobase + PCMUIO_PAGE_REG(2)); 180 unsigned long iobase local 341 unsigned long iobase = pcmuio_asic_iobase(dev, asic); local [all...] |
H A D | adl_pci9118.c | 87 * PCI BAR2 Register map (dev->iobase) 283 outl(0, dev->iobase + PCI9118_FIFO_RESET_REG); 349 outl(devpriv->ai_ctrl, dev->iobase + PCI9118_AI_CTRL_REG); 352 outl(2, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG); 353 outl(0, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG); 354 outl(1, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG); 362 outl(val | ssh, dev->iobase + PCI9118_AI_CHANLIST_REG); 374 outl(val | ssh, dev->iobase + PCI9118_AI_CHANLIST_REG); 382 outl(val | ssh, dev->iobase + PCI9118_AI_CHANLIST_REG); 385 outl(0, dev->iobase [all...] |
H A D | aio_aio12_8.c | 105 status = inb(dev->iobase + AIO12_8_STATUS_REG); 131 inb(dev->iobase + AIO12_8_STATUS_REG); 135 outb(control, dev->iobase + AIO12_8_ADC_REG); 142 val = inw(dev->iobase + AIO12_8_ADC_REG) & s->maxdata; 164 outb(AIO12_8_DAC_ENABLE_REF_ENA, dev->iobase + AIO12_8_DAC_ENABLE_REG); 168 outw(val, dev->iobase + AIO12_8_DAC_REG(chan)); 209 dev->pacer = comedi_8254_io_alloc(dev->iobase + AIO12_8_8254_BASE_REG,
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H A D | cb_pcimdda.c | 88 unsigned long offset = dev->iobase + PCIMDDA_DA_CHAN(chan); 120 inw(dev->iobase + PCIMDDA_DA_CHAN(chan)); 135 dev->iobase = pci_resource_start(pcidev, 3);
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H A D | amplc_pc236.c | 52 return amplc_pc236_common_attach(dev, dev->iobase, it->options[1], 0);
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H A D | pcm3724.c | 111 port_8255_cfg = dev->iobase + I8255_CTRL_REG; 113 port_8255_cfg = dev->iobase + I8255_SIZE + I8255_CTRL_REG; 115 outb(buffer_config, dev->iobase + PCM3724_DIO_DIR_REG); 154 outb(gatecfg, dev->iobase + PCM3724_GATE_CTRL_REG);
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H A D | comedi_8254.c | 130 unsigned long iobase = i8254->context; local 134 outb(val, iobase + reg_offset); 137 return inb(iobase + reg_offset); 144 unsigned long iobase = i8254->context; local 148 outw(val, iobase + reg_offset); 151 return inw(iobase + reg_offset); 158 unsigned long iobase = i8254->context; local 162 outl(val, iobase + reg_offset); 165 return inl(iobase + reg_offset); 659 * @iobase 667 comedi_8254_io_alloc(unsigned long iobase, unsigned int osc_base, unsigned int iosize, unsigned int regshift) argument [all...] |
H A D | dac02.c | 94 outb((val << 4) & 0xf0, dev->iobase + DAC02_AO_LSB(chan)); 95 outb((val >> 4) & 0xff, dev->iobase + DAC02_AO_MSB(chan));
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H A D | pcl812.c | 576 outb(mux | PCL812_MUX_CHAN(chan), dev->iobase + PCL812_MUX_REG); 577 outb(range + devpriv->range_correction, dev->iobase + PCL812_RANGE_REG); 590 outb(0, dev->iobase + PCL812_STATUS_REG); 596 outb(255, dev->iobase + PCL812_SOFTTRIG_REG); 604 val = inb(dev->iobase + PCL812_AI_MSB_REG) << 8; 605 val |= inb(dev->iobase + PCL812_AI_LSB_REG); 618 status = inb(dev->iobase + PCL812_STATUS_REG); 622 status = inb(dev->iobase + PCL812_AI_MSB_REG); 752 outb(devpriv->mode_reg_int | ctrl, dev->iobase + PCL812_CTRL_REG); 901 dev->iobase [all...] |
H A D | das800.c | 213 * Select dev->iobase + 2 to be desired register 216 outb(reg, dev->iobase + DAS800_GAIN); 217 outb(val, dev->iobase + 2); 223 * Select dev->iobase + 7 to be desired register 226 outb(reg, dev->iobase + DAS800_GAIN); 227 return inb(dev->iobase + 7); 239 outb(CIO_ENHF, dev->iobase + DAS800_GAIN); 388 outb(gain, dev->iobase + DAS800_GAIN); 413 unsigned int lsb = inb(dev->iobase + DAS800_LSB); 414 unsigned int msb = inb(dev->iobase [all...] |
H A D | pcl726.c | 252 outb((val >> 8) & 0xff, dev->iobase + PCL726_AO_MSB_REG(chan)); 253 outb(val & 0xff, dev->iobase + PCL726_AO_LSB_REG(chan)); 268 val = inb(dev->iobase + PCL727_DI_LSB_REG); 269 val |= (inb(dev->iobase + PCL727_DI_MSB_REG) << 8); 271 val = inb(dev->iobase + PCL726_DI_LSB_REG); 272 val |= (inb(dev->iobase + PCL726_DI_MSB_REG) << 8); 286 unsigned long io = dev->iobase;
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/linux-master/drivers/mmc/host/ |
H A D | sdricoh_cs.c | 81 unsigned char __iomem *iobase; member in struct:sdricoh_host 91 unsigned int value = readl(host->iobase + reg); 99 writel(value, host->iobase + reg); 107 writew(value, host->iobase + reg); 114 unsigned int value = readb(host->iobase + reg); 382 void __iomem *iobase; local 392 iobase = 394 if (!iobase) { 395 dev_err(dev, "unable to map iobase\n"); 399 if (readl(iobase [all...] |
/linux-master/drivers/misc/cb710/ |
H A D | debug.c | 30 static void cb710_read_regs_##t(void __iomem *iobase, \ 42 reg[j] = ioread##t(iobase \ 87 cb710_read_regs_##t(chip->iobase, regs, select); \
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/linux-master/drivers/spi/ |
H A D | spi-cadence-quadspi.c | 78 void __iomem *iobase; member in struct:cqspi_st 327 u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG); 334 u32 reg = readl(cqspi->iobase + CQSPI_REG_SDRAMLEVEL); 344 dma_status = readl(cqspi->iobase + 346 writel(dma_status, cqspi->iobase + 359 irq_status = readl(cqspi->iobase + CQSPI_REG_IRQSTATUS); 362 writel(irq_status, cqspi->iobase + CQSPI_REG_IRQSTATUS); 442 void __iomem *reg_base = cqspi->iobase; 469 void __iomem *reg_base = cqspi->iobase; 491 void __iomem *reg_base = cqspi->iobase; 1179 void __iomem *iobase = cqspi->iobase; local [all...] |
H A D | spi-fsl-qspi.c | 265 void __iomem *iobase; member in struct:fsl_qspi 345 reg = qspi_readl(q, q->iobase + QUADSPI_FR); 346 qspi_writel(q, reg, q->iobase + QUADSPI_FR); 418 void __iomem *base = q->iobase; 459 qspi_writel(q, QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY); 460 qspi_writel(q, QUADSPI_LCKER_UNLOCK, q->iobase + QUADSPI_LCKCR); 467 qspi_writel(q, QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY); 468 qspi_writel(q, QUADSPI_LCKER_LOCK, q->iobase + QUADSPI_LCKCR); 511 reg = qspi_readl(q, q->iobase + QUADSPI_MCR); 513 qspi_writel(q, reg, q->iobase [all...] |
/linux-master/sound/pci/ |
H A D | rme96.c | 212 void __iomem *iobase; member in struct:rme96 296 return (readl(rme96->iobase + RME96_IO_GET_PLAY_POS) 303 return (readl(rme96->iobase + RME96_IO_GET_REC_POS) 313 memset_io(rme96->iobase + RME96_IO_PLAY_BUFFER + pos, 325 return copy_from_iter_toio(rme96->iobase + RME96_IO_PLAY_BUFFER + pos, 337 rme96->iobase + RME96_IO_REC_BUFFER + pos, 481 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); 484 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); 490 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); 493 writel(rme96->areg, rme96->iobase [all...] |
/linux-master/include/uapi/linux/ |
H A D | hdlcdrv.h | 17 int iobase; member in struct:hdlcdrv_params
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/linux-master/drivers/scsi/ |
H A D | qlogicfas.c | 142 static int iobase[MAX_QLOGICFAS]; variable 144 module_param_hw_array(iobase, int, ioport, NULL, 0); 146 MODULE_PARM_DESC(iobase, "I/O address"); 156 shost = __qlogicfas_detect(sht, iobase[num], irq[num]); 208 "I/O address and IRQ using iobase= and irq= "
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/linux-master/arch/mips/mti-malta/ |
H A D | malta-platform.c | 32 .iobase = base, \
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/linux-master/drivers/tty/serial/8250/ |
H A D | 8250_early.c | 50 return inb(port->iobase + offset); 74 outb(value, port->iobase + offset); 150 if (!(device->port.membase || device->port.iobase)) 181 if (!(device->port.membase || device->port.iobase))
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/linux-master/drivers/staging/vt6655/ |
H A D | card.c | 22 * 08-26-2003 Kyle Hsu: Modify the definition type of iobase. 58 static void vt6655_mac_set_bb_type(void __iomem *iobase, u32 mask) argument 62 reg_value = ioread32(iobase + MAC_REG_ENCFG); 65 iowrite32(reg_value, iobase + MAC_REG_ENCFG); 736 void __iomem *iobase = priv->port_offset; local 741 vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD); 743 data = ioread8(iobase + MAC_REG_TFTCTL); 749 low = ioread32(iobase + MAC_REG_TSFCNTR); 750 high = ioread32(iobase + MAC_REG_TSFCNTR + 4); 787 * iobase 797 void __iomem *iobase = priv->port_offset; local 827 void __iomem *iobase = priv->port_offset; local [all...] |
/linux-master/arch/nios2/kernel/ |
H A D | time.c | 245 void __iomem *iobase; local 249 ret = nios2_timer_get_base_and_freq(timer, &iobase, &freq); 259 nios2_ce.timer.base = iobase; 284 void __iomem *iobase; local 288 ret = nios2_timer_get_base_and_freq(timer, &iobase, &freq); 292 nios2_cs.timer.base = iobase;
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/linux-master/drivers/clk/microchip/ |
H A D | clk-pic32mzda.c | 142 if (readl(cd->core.iobase) & BIT(2)) 165 core->iobase = of_io_request_and_map(np, 0, of_node_full_name(np)); 166 if (IS_ERR(core->iobase)) { 168 return PTR_ERR(core->iobase); 194 core->iobase, 202 core->iobase + 0x020,
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