Searched refs:interrupt (Results 201 - 225 of 4555) sorted by relevance

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/linux-master/sound/pci/echoaudio/
H A Ddarla24.c33 #include <linux/interrupt.h>
H A Ddarla20.c29 #include <linux/interrupt.h>
H A Dgina20.c33 #include <linux/interrupt.h>
H A Dindigoio.c32 #include <linux/interrupt.h>
H A Dindigodj.c31 #include <linux/interrupt.h>
H A Dindigo.c31 #include <linux/interrupt.h>
H A Dindigoiox.c32 #include <linux/interrupt.h>
H A Dindigodjx.c31 #include <linux/interrupt.h>
H A Dmia.c39 #include <linux/interrupt.h>
H A Dlayla24.c40 #include <linux/interrupt.h>
H A Dlayla20.c38 #include <linux/interrupt.h>
/linux-master/include/sound/
H A Dinitval.h54 #include <linux/interrupt.h>
/linux-master/arch/mips/sgi-ip27/
H A Dip27-klconfig.c8 #include <linux/interrupt.h>
/linux-master/arch/mips/loongson2ef/common/
H A Dpm.c9 #include <linux/interrupt.h>
/linux-master/arch/sh/drivers/dma/
H A Ddma-pvr2.c12 #include <linux/interrupt.h>
30 pr_debug("Got a pvr2 dma interrupt for channel %d\n",
84 pr_err("Failed to register pvr2 DMA handler interrupt\n");
/linux-master/arch/arm/mach-tegra/
H A Dirq.c12 #include <linux/interrupt.h>
/linux-master/drivers/media/cec/platform/s5p/
H A Ds5p_cec.h13 #include <linux/interrupt.h>
/linux-master/arch/x86/kernel/
H A Dtime.c15 #include <linux/interrupt.h>
53 * Default timer interrupt handler for PIT/HPET
66 * Unconditionally register the legacy timer interrupt; even
71 pr_info("Failed to register legacy timer interrupt\n");
88 * Before PIT/HPET init, select the interrupt mode. This is required
97 * After PIT/HPET timers init, set up the final interrupt mode for
/linux-master/arch/sh/mm/
H A Dtlb-sh3.c20 #include <linux/interrupt.h>
/linux-master/arch/sh/drivers/pci/
H A Dfixups-dreamcast.c18 #include <linux/interrupt.h>
77 * The interrupt routing semantics here are quite trivial.
79 * We basically only support one interrupt, so we only bother
80 * updating a device's interrupt line with this single shared
81 * interrupt. Keeps routing quite simple, doesn't it?
/linux-master/drivers/media/pci/mantis/
H A Dhopper_vp3028.c11 #include <linux/interrupt.h>
/linux-master/arch/arm/mach-rpc/
H A Dtime.c15 #include <linux/interrupt.h>
51 * count2, check whether an interrupt was actually pending.
58 * count since the wrap. The interrupt would not have
89 * Set up timer interrupt.
/linux-master/sound/core/seq/
H A Dseq_queue.h13 #include <linux/interrupt.h>
/linux-master/arch/mips/loongson2ef/lemote-2f/
H A Dirq.c9 #include <linux/interrupt.h>
45 * This may be a spurious interrupt.
47 * Read the interrupt status register (ISR). If the most
49 * interrupt.
95 * 0-15 ------> i8259 interrupt
96 * 16-23 ------> mips cpu interrupt
104 /* Sets the first-level interrupt dispatcher. */
112 pr_err("Failed to register north bridge cascade interrupt\n");
116 pr_err("Failed to register south bridge cascade interrupt\n");
/linux-master/kernel/irq/
H A Dmigration.c4 #include <linux/interrupt.h>
27 * interrupt move. If that's the case clear the pending move bit.
84 * interrupt. Leave desc->pending_mask intact.
110 * threaded interrupt with ONESHOT set, we can end up with an
111 * interrupt storm.

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