Searched refs:hwirq (Results 251 - 275 of 384) sorted by relevance

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/linux-master/drivers/acpi/
H A Dirq.c151 * @hwirq: hardware IRQ number
152 * @triggering: triggering attributes of hwirq
153 * @polarity: polarity attributes of hwirq
154 * @polarity: polarity attributes of hwirq
155 * @shareable: shareable attributes of hwirq
156 * @wake_capable: wake capable attribute of hwirq
164 u32 hwirq, u8 triggering,
174 ctx->fwspec->param[0] = hwirq;
163 acpi_irq_parse_one_match(struct fwnode_handle *fwnode, u32 hwirq, u8 triggering, u8 polarity, u8 shareable, u8 wake_capable, struct acpi_irq_parse_one_ctx *ctx) argument
/linux-master/kernel/irq/
H A Dirqdesc.c268 ret = sprintf(buf, "%lu\n", desc->irq_data.hwirq);
273 IRQ_ATTR_RO(hwirq); variable
735 * @hwirq: The HW irq number to convert to a logical one
742 int generic_handle_domain_irq(struct irq_domain *domain, unsigned int hwirq) argument
744 return handle_irq_desc(irq_resolve_mapping(domain, hwirq));
752 * @hwirq: The HW irq number to convert to a logical one
760 int generic_handle_domain_irq_safe(struct irq_domain *domain, unsigned int hwirq) argument
766 ret = handle_irq_desc(irq_resolve_mapping(domain, hwirq));
776 * @hwirq: The HW irq number to convert to a logical one
783 int generic_handle_domain_nmi(struct irq_domain *domain, unsigned int hwirq) argument
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H A Dmsi.c689 irq_hw_number_t hwirq = ops->get_hwirq(info, arg); local
692 if (irq_find_mapping(domain, hwirq) > 0)
702 ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
730 irq_hw_number_t *hwirq, unsigned int *type)
740 return info->ops->msi_translate(domain, fwspec, hwirq, type);
754 return arg->hwirq;
772 unsigned int virq, irq_hw_number_t hwirq,
775 irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
1550 * @hwirq: The hardware interrupt number to allocate for
1555 * @hwirq i
729 msi_domain_translate(struct irq_domain *domain, struct irq_fwspec *fwspec, irq_hw_number_t *hwirq, unsigned int *type) argument
770 msi_domain_ops_init(struct irq_domain *domain, struct msi_domain_info *info, unsigned int virq, irq_hw_number_t hwirq, msi_alloc_info_t *arg) argument
1568 msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq, unsigned int type) argument
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/linux-master/drivers/irqchip/
H A Dirq-alpine-msi.c97 msg_addr |= (data->hwirq << 3);
181 alpine_msix_free_sgi(priv, d->hwirq, nr_irqs);
H A Dirq-gic-v3-its.c234 return d->hwirq - its_dev->event_map.lpi_base;
1424 irq_hw_number_t hwirq; local
1430 hwirq = map->vintid;
1437 hwirq = d->hwirq;
1440 cfg = va + hwirq - 8192;
1493 val = d->hwirq;
1948 its_send_mapti(its_dev, d->hwirq, event);
3496 static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) argument
3507 *hwirq
3575 its_irq_gic_domain_alloc(struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq) argument
3606 irq_hw_number_t hwirq; local
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/linux-master/arch/mips/sgi-ip27/
H A Dip27-irq.c57 set_bit(d->hwirq, mask);
67 clear_bit(d->hwirq, mask);
/linux-master/drivers/pinctrl/
H A Dpinctrl-aw9523.c430 irq_hw_number_t hwirq = irqd_to_hwirq(d); local
431 unsigned int n = hwirq % AW9523_PINS_PER_PORT;
433 regmap_update_bits(awi->regmap, AW9523_REG_INTR_DIS(hwirq),
435 gpiochip_disable_irq(&awi->gpio, hwirq);
448 irq_hw_number_t hwirq = irqd_to_hwirq(d); local
449 unsigned int n = hwirq % AW9523_PINS_PER_PORT;
451 gpiochip_enable_irq(&awi->gpio, hwirq);
452 regmap_update_bits(awi->regmap, AW9523_REG_INTR_DIS(hwirq),
/linux-master/drivers/pci/msi/
H A Dirqdomain.c71 arg->hwirq = pci_msi_domain_calc_hwirq(desc);
148 arg->hwirq = desc->msi_index;
/linux-master/arch/x86/kernel/apic/
H A Dmsi.c324 irq_hw_number_t hwirq, msi_alloc_info_t *arg)
375 info.hwirq = id;
322 dmar_msi_init(struct irq_domain *domain, struct msi_domain_info *info, unsigned int virq, irq_hw_number_t hwirq, msi_alloc_info_t *arg) argument
/linux-master/drivers/mfd/
H A Dqcom-pm8xxx.c367 irq_hw_number_t hwirq, unsigned int type)
369 irq_domain_set_info(domain, irq, hwirq, chip->pm_irq_data->irq_chip,
379 irq_hw_number_t hwirq; local
383 ret = irq_domain_translate_twocell(domain, fwspec, &hwirq, &type);
388 pm8xxx_irq_domain_map(chip, domain, virq + i, hwirq + i, type);
365 pm8xxx_irq_domain_map(struct pm_irq_chip *chip, struct irq_domain *domain, unsigned int irq, irq_hw_number_t hwirq, unsigned int type) argument
H A Dwm831x-irq.c373 data->hwirq);
382 data->hwirq);
392 irq = data->hwirq;
H A Dfsl-imx25-tsadc.c47 irq_hw_number_t hwirq)
46 mx25_tsadc_domain_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) argument
/linux-master/drivers/gpio/
H A Dgpio-tegra186.c499 base = tegra186_gpio_get_base(gpio, data->hwirq);
513 base = tegra186_gpio_get_base(gpio, data->hwirq);
521 gpiochip_disable_irq(&gpio->gpio, data->hwirq);
531 base = tegra186_gpio_get_base(gpio, data->hwirq);
535 gpiochip_enable_irq(&gpio->gpio, data->hwirq);
549 base = tegra186_gpio_get_base(gpio, data->hwirq);
657 WARN_RATELIMIT(ret, "hwirq = %d", offset + pin);
669 unsigned long *hwirq,
691 *hwirq = offset + pin;
714 unsigned int hwirq,
667 tegra186_gpio_irq_domain_translate(struct irq_domain *domain, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument
713 tegra186_gpio_child_to_parent_hwirq(struct gpio_chip *chip, unsigned int hwirq, unsigned int type, unsigned int *parent_hwirq, unsigned int *parent_type) argument
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H A Dgpiolib.c1383 chip_err(gc, "skip set-up on hwirq %d\n",
1389 /* This is the hwirq for the GPIO line side of things */
1398 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1412 unsigned long *hwirq,
1417 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1424 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1439 irq_hw_number_t hwirq; local
1454 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1458 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
1410 gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument
1525 unsigned int hwirq = irqd_to_hwirq(data); local
1543 unsigned int hwirq = irqd_to_hwirq(data); local
1665 gpiochip_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) argument
1770 unsigned int hwirq = irqd_to_hwirq(d); local
1779 unsigned int hwirq = irqd_to_hwirq(d); local
1788 unsigned int hwirq = irqd_to_hwirq(d); local
1798 unsigned int hwirq = irqd_to_hwirq(d); local
1808 unsigned int hwirq = irqd_to_hwirq(d); local
1817 unsigned int hwirq = irqd_to_hwirq(d); local
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H A Dgpio-tc3589x.c161 int offset = d->hwirq;
227 int offset = d->hwirq;
240 int offset = d->hwirq;
/linux-master/drivers/pinctrl/sunxi/
H A Dpinctrl-sunxi.c1022 pctl->irq_array[d->hwirq], "irq");
1027 pctl->irq_array[d->hwirq] - pctl->desc->pin_base);
1035 sunxi_pmx_set(pctl->pctl_dev, pctl->irq_array[d->hwirq], func->muxval);
1045 pctl->irq_array[d->hwirq] - pctl->desc->pin_base);
1051 u32 reg = sunxi_irq_cfg_reg(pctl->desc, d->hwirq);
1052 u8 index = sunxi_irq_cfg_offset(d->hwirq);
1098 u32 status_reg = sunxi_irq_status_reg(pctl->desc, d->hwirq);
1099 u8 status_idx = sunxi_irq_status_offset(d->hwirq);
1108 u32 reg = sunxi_irq_ctrl_reg(pctl->desc, d->hwirq);
1109 u8 idx = sunxi_irq_ctrl_offset(d->hwirq);
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/linux-master/drivers/pci/controller/
H A Dpcie-brcmstb.c484 msg->data = (0xffff & PCIE_MISC_MSI_DATA_CONFIG_VAL_32) | data->hwirq;
496 const int shift_amt = data->hwirq + msi->legacy_shift;
511 int hwirq; local
514 hwirq = bitmap_find_free_region(msi->used, msi->nr,
518 return hwirq;
521 static void brcm_msi_free(struct brcm_msi *msi, unsigned long hwirq, argument
525 bitmap_release_region(msi->used, hwirq, order_base_2(nr_irqs));
533 int hwirq, i; local
535 hwirq = brcm_msi_alloc(msi, nr_irqs);
537 if (hwirq <
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H A Dpcie-mediatek.c404 msg->data = data->hwirq;
407 (int)data->hwirq, msg->address_hi, msg->address_lo);
419 u32 hwirq = data->hwirq; local
421 writel(1 << hwirq, port->base + PCIE_IMSI_STATUS);
465 if (!test_bit(d->hwirq, port->msi_irq_in_use))
467 d->hwirq);
469 __clear_bit(d->hwirq, port->msi_irq_in_use);
554 irq_hw_number_t hwirq)
553 mtk_pcie_intx_map(struct irq_domain *domain, unsigned int irq, irq_hw_number_t hwirq) argument
/linux-master/drivers/pinctrl/renesas/
H A Dpinctrl-rzg2l.c312 unsigned int hwirq[RZG2L_TINT_MAX_INTERRUPT]; member in struct:rzg2l_pinctrl
1873 unsigned int hwirq, bool enable)
1875 const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[hwirq];
1878 u8 bit = RZG2L_PIN_ID_TO_PIN(hwirq);
1899 unsigned int hwirq = irqd_to_hwirq(d); local
1902 gpiochip_disable_irq(gc, hwirq);
1908 unsigned int hwirq = irqd_to_hwirq(d); local
1910 gpiochip_enable_irq(gc, hwirq);
2016 pctrl->hwirq[irq] = child;
2054 if (!pctrl->hwirq[
1872 rzg2l_gpio_irq_endisable(struct rzg2l_pinctrl *pctrl, unsigned int hwirq, bool enable) argument
2094 irq_hw_number_t hwirq = irqd_to_hwirq(d); local
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/linux-master/arch/powerpc/sysdev/xive/
H A Dcommon.c1112 irq_hw_number_t hwirq; member in struct:xive_ipi_alloc_info
1122 irq_domain_set_info(domain, virq + i, info->hwirq + i, &xive_ipi_chip,
1394 unsigned long *hwirq,
1399 hwirq, type);
1406 irq_hw_number_t hwirq; local
1410 rc = xive_irq_domain_translate(domain, fwspec, &hwirq, &type);
1414 pr_debug("%s %d/0x%lx #%d\n", __func__, virq, hwirq, nr_irqs);
1426 rc = xive_irq_alloc_data(virq + i, hwirq + i);
1430 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
1392 xive_irq_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument
/linux-master/drivers/clocksource/
H A Dtimer-tegra186.c64 unsigned int hwirq; member in struct:tegra186_tmr
121 tmr->hwirq = 0;
148 writel(value, tegra->regs + TKEIE(wdt->tmr->hwirq));
/linux-master/arch/mips/pci/
H A Dpci-ar2315.c353 ar2315_pci_reg_mask(apc, AR2315_PCI_IMR, BIT(d->hwirq), 0);
359 u32 m = BIT(d->hwirq);
369 ar2315_pci_reg_mask(apc, AR2315_PCI_IMR, 0, BIT(d->hwirq));
/linux-master/arch/powerpc/platforms/embedded6xx/
H A Dflipper-pic.c99 irq_hw_number_t hwirq)
98 flipper_pic_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hwirq) argument
/linux-master/drivers/bus/fsl-mc/
H A Dfsl-mc-msi.c27 * Make the base hwirq value for ICID*10000 so it is readable
37 arg->hwirq = fsl_mc_domain_calc_hwirq(to_fsl_mc_device(desc->dev),
/linux-master/drivers/misc/ocxl/
H A Dlink.c281 int hwirq; local
283 rc = pnv_ocxl_get_xsl_irq(dev, &hwirq);
302 spa->virq = irq_create_mapping(NULL, hwirq);
310 dev_dbg(&dev->dev, "hwirq %d mapped to virq %d\n", hwirq, spa->virq);

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