Searched refs:csr (Results 126 - 150 of 223) sorted by relevance

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/linux-master/drivers/tty/serial/
H A Dsb1250-duart.c118 void __iomem *csr = sport->port.membase + reg; local
120 return __raw_readq(csr);
125 void __iomem *csr = sport->memctrl + reg; local
127 return __raw_readq(csr);
132 void __iomem *csr = sport->port.membase + reg; local
134 __raw_writeq(value, csr);
139 void __iomem *csr = sport->memctrl + reg; local
141 __raw_writeq(value, csr);
H A Dsccnxp.c267 u8 csr; member in struct:__anon267
308 u8 i, acr = 0, csr = 0, mr0 = 0; local
315 csr = CSR_TIMER_MODE;
330 csr = baud_std[i].csr;
345 sccnxp_port_write(port, SCCNXP_CSR_REG, (csr << 4) | csr);
H A Ddz.c810 unsigned short csr, tcr, trdy, mask; local
814 csr = dz_in(dport, DZ_CSR);
815 dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
840 dz_out(dport, DZ_CSR, csr);
/linux-master/drivers/net/ethernet/agere/
H A Det131x.c739 u32 csr = ET_RXDMA_CSR_FBR1_ENABLE; local
743 csr |= ET_RXDMA_CSR_FBR1_SIZE_LO;
745 csr |= ET_RXDMA_CSR_FBR1_SIZE_HI;
747 csr |= ET_RXDMA_CSR_FBR1_SIZE_LO | ET_RXDMA_CSR_FBR1_SIZE_HI;
749 csr |= ET_RXDMA_CSR_FBR0_ENABLE;
751 csr |= ET_RXDMA_CSR_FBR0_SIZE_LO;
753 csr |= ET_RXDMA_CSR_FBR0_SIZE_HI;
755 csr |= ET_RXDMA_CSR_FBR0_SIZE_LO | ET_RXDMA_CSR_FBR0_SIZE_HI;
756 writel(csr, &adapter->regs->rxdma.csr);
772 u32 csr; local
[all...]
/linux-master/drivers/scsi/be2iscsi/
H A Dbe.h112 u8 __iomem *csr; member in struct:be_ctrl_info
/linux-master/drivers/clk/
H A Dclk-xgene.c31 static inline u32 xgene_clk_read(void __iomem *csr) argument
33 return readl_relaxed(csr);
36 static inline void xgene_clk_write(u32 data, void __iomem *csr) argument
38 writel_relaxed(data, csr);
471 pr_debug("%s csr offset 0x%08X mask 0x%08X value 0x%08X\n",
698 else /* if (strcmp(res->name, "csr-reg") == 0) */
701 if (of_property_read_u32(np, "csr-offset", &parameters.reg_csr_offset))
703 if (of_property_read_u32(np, "csr-mask", &parameters.reg_csr_mask))
/linux-master/drivers/usb/gadget/udc/
H A Damd5536udc_pci.c132 /* udc csr registers base */
133 dev->csr = dev->virt_addr + UDC_CSR_ADDR;
/linux-master/arch/riscv/include/asm/
H A Dkvm_aia.h15 #include <asm/csr.h>
/linux-master/drivers/ata/
H A Dahci_xgene.c771 void __iomem *csr = devm_ioremap_resource(dev, res); local
772 if (IS_ERR(csr))
773 return PTR_ERR(csr);
775 ctx->csr_mux = csr;
/linux-master/tools/testing/selftests/kvm/lib/riscv/
H A Dhandlers.S10 #include <asm/csr.h>
/linux-master/drivers/acpi/riscv/
H A Dcppc.c9 #include <asm/csr.h>
/linux-master/arch/riscv/kernel/
H A Dalternative.c19 #include <asm/csr.h>
/linux-master/arch/riscv/kvm/
H A Dvcpu_exit.c10 #include <asm/csr.h>
H A Daia_device.c528 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; local
534 memcpy(csr, reset_csr, sizeof(*csr));
/linux-master/tools/testing/selftests/kvm/include/riscv/
H A Dprocessor.h11 #include <asm/csr.h>
/linux-master/arch/loongarch/kernel/
H A Dsignal.c56 _save_fp_context(void __user *fpregs, void __user *fcc, void __user *csr);
58 _restore_fp_context(void __user *fpregs, void __user *fcc, void __user *csr);
373 unsigned int csr, enabled; local
375 err = __get_user(csr, fcsr);
376 enabled = ((csr & FPU_CSR_ALL_E) << 24);
381 if (csr & enabled) {
382 csr &= ~enabled;
383 err |= __put_user(csr, fcsr);
/linux-master/drivers/misc/eeprom/
H A Didt_89hpesx.c78 * @csr: CSR address to perform read operation
98 u16 csr; member in struct:idt_89hpesx_dev
740 dev_err(dev, "Failed to write 0x%04x: 0x%04x to csr",
750 dev_err(dev, "Failed to init csr address 0x%04x",
759 dev_err(dev, "Failed to read csr 0x%04x",
804 dev_err(dev, "Failed to init csr address 0x%04x",
813 dev_err(dev, "Failed to read csr 0x%04x",
955 pdev->csr = (csraddr >> 2);
963 ret = idt_csr_write(pdev, pdev->csr, csrval);
999 ret = idt_csr_read(pdev, pdev->csr,
[all...]
/linux-master/drivers/iio/adc/
H A Dstm32-adc-core.c47 * @csr: common status register offset
49 * @eoc_msk: array of eoc (end of conversion flag) masks in csr for adc1..n
50 * @ovr_msk: array of ovr (overrun flag) masks in csr for adc1..n
55 u32 csr; member in struct:stm32_adc_common_regs
311 .csr = STM32F4_ADC_CSR,
321 .csr = STM32H7_ADC_CSR,
331 .csr = STM32H7_ADC_CSR,
362 status = readl_relaxed(priv->common.base + priv->cfg->regs->csr);
/linux-master/drivers/net/wireless/ralink/rt2x00/
H A Drt2x00debug.c57 * - csr offset/value files
495 RT2X00DEBUGFS_OPS(csr, "0x%.8x\n", u32);
623 RT2X00DEBUGFS_SPRINTF_REGISTER(csr);
680 RT2X00DEBUGFS_CREATE_REGISTER_ENTRY(intf, csr);
/linux-master/drivers/video/fbdev/via/
H A Dvia-core.c168 int csr; local
172 csr = viafb_mmio_read(VDMA_CSR0);
173 if (csr & VDMA_C_DONE) {
/linux-master/drivers/pci/controller/
H A Dpci-xgene.c230 struct resource csr; local
237 ret = xgene_get_csr_resource(adev, &csr);
242 port->csr_base = devm_pci_remap_cfg_resource(dev, &csr);
350 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "csr");
/linux-master/drivers/video/fbdev/
H A Dleo.c107 u32 csr; member in struct:leo_lc_ss0_usr
128 u32 csr; member in struct:leo_ld_ss0
230 val = sbus_readl(&par->lc_ss0_usr->csr);
/linux-master/drivers/net/ethernet/qualcomm/emac/
H A Demac.c565 adpt->csr = devm_platform_ioremap_resource(pdev, 1);
566 if (IS_ERR(adpt->csr))
567 return PTR_ERR(adpt->csr);
/linux-master/drivers/hsi/controllers/
H A Domap_ssi_core.c176 u32 csr; local
195 csr = readw(omap_ssi->gdd + SSI_GDD_CSR_REG(lch));
200 if (csr & SSI_CSR_TOUR) { /* Timeout error */
/linux-master/drivers/tty/ipwireless/
H A Dhardware.c539 unsigned short csr = readw(&hw->memregs_CCR->reg_config_and_status); local
541 csr |= 1;
542 writew(csr, &hw->memregs_CCR->reg_config_and_status);
1096 unsigned short csr = readw(&hw->memregs_CCR->reg_config_and_status); local
1098 csr &= 0xfffd;
1099 writew(csr, &hw->memregs_CCR->reg_config_and_status);

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