| /linux-master/drivers/clk/samsung/ |
| H A D | clk.h | 209 * @bit_idx: bit index of the gate control bit-field in @reg
218 u8 bit_idx; member in struct:samsung_gate_clock
229 .bit_idx = b, \
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| H A D | clk-exynos-clkout.c | 167 clkout->gate.bit_idx = EXYNOS_CLKOUT_DISABLE_SHIFT;
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| H A D | clk.c | 241 list->bit_idx, list->gate_flags, &ctx->lock);
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| /linux-master/drivers/clk/ |
| H A D | clk-gemini.c | 54 * @bit_idx: the bit used to gate this clock in the clock register
60 u8 bit_idx; member in struct:gemini_gate_data
344 gd->bit_idx,
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| /linux-master/drivers/clk/rockchip/ |
| H A D | clk.c | 80 gate->bit_idx = gate_shift;
237 gate->bit_idx = gate_shift;
337 gate->bit_idx = gate_shift;
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| H A D | clk-half-divider.c | 197 gate->bit_idx = gate_shift;
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| /linux-master/drivers/clk/nxp/ |
| H A D | clk-lpc18xx-cgu.c | 183 .bit_idx = 0, \
214 .bit_idx = 0, \
279 .bit_idx = 0, \
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| H A D | clk-lpc18xx-ccu.c | 225 branch->gate.bit_idx = 0;
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| H A D | clk-lpc32xx.c | 362 u8 bit_idx; member in struct:lpc32xx_clk_gate
887 u32 mask = BIT(clk->bit_idx);
896 u32 mask = BIT(clk->bit_idx);
909 is_set = val & BIT(clk->bit_idx);
1158 .bit_idx = (_bit), \
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| /linux-master/drivers/clk/hisilicon/ |
| H A D | clk.c | 262 clks[i].bit_idx,
299 clks[i].bit_idx,
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| /linux-master/drivers/clk/sunxi/ |
| H A D | clk-sun4i-display.c | 143 gate->bit_idx = data->offset_en;
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| H A D | clk-factors.c | 224 gate->bit_idx = data->enable;
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| /linux-master/drivers/clk/mmp/ |
| H A D | clk.c | 82 clks[i].bit_idx,
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| H A D | clk.h | 171 u8 bit_idx; member in struct:mmp_param_general_gate_clk
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| /linux-master/drivers/clk/socfpga/ |
| H A D | clk-gate.c | 164 socfpga_clk->hw.bit_idx = clk_gate[1];
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| /linux-master/drivers/clk/imx/ |
| H A D | clk-composite-8m.c | 267 gate->bit_idx = PCG_CGC_SHIFT;
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| /linux-master/drivers/net/ethernet/qlogic/qed/ |
| H A D | qed_int.c | 1022 u8 i, j, k, bit_idx; local
1048 for (j = 0, bit_idx = 0; bit_idx < 32 && j < 32; j++) {
1052 !!(parities & BIT(bit_idx)))
1054 aeu_en, bit_idx);
1056 bit_idx += ATTENTION_LENGTH(p_bit->flags);
1086 for (j = 0, bit_idx = 0; bit_idx < 32 && j < 32; j++) {
1093 bit = bit_idx;
1138 bit_idx
[all...] |
| /linux-master/drivers/clk/stm32/ |
| H A D | clk-stm32mp1.c | 342 u8 bit_idx; member in struct:gate_cfg
404 gate_cfg->bit_idx,
473 writel_relaxed(BIT(gate->bit_idx), gate->reg + RCC_CLR);
559 mgate->gate.bit_idx = cfg->gate->bit_idx;
574 gate->bit_idx = cfg->gate->bit_idx;
1178 .bit_idx = _bit_idx,\
1290 .bit_idx = _gate_bit_idx,\
1518 .bit_idx
[all...] |
| H A D | clk-stm32mp13.c | 143 .bit_idx = (_bit_idx),\
410 u8 bit_idx; member in struct:clk_stm32_securiy
473 .bit_idx = _bit_idx,\
1471 return !!(readl(base + secf->offset) & BIT(secf->bit_idx));
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| /linux-master/drivers/infiniband/hw/irdma/ |
| H A D | utils.c | 2151 u64 bit_idx = PBLE_INVALID_IDX; local
2164 bit_idx = bitmap_find_next_zero_area(pchunk->bitmapbuf,
2167 if (bit_idx < pchunk->sizeofbitmap)
2174 if (!pchunk || bit_idx >= pchunk->sizeofbitmap) {
2179 bitmap_set(pchunk->bitmapbuf, bit_idx, bits_needed);
2180 offset = bit_idx << pprm->pble_shift;
2185 chunkinfo->bit_idx = bit_idx;
2206 bitmap_clear(chunkinfo->pchunk->bitmapbuf, chunkinfo->bit_idx,
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| /linux-master/drivers/clk/berlin/ |
| H A D | bg2q.c | 356 gd->bit_idx, 0, &lock);
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| /linux-master/drivers/clk/ti/ |
| H A D | adpll.c | 297 u8 bit_idx,
310 reg, bit_idx, clk_gate_flags,
616 co->gate.bit_idx = gate_bit;
292 ti_adpll_init_gate(struct ti_adpll_data *d, enum ti_adpll_clocks index, int output_index, char *name, struct clk *parent_clock, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags) argument
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| /linux-master/drivers/clk/davinci/ |
| H A D | pll.c | 252 gate->bit_idx = DIV_ENABLE_SHIFT;
598 gate->bit_idx = CKEN_OBSCLK_SHIFT;
699 gate->bit_idx = DIV_ENABLE_SHIFT;
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| /linux-master/drivers/clk/meson/ |
| H A D | axg-audio.c | 29 .bit_idx = (_bit), \
75 .bit_idx = (_bit), \
644 .bit_idx = 31,
676 .bit_idx = 8,
709 .bit_idx = 24,
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| /linux-master/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | dwmac-meson8b.c | 201 clk_configs->rgmii_tx_en.bit_idx = PRG_ETH0_RGMII_TX_CLK_EN;
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