Searched refs:REG (Results 101 - 125 of 296) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_vmid.c31 #define REG(reg)\ macro
H A Ddcn20_hubp.c37 #define REG(reg)\ macro
110 if (REG(NOM_PARAMETERS_0))
114 if (REG(NOM_PARAMETERS_1))
131 if (REG(NOM_PARAMETERS_2))
135 if (REG(NOM_PARAMETERS_3))
1152 if (REG(PREFETCH_SETTINS))
1175 if (REG(NOM_PARAMETERS_0))
1179 if (REG(NOM_PARAMETERS_1))
1197 if (REG(PREFETCH_SETTINS_C))
1210 if (REG(NOM_PARAMETERS_
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_vpg.c35 #define REG(reg)\ macro
H A Ddcn31_hubp.c32 #define REG(reg)\ macro
/linux-master/arch/powerpc/mm/ptdump/
H A Dptdump.c173 #define REG "0x%016lx" macro
175 #define REG "0x%08lx"
178 pt_dump_seq_printf(st->seq, REG "-" REG " ", st->start_address, addr - 1);
179 pt_dump_seq_printf(st->seq, " " REG " ", st->start_pa);
/linux-master/fs/proc/
H A Dbase.c144 #define REG(NAME, MODE, fops) \ macro
3257 REG("environ", S_IRUSR, proc_environ_operations),
3258 REG("auxv", S_IRUSR, proc_auxv_operations),
3263 REG("sched", S_IRUGO|S_IWUSR, proc_pid_sched_operations),
3266 REG("autogroup", S_IRUGO|S_IWUSR, proc_pid_sched_autogroup_operations),
3269 REG("timens_offsets", S_IRUGO|S_IWUSR, proc_timens_offsets_operations),
3271 REG("comm", S_IRUGO|S_IWUSR, proc_pid_set_comm_operations),
3275 REG("cmdline", S_IRUGO, proc_pid_cmdline_ops),
3278 REG("maps", S_IRUGO, proc_pid_maps_operations),
3280 REG("numa_map
[all...]
/linux-master/drivers/block/
H A Dswim3.c56 #define REG(x) unsigned char x; char x ## _pad[15]; macro
63 REG(data);
64 REG(timer); /* counts down at 1MHz */
65 REG(error);
66 REG(mode);
67 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
68 REG(setup);
69 REG(control); /* writing bits clears them */
70 REG(status); /* writing bits sets them in control */
71 REG(int
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_dmcu.c37 #define REG(reg) \ macro
250 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1),
262 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG2),
267 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3),
315 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), masterCmdData1.u32);
689 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1),
701 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG2),
706 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3),
741 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), masterCmdData1.u32);
963 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG
[all...]
H A Ddce_ipp.c30 #define REG(reg) \ macro
177 if (REG(DCFE_MEM_PWR_CTRL))
209 if (REG(DCFE_MEM_PWR_CTRL))
/linux-master/drivers/scsi/sym53c8xx_2/
H A Dsym_fw.h184 #define RADDR_1(label) (RELOC_REGISTER | REG(label))
185 #define RADDR_2(label,ofs) (RELOC_REGISTER | ((REG(label))+(ofs)))
H A Dsym_defs.h372 #define REG(r) REGJ (nc_, r) macro
572 (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
575 (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
578 (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
644 (0xe1000000 | how | (SCR_REG_OFS2(REG(reg))) | (n))
647 (0xe0000000 | how | (SCR_REG_OFS2(REG(reg))) | (n))
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/
H A Dhw_generic.c44 #define REG(reg)\ macro
H A Dhw_hpd.c42 #define REG(reg)\ macro
/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_dwb.c32 #define REG(reg)\ macro
/linux-master/drivers/accel/habanalabs/include/gaudi2/asic_reg/
H A Dgaudi2_regs.h284 #define MMU_OFFSET(REG) (REG - mmDCORE0_HMMU0_MMU_BASE)
300 #define STLB_OFFSET(REG) (REG - mmDCORE0_HMMU0_STLB_BASE)
/linux-master/drivers/scsi/
H A Dmac_esp.c49 #define esp_read8(REG) mac_esp_read8(esp, REG)
50 #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG)
/linux-master/drivers/net/ipa/reg/
H A Dipa_reg-v3.1.c97 REG(IPA_BCR, ipa_bcr, 0x000001d0);
361 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x00003008 + 0x1000 * GSI_EE_AP);
364 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000300c + 0x1000 * GSI_EE_AP);
367 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x00003010 + 0x1000 * GSI_EE_AP);
H A Dipa_reg-v4.2.c139 REG(IPA_BCR, ipa_bcr, 0x000001d0);
387 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x00003008 + 0x1000 * GSI_EE_AP);
390 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000300c + 0x1000 * GSI_EE_AP);
393 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x00003010 + 0x1000 * GSI_EE_AP);
H A Dipa_reg-v3.5.1.c102 REG(IPA_BCR, ipa_bcr, 0x000001d0);
372 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x00003008 + 0x1000 * GSI_EE_AP);
375 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000300c + 0x1000 * GSI_EE_AP);
378 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x00003010 + 0x1000 * GSI_EE_AP);
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr_vbios_smu.c64 #define REG(reg_name) \ macro
/linux-master/drivers/gpu/drm/amd/display/dc/dpp/dcn35/
H A Ddcn35_dpp.c31 #define REG(reg) dpp->tf_regs->reg macro
/linux-master/drivers/media/dvb-frontends/
H A Dstb0899_priv.h243 #define STB0899_READ_S2REG(DEVICE, REG) (_stb0899_read_s2reg(state, DEVICE, STB0899_BASE_##REG, STB0899_OFF0_##REG))
244 //#define STB0899_WRITE_S2REG(DEVICE, REG, DATA) (_stb0899_write_s2reg(state, DEVICE, STB0899_BASE_##REG, STB0899_OFF0_##REG, DATA))
/linux-master/include/linux/mfd/
H A DidtRC38xxx_reg.h195 #define IDTFC3_FW_REG(FW, VER, REG) (((FW) < (VER)) ? (REG) : (REG##_##VER))
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dce80/
H A Dhw_factory_dce80.c41 #define REG(reg_name)\ macro
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/
H A Ddce60_clk_mgr.c46 #define REG(reg) \ macro

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