/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_vmid.c | 31 #define REG(reg)\ macro
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H A D | dcn20_hubp.c | 37 #define REG(reg)\ macro 110 if (REG(NOM_PARAMETERS_0)) 114 if (REG(NOM_PARAMETERS_1)) 131 if (REG(NOM_PARAMETERS_2)) 135 if (REG(NOM_PARAMETERS_3)) 1152 if (REG(PREFETCH_SETTINS)) 1175 if (REG(NOM_PARAMETERS_0)) 1179 if (REG(NOM_PARAMETERS_1)) 1197 if (REG(PREFETCH_SETTINS_C)) 1210 if (REG(NOM_PARAMETERS_ [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dcn31/ |
H A D | dcn31_vpg.c | 35 #define REG(reg)\ macro
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H A D | dcn31_hubp.c | 32 #define REG(reg)\ macro
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/linux-master/arch/powerpc/mm/ptdump/ |
H A D | ptdump.c | 173 #define REG "0x%016lx" macro 175 #define REG "0x%08lx" 178 pt_dump_seq_printf(st->seq, REG "-" REG " ", st->start_address, addr - 1); 179 pt_dump_seq_printf(st->seq, " " REG " ", st->start_pa);
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/linux-master/fs/proc/ |
H A D | base.c | 144 #define REG(NAME, MODE, fops) \ macro 3257 REG("environ", S_IRUSR, proc_environ_operations), 3258 REG("auxv", S_IRUSR, proc_auxv_operations), 3263 REG("sched", S_IRUGO|S_IWUSR, proc_pid_sched_operations), 3266 REG("autogroup", S_IRUGO|S_IWUSR, proc_pid_sched_autogroup_operations), 3269 REG("timens_offsets", S_IRUGO|S_IWUSR, proc_timens_offsets_operations), 3271 REG("comm", S_IRUGO|S_IWUSR, proc_pid_set_comm_operations), 3275 REG("cmdline", S_IRUGO, proc_pid_cmdline_ops), 3278 REG("maps", S_IRUGO, proc_pid_maps_operations), 3280 REG("numa_map [all...] |
/linux-master/drivers/block/ |
H A D | swim3.c | 56 #define REG(x) unsigned char x; char x ## _pad[15]; macro 63 REG(data); 64 REG(timer); /* counts down at 1MHz */ 65 REG(error); 66 REG(mode); 67 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */ 68 REG(setup); 69 REG(control); /* writing bits clears them */ 70 REG(status); /* writing bits sets them in control */ 71 REG(int [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_dmcu.c | 37 #define REG(reg) \ macro 250 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), 262 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG2), 267 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3), 315 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), masterCmdData1.u32); 689 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), 701 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG2), 706 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3), 741 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), masterCmdData1.u32); 963 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG [all...] |
H A D | dce_ipp.c | 30 #define REG(reg) \ macro 177 if (REG(DCFE_MEM_PWR_CTRL)) 209 if (REG(DCFE_MEM_PWR_CTRL))
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/linux-master/drivers/scsi/sym53c8xx_2/ |
H A D | sym_fw.h | 184 #define RADDR_1(label) (RELOC_REGISTER | REG(label)) 185 #define RADDR_2(label,ofs) (RELOC_REGISTER | ((REG(label))+(ofs)))
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H A D | sym_defs.h | 372 #define REG(r) REGJ (nc_, r) macro 572 (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul)) 575 (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul)) 578 (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul)) 644 (0xe1000000 | how | (SCR_REG_OFS2(REG(reg))) | (n)) 647 (0xe0000000 | how | (SCR_REG_OFS2(REG(reg))) | (n))
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/linux-master/drivers/gpu/drm/amd/display/dc/gpio/ |
H A D | hw_generic.c | 44 #define REG(reg)\ macro
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H A D | hw_hpd.c | 42 #define REG(reg)\ macro
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_dwb.c | 32 #define REG(reg)\ macro
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/linux-master/drivers/accel/habanalabs/include/gaudi2/asic_reg/ |
H A D | gaudi2_regs.h | 284 #define MMU_OFFSET(REG) (REG - mmDCORE0_HMMU0_MMU_BASE) 300 #define STLB_OFFSET(REG) (REG - mmDCORE0_HMMU0_STLB_BASE)
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/linux-master/drivers/scsi/ |
H A D | mac_esp.c | 49 #define esp_read8(REG) mac_esp_read8(esp, REG) 50 #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG)
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/linux-master/drivers/net/ipa/reg/ |
H A D | ipa_reg-v3.1.c | 97 REG(IPA_BCR, ipa_bcr, 0x000001d0); 361 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x00003008 + 0x1000 * GSI_EE_AP); 364 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000300c + 0x1000 * GSI_EE_AP); 367 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x00003010 + 0x1000 * GSI_EE_AP);
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H A D | ipa_reg-v4.2.c | 139 REG(IPA_BCR, ipa_bcr, 0x000001d0); 387 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x00003008 + 0x1000 * GSI_EE_AP); 390 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000300c + 0x1000 * GSI_EE_AP); 393 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x00003010 + 0x1000 * GSI_EE_AP);
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H A D | ipa_reg-v3.5.1.c | 102 REG(IPA_BCR, ipa_bcr, 0x000001d0); 372 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x00003008 + 0x1000 * GSI_EE_AP); 375 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000300c + 0x1000 * GSI_EE_AP); 378 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x00003010 + 0x1000 * GSI_EE_AP);
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
H A D | rv1_clk_mgr_vbios_smu.c | 64 #define REG(reg_name) \ macro
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/linux-master/drivers/gpu/drm/amd/display/dc/dpp/dcn35/ |
H A D | dcn35_dpp.c | 31 #define REG(reg) dpp->tf_regs->reg macro
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/linux-master/drivers/media/dvb-frontends/ |
H A D | stb0899_priv.h | 243 #define STB0899_READ_S2REG(DEVICE, REG) (_stb0899_read_s2reg(state, DEVICE, STB0899_BASE_##REG, STB0899_OFF0_##REG)) 244 //#define STB0899_WRITE_S2REG(DEVICE, REG, DATA) (_stb0899_write_s2reg(state, DEVICE, STB0899_BASE_##REG, STB0899_OFF0_##REG, DATA))
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/linux-master/include/linux/mfd/ |
H A D | idtRC38xxx_reg.h | 195 #define IDTFC3_FW_REG(FW, VER, REG) (((FW) < (VER)) ? (REG) : (REG##_##VER))
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/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dce80/ |
H A D | hw_factory_dce80.c | 41 #define REG(reg_name)\ macro
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/ |
H A D | dce60_clk_mgr.c | 46 #define REG(reg) \ macro
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