/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonConstPropagation.cpp | 1791 Result = A1.shl(BW-Bits-Offset).ashr(BW-Bits); 1793 Result = A1.shl(BW-Bits-Offset).lshr(BW-Bits);
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/freebsd-13-stable/contrib/openpam/ |
H A D | config.guess | 178 sh3el) machine=shl-unknown ;;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | ConstantFolding.cpp | 752 // Fold (and 0xffffffff00000000, (shl x, 32)) -> shl. 2679 return ConstantInt::get(Ty, C0->shl(ShlAmt)); 2680 return ConstantInt::get(Ty, C0->shl(ShlAmt) | C1->lshr(LshrAmt));
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H A D | ScalarEvolution.cpp | 1626 // (zext (add (shl X, C1), C2)), for instance, (zext (5 + (4 * X))). 1662 // (because shl removes the top K bits) 5366 APInt::getMaxValue(BitWidth).lshr(TZ).shl(TZ) + 1); 5370 APInt::getSignedMaxValue(BitWidth).ashr(TZ).shl(TZ) + 1); 6097 APInt::getLowBitsSet(BitWidth, BitWidth - LZ - TZ).shl(TZ); 6198 // turn a nuw nsw shl into a nuw nsw mul. However, nsw in isolation 7553 // Both {K,lshr,<positive-constant>} and {K,shl,<positive-constant>}
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H A D | InstructionSimplify.cpp | 1330 // shl nuw i8 C, %x -> C iff C has sign bit set. 2048 // and (shl X, ShAmt), Mask --> shl X, ShAmt 2056 (~(*Mask)).shl(*ShAmt).isNullValue())
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/freebsd-13-stable/contrib/llvm-project/openmp/runtime/src/ |
H A D | z_Windows_NT-586_asm.asm | 1254 shl rax, 3 ; rax <= argc*8
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/freebsd-13-stable/crypto/openssl/crypto/sha/asm/ |
H A D | sha1-mb-x86_64.pl | 554 shl \$1,$num # we process pair at a time
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H A D | sha256-mb-x86_64.pl | 458 shl \$1,$num # we process pair at a time
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1073 APInt DemandedSrcElts = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx); 1462 // Convert (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits 1482 // intervenes: (shl (anyext (shr x, c1)), c2) to 1483 // (shl (anyext x), c2-c1). This requires that the bottom c1 bits 1824 KnownHi.Zero.zext(BitWidth).shl(HalfBitWidth); 1827 KnownHi.One.zext(BitWidth).shl(HalfBitWidth); 2557 APInt DemandedSrcElts = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx); 6244 // (rotl x, c) -> (or (shl x, (and c, w-1)), (srl x, (and -c, w-1))) 6245 // (rotr x, c) -> (or (srl x, (and c, w-1)), (shl [all...] |
H A D | SelectionDAG.cpp | 2379 APInt DemandedSrcElts = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx); 2726 APInt DemandedSrcElts = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx); 2775 Known2 = computeKnownBits(N0, SubDemandedElts.shl(i), 2778 Known.One |= Known2.One.zext(BitWidth).shl(SubBitWidth * Shifts); 2779 Known.Zero |= Known2.Zero.zext(BitWidth).shl(SubBitWidth * Shifts); 3720 // shl destroys sign bits, ensure it doesn't shift out all sign bits. 3984 APInt DemandedSrcElts = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx);
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H A D | DAGCombiner.cpp | 2530 // fold (add x, shl(0 - y, n)) -> sub(x, shl(y, n)) 3610 // mul x, (2^N + 1) --> add (shl x, N), x 3611 // mul x, (2^N - 1) --> sub (shl x, N), x 3642 // (mul (shl X, c1), c2) -> (mul X, c2 << c1) 3651 // Change (mul (shl X, C), Y) -> (shl (mul X, Y), C) when the shift has one 3656 // Check for both (mul (shl X, C), Y) and (mul Y, (shl X, C)). 4051 // fold (udiv x, (shl [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 952 APInt Mask = APInt::getLowBitsSet(64, Length).shl(Index); 954 V10 = V10.zextOrTrunc(Length).zextOrTrunc(64).shl(Index); 2059 // fshl(X, 0, C) --> shl X, C 2060 // fshl(X, undef, C) --> shl X, C 2570 // TODO should we turn this into 'and' if shift is 0? Or 'shl' if we 2882 // Constant fold shl( <A x Bi>, Ci ).
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H A D | InstCombineAndOrXor.cpp | 908 /// %t0 = shl i32 %arg, 24 941 Pred == ICmpInst::ICMP_ULT && I1->ugt(*I01) && I01->shl(1) == *I1)) 2093 // or (lshr ShVal, ShAmt0), (shl ShVal, ShAmt1) 2113 // (shl ShVal, (X & (Width - 1))) | (lshr ShVal, ((-X) & (Width - 1))) 2146 /// Attempt to combine or(zext(x),shl(zext(y),bw/2) concat packing patterns.
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/freebsd-13-stable/sys/contrib/openzfs/module/icp/asm-x86_64/sha2/ |
H A D | sha256_impl.S | 93 shl $4,%rdx # num*16
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H A D | sha512_impl.S | 94 shl $4,%rdx # num*16
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/IR/ |
H A D | ConstantFold.cpp | 1330 return ConstantInt::get(CI1->getContext(), C1V.shl(C2V));
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | SROA.cpp | 2167 APInt Mask = ~Ty->getMask().zext(IntTy->getBitWidth()).shl(ShAmt);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 1913 DAG.getConstant(E1.zext(32).shl(16) | E0.zext(32), SDLoc(Op), MVT::i32);
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/freebsd-13-stable/sys/dev/qlxgbe/ |
H A D | ql_hw.c | 5426 read_value <<= crbEntry->shl; /*Shift left operation */
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/freebsd-13-stable/contrib/apr/ |
H A D | configure | 25811 # shl is specific to parisc hpux SOM binaries, not used for 64 bit 25853 dsotype=shl; 26077 dsotype=shl; 26112 shl)
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/freebsd-13-stable/contrib/llvm-project/clang/lib/Sema/ |
H A D | SemaExpr.cpp | 10634 Result = Result.shl(Right);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 443 // 64-bit shl, sra, srl (iff 32-bit x86) 5170 // convert this to shl+add/sub and then still have to type legalize those ops. 5178 // If vector multiply is legal, assume that's faster than shl + add/sub. 5185 // shl+add, shl+sub, shl+add+neg 5342 // Pre-AVX2 vector codegen for this pattern is best for variant with 'shl'. 24085 Elts.push_back(DAG.getConstant(C.shl(ShiftAmt), dl, ElementType)); [all...] |