Searched refs:instructions (Results 76 - 87 of 87) sorted by relevance
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Coroutines/ |
H A D | CoroSplit.cpp | 1029 // Add musttail to any resume instructions that is immediately followed by a 1037 // Collect potential resume instructions. 1039 for (auto &I : instructions(F)) 1494 // We've inserted instructions into coroutine 'f' that reference the three new
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/freebsd-13-stable/sys/crypto/openssl/arm/ |
H A D | bsaes-armv7.S | 1876 @ put this in range for both ARM and Thumb mode adr instructions
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
H A D | Attributor.cpp | 793 // Since we need to provide return instructions we have to have an exact 836 // Check if we have instructions with this opcode at all first. 842 // Skip dead instructions. 860 // Since we need to provide instructions we have to have an exact definition. 894 // Skip dead instructions. 1102 << ToBeDeletedInsts.size() << " instructions and " 1123 // Do not modify call instructions outside the SCC. 1416 LLVM_DEBUG(dbgs() << "[Attributor] Cannot rewrite due to instructions\n"); 1546 // Set of all "call-like" instructions that invoke the old function mapped 1636 // Eliminate the instructions *afte [all...] |
/freebsd-13-stable/crypto/openssl/ |
H A D | Configure | 22 # see INSTALL for instructions. 675 # some people just can't read the instructions, clang people have to... 1079 INSTALL instructions and the RAND_DRBG(7) manual page for more details.
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/freebsd-13-stable/crypto/openssl/crypto/bn/asm/ |
H A D | armv8-mont.pl | 29 # umulh and therefore uses same amount of multiplication instructions 31 # instructions and of course instruction scheduling. 106 // instructions. The outcome of first addition is
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Bitcode/Reader/ |
H A D | BitcodeReader.cpp | 164 for (auto &I : instructions(F)) 5384 for (auto &I : instructions(F)) {
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/freebsd-13-stable/sys/contrib/openzfs/module/icp/asm-x86_64/sha2/ |
H A D | sha256_impl.S | 16 * former case the instructions operate on 32-bit operands, while in 25 * X[16] in register bank[!], tends to 4 instructions per CPU clock 40 * apparently are not atomic instructions, but implemented in microcode. 106 # (%rbp). This generates these 2 instructions:
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H A D | sha512_impl.S | 16 * former case the instructions operate on 32-bit operands, while in 25 * X[16] in register bank[!], tends to 4 instructions per CPU clock 40 * apparently are not atomic instructions, but implemented in microcode. 107 # (%rbp). This generates these 2 instructions:
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGISel.cpp | 114 STATISTIC(NumFastIselFailures, "Number of instructions fast isel failed on"); 115 STATISTIC(NumFastIselSuccess, "Number of instructions fast isel selected"); 280 // that mark instructions with the 'usesCustomInserter' flag. These 281 // instructions are special in various ways, which require special support to 284 // instructions, potentially also creating new basic blocks and control flow. 396 for (const Instruction &I : instructions(F)) { 572 // Insert DBG_VALUE instructions for function arguments to the entry block. 612 // that COPY instructions also need DBG_VALUE, if it is the only 695 // Lower the instructions. If a call is emitted as a tail call, cease emitting 972 // scheduled instructions [all...] |
/freebsd-13-stable/crypto/openssl/crypto/aes/asm/ |
H A D | bsaes-armv7.pl | 1866 @ put this in range for both ARM and Thumb mode adr instructions
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/freebsd-13-stable/crypto/openssl/crypto/ec/asm/ |
H A D | ecp_nistz256-sparcv9.pl | 1899 ! instructions, but only 14% faster [on T4]... 3022 # Purpose of these subroutines is to explicitly encode VIS instructions,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | ScalarEvolution.cpp | 621 // For instructions, compare their loop depth, and their operand count. This 4466 // vectorizer induction analysis), a Set of cast instructions will be 5226 /// Expand GEP instructions into add and multiply operations. This allows them 5813 // since we only deal with instructions in the loop header. The actual loop we 5829 // instructions can map to the same SCEV. If we apply NSW or NUW from I to 5831 // derived from other instructions that map to the same SCEV. We cannot make 5968 // Don't attempt to analyze instructions in blocks that aren't 5969 // reachable. Such instructions don't matter, and they aren't required 6331 // constant expressions cannot have instructions as operands, we'd have 7657 // Record non-constant instructions containe [all...] |
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