| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 41 static bool allocateFloat(unsigned ValNo, MVT ValVT, MVT LocVT, argument
55 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2274 EVT ValVT = Val.getValueType(); local
2276 if (ValVT.isVector()) {
2280 if (!ValVT.isSimple())
2282 switch (ValVT.getSimpleVT().SimpleTy) {
2307 TD.getPrefTypeAlign(ValVT.getTypeForEVT(*DAG.getContext()));
2318 EVT EltVT = ValVT.getVectorElementType();
2319 unsigned NumElts = ValVT.getVectorNumElements();
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 274 static bool CC_Mips(unsigned ValNo, MVT ValVT, MVT LocVT,
278 static bool CC_MipsO32_FP32(unsigned ValNo, MVT ValVT, MVT LocVT, argument
284 static bool CC_MipsO32_FP64(unsigned ValNo, MVT ValVT, MVT LocVT, argument
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 5118 EVT ValVT = ValOp.getValueType(); local
5119 unsigned ValWidth = ValVT.getSizeInBits();
5120 EVT ValEltVT = ValVT.getVectorElementType();
5128 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
5181 EVT ValVT = ValOp.getValueType(); local
5191 EVT ValEltVT = ValVT.getVectorElementType();
|
| H A D | LegalizeTypes.h | 233 SDValue PromoteTargetBoolean(SDValue Bool, EVT ValVT);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3698 // i8 to CC_AArch64_AAPCS with i32 being ValVT and i8 being LocVT.
3699 // Since AnalyzeFormalArguments uses Ins[].VT for both ValVT and LocVT, here
3700 // we use a special version of AnalyzeFormalArguments to pass in ValVT and
3706 MVT ValVT = Ins[i].VT; local
3717 ValVT = MVT::i8;
3719 ValVT = MVT::i16;
3723 AssignFn(i, ValVT, ValVT, CCValAssign::Full, Ins[i].Flags, CCInfo);
3821 // For NON_EXTLOAD, generic code in getLoad assert(ValVT == MemVT)
4383 // i8 to CC_AArch64_AAPCS with i32 being ValVT an
4389 MVT ValVT = Outs[i].VT; local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 1645 // For NON_EXTLOAD, generic code in getLoad assert(ValVT == MemVT)
2287 EVT ValVT = VA.getValVT(); local
2311 Val = DAG.getNode(ISD::BITCAST, DL, ValVT, Val);
2315 DAG.getValueType(ValVT));
2316 Val = DAG.getNode(ISD::TRUNCATE, DL, ValVT, Val);
2320 DAG.getValueType(ValVT));
2321 Val = DAG.getNode(ISD::TRUNCATE, DL, ValVT, Val);
2324 Val = DAG.getNode(ISD::TRUNCATE, DL, ValVT, Val);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2566 EVT ValVT = ValArg.getValueType(); local
2568 if (ValVT == MVT::v1i1)
2572 if ((ValVT == MVT::v8i1 && (ValLoc == MVT::i8 || ValLoc == MVT::i32)) ||
2573 (ValVT == MVT::v16i1 && (ValLoc == MVT::i16 || ValLoc == MVT::i32))) {
2577 EVT TempValLoc = ValVT == MVT::v8i1 ? MVT::i8 : MVT::i16;
2584 if ((ValVT == MVT::v32i1 && ValLoc == MVT::i32) ||
2585 (ValVT == MVT::v64i1 && ValLoc == MVT::i64)) {
2653 EVT ValVT = ValToCopy.getValueType(); local
2661 if (ValVT.isVector() && ValVT
2939 lowerRegToMasks(const SDValue &ValArg, const EVT &ValVT, const EVT &ValLoc, const SDLoc &Dl, SelectionDAG &DAG) argument
3181 EVT ValVT; local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 2039 MVT LocVT, MVT ValVT, SDValue Val) const {
2043 Val = DAG.getNode(ARMISD::VMOVhr, dl, ValVT, Val);
2046 MVT::getIntegerVT(ValVT.getSizeInBits()), Val);
2047 Val = DAG.getNode(ISD::BITCAST, dl, ValVT, Val);
2053 MVT LocVT, MVT ValVT,
2060 MVT::getIntegerVT(ValVT.getSizeInBits()), Val);
2038 MoveToHPR(const SDLoc &dl, SelectionDAG &DAG, MVT LocVT, MVT ValVT, SDValue Val) const argument
2052 MoveFromHPR(const SDLoc &dl, SelectionDAG &DAG, MVT LocVT, MVT ValVT, SDValue Val) const argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 137 static bool CC_SkipOdd(unsigned &ValNo, MVT &ValVT, MVT &LocVT, argument
|