| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUSubtarget.h | 414 SIInstrInfo InstrInfo; member in class:llvm::GCNSubtarget
430 return &InstrInfo;
442 return &InstrInfo.getRegisterInfo();
1253 R600InstrInfo InstrInfo; member in class:llvm::final
1271 const R600InstrInfo *getInstrInfo() const override { return &InstrInfo; }
1282 return &InstrInfo.getRegisterInfo();
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| H A D | SIWholeQuadMode.cpp | 127 struct InstrInfo { struct in namespace:__anon3995
157 DenseMap<const MachineInstr *, InstrInfo> Instructions;
251 InstrInfo &II = Instructions[&MI];
329 InstrInfo &III = Instructions[&MI];
430 InstrInfo II = Instructions[&MI]; // take a copy to prevent dangling references
454 InstrInfo &PrevII = Instructions[PrevMI];
481 InstrInfo &LastII = Instructions[LastMI];
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| H A D | AMDGPUSubtarget.cpp | 274 InstrInfo(initializeSubtargetDependencies(TT, GPU, FS)),
543 InstrInfo(*this),
574 return InstrInfo.pseudoToMCOpcode(AMDGPU::V_MAD_F16) != -1;
743 Lat = InstrInfo.getInstrLatency(getInstrItineraryData(), *I);
753 unsigned Lat = InstrInfo.getInstrLatency(getInstrItineraryData(), *DefI);
890 Mutations.push_back(std::make_unique<FillMFMAShadowMutation>(&InstrInfo));
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.h | 98 HexagonInstrInfo InstrInfo; member in class:llvm::HexagonSubtarget
119 const HexagonInstrInfo *getInstrInfo() const override { return &InstrInfo; }
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| H A D | HexagonSubtarget.cpp | 82 TargetTriple(TT), InstrInfo(initializeSubtargetDependencies(CPU, FS)),
357 int DLatency = (InstrInfo.getOperandLatency(&InstrItins, *SrcInst,
445 int Latency = (InstrInfo.getOperandLatency(&InstrItins, *SrcI,
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCSubtarget.h | 160 PPCInstrInfo InstrInfo; member in class:llvm::PPCSubtarget
196 const PPCInstrInfo *getInstrInfo() const override { return &InstrInfo; }
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| H A D | PPCSubtarget.cpp | 60 InstrInfo(*this), TLInfo(TM, *this) {}
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| H A D | PPCRegisterInfo.cpp | 320 const PPCInstrInfo *InstrInfo = Subtarget.getInstrInfo(); local
344 unsigned Opcode = InstrInfo->getStoreOpcodeForSpill(RC);
358 if (InstrInfo->isXFormMemOp(Opcode))
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMSubtarget.h | 540 return InstrInfo.get();
552 return &InstrInfo->getRegisterInfo();
565 std::unique_ptr<ARMBaseInstrInfo> InstrInfo; member in class:llvm::ARMSubtarget
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| H A D | ARMSubtarget.cpp | 106 InstrInfo(isThumb1Only()
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiMCCodeEmitter.cpp | 306 llvm::createLanaiMCCodeEmitter(const MCInstrInfo &InstrInfo, argument
309 return new LanaiMCCodeEmitter(InstrInfo, context);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Subtarget.h | 244 AArch64InstrInfo InstrInfo; member in class:llvm::final
281 const AArch64InstrInfo *getInstrInfo() const override { return &InstrInfo; }
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| H A D | AArch64Subtarget.cpp | 208 InstrInfo(initializeSubtargetDependencies(FS, CPU)), TSInfo(),
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86Subtarget.h | 521 X86InstrInfo InstrInfo; member in class:llvm::final
538 const X86InstrInfo *getInstrInfo() const override { return &InstrInfo; }
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| H A D | X86Subtarget.cpp | 337 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
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| /freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | InstrInfoEmitter.cpp | 75 Record *InstrInfo,
497 OS << TargetName << "InstrInfo::";
528 Record *InstrInfo = Target.getInstructionSet(); local
566 emitRecord(*Inst, Num++, InstrInfo, EmittedLists, OperandInfoIDs, OS);
717 Record *InstrInfo,
716 emitRecord(const CodeGenInstruction &Inst, unsigned Num, Record *InstrInfo, std::map<std::vector<Record*>, unsigned> &EmittedLists, const OperandInfoMapTy &OpInfo, raw_ostream &OS) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSubtarget.cpp | 86 InstrInfo(
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCCodeEmitter.cpp | 435 const PPCInstrInfo *InstrInfo = static_cast<const PPCInstrInfo*>(&MCII); local
436 return InstrInfo->isPrefixed(Opcode);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIParser.cpp | 146 auto InstrInfo = Names2InstrOpCodes.find(InstrName); local
147 if (InstrInfo == Names2InstrOpCodes.end())
149 OpCode = InstrInfo->getValue();
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| /freebsd-13-stable/lib/clang/libllvm/ |
| H A D | Makefile | 1761 InstrInfo/-gen-instr-info \
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| /freebsd-13-stable/contrib/llvm-project/llvm/tools/llvm-objdump/ |
| H A D | MachODump.cpp | 7198 std::unique_ptr<const MCInstrInfo> InstrInfo(TheTarget->createMCInstrInfo());
7235 Triple(TripleName), AsmPrinterVariant, *AsmInfo, *InstrInfo, *MRI));
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