Searched refs:Vec (Results 51 - 75 of 82) sorted by relevance

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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp2138 for (unsigned Vec = 0; Vec < NumVecs; ++Vec)
2139 ReplaceUses(SDValue(N, Vec),
2140 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg));
2416 for (unsigned Vec = 0; Vec < NumVecs; ++Vec)
2417 ReplaceUses(SDValue(N, Vec),
2418 CurDAG->getTargetExtractSubreg(Sub0 + Vec, d
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H A DARMISelLowering.cpp2001 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); local
2002 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val,
2016 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val,
7371 SDValue Vec = DAG.getUNDEF(VT); local
7377 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx);
7379 return Vec;
7395 SDValue Vec; member in struct:ShuffleSourceInfo
7399 // We may insert some combination of BITCASTs and VEXT nodes to force Vec t
7409 ShuffleSourceInfo(SDValue Vec) argument
13005 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0)); local
13643 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, IntVec); local
14103 SDValue Vec = N0.getOperand(0); local
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/IR/
H A DAutoUpgrade.cpp1331 static Value *ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder, Value *Vec, argument
1333 unsigned NumElts = Vec->getType()->getVectorNumElements();
1337 Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts));
1346 Vec = Builder.CreateShuffleVector(Vec,
1347 Constant::getNullValue(Vec->getType()),
1350 return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U)));
1814 Value *Vec = CI->getArgOperand(0); local
1815 Value *Elt0 = Builder.CreateExtractElement(Vec, (uint64_
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H A DInstructions.cpp1735 InsertElementInst::InsertElementInst(Value *Vec, Value *Elt, Value *Index, argument
1738 : Instruction(Vec->getType(), InsertElement,
1741 assert(isValidOperands(Vec, Elt, Index) &&
1743 Op<0>() = Vec;
1749 InsertElementInst::InsertElementInst(Value *Vec, Value *Elt, Value *Index, argument
1752 : Instruction(Vec->getType(), InsertElement,
1755 assert(isValidOperands(Vec, Elt, Index) &&
1758 Op<0>() = Vec;
1764 bool InsertElementInst::isValidOperands(const Value *Vec, const Value *Elt, argument
1766 if (!Vec
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp357 SDValue Vec = local
359 return DAG.getNode(ISD::BITCAST, dl, N->getValueType(0), Vec);
H A DLegalizeFloatTypes.cpp2200 SDValue Vec = N->getOperand(0); local
2202 EVT VecVT = Vec->getValueType(0);
2215 Vec = GetWidenedVector(Vec);
2216 SDValue Res = DAG.getNode(N->getOpcode(), DL, EltVT, Vec, Idx);
2222 GetSplitVector(Vec, Lo, Hi);
H A DTargetLowering.cpp752 SDValue Vec = Op.getOperand(0); local
754 EVT VecVT = Vec.getValueType();
757 return Vec;
884 SDValue Vec = Op.getOperand(0); local
887 EVT VecVT = Vec.getValueType();
898 return TLO.CombineTo(Op, Vec);
910 if (SimplifyDemandedBits(Vec, DemandedBits, DemandedVecElts, KnownVec, TLO,
2377 SDValue Vec = Op.getOperand(0); local
2386 return TLO.CombineTo(Op, Vec);
2390 if (SimplifyDemandedVectorElts(Vec, DemandedVecElt
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H A DDAGCombiner.cpp15438 SDValue Vec = Val.getOperand(0); local
15440 Val = DAG.getNode(OpC, SDLoc(Val), MemVT, Vec, Idx);
16732 SDValue Vec = N->getOperand(0); local
16738 if (Vec.getOpcode() == ISD::VECTOR_SHUFFLE && Vec.hasOneUse() &&
16741 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Vec.getNode());
16744 SDValue X = Vec.getOperand(0);
16745 SDValue Y = Vec.getOperand(1);
16747 // Vec's operand 0 is using indices from 0 to N-1 and
16792 (int)(2 * Vec
17032 SDValue Vec = ExtElt->getOperand(0); local
17712 SDValue Vec = VecIn.back(); local
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/freebsd-12-stable/contrib/llvm-project/clang/lib/AST/
H A DFormatString.cpp501 QualType Vec = C.getExtVectorType(T, NumElts);
502 return ArgType(Vec, Name);
H A DDeclBase.cpp1493 StoredDeclsList::DeclsTy *Vec = Pos->second.getAsVector(); local
1494 if ((Vec && is_contained(*Vec, ND)) || Pos->second.getAsDecl() == ND)
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/IR/
H A DConstants.h1197 static Constant *getExtractElement(Constant *Vec, Constant *Idx,
1199 static Constant *getInsertElement(Constant *Vec, Constant *Elt, Constant *Idx,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp4785 SDValue Vec = Op.getOperand(0); local
4788 EVT VecVT = Vec.getValueType();
4798 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, SL, VecVT, Vec, Elt,
4801 return Vec;
4806 SDValue Vec = Op.getOperand(0); local
4809 EVT VecVT = Vec.getValueType();
4822 SDValue BCVec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Vec);
4867 SDValue BCVec = DAG.getNode(ISD::BITCAST, SL, IntVT, Vec);
4885 SDValue Vec
8552 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32, local
9280 SDValue Vec = N->getOperand(0); local
9401 SDValue Vec = N->getOperand(0); local
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H A DAMDGPULegalizerInfo.cpp1542 Register Vec = MI.getOperand(1).getReg();
1544 LLT VecTy = MRI.getType(Vec);
1551 B.buildExtract(Dst, Vec, IdxVal.getValue() * EltTy.getSizeInBits());
1571 Register Vec = MI.getOperand(1).getReg();
1574 LLT VecTy = MRI.getType(Vec);
1581 B.buildInsert(Dst, Vec, Ins, IdxVal.getValue() * EltTy.getSizeInBits());
/freebsd-12-stable/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp4507 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift,
4515 Vec = Builder.CreateBitCast(Vec, Ty);
4533 return Builder.CreateLShr(Vec, Shift, name);
4535 return Builder.CreateAShr(Vec, Shift, name);
7043 Value *Vec = Builder.CreateExtractValue(LoadResult, i);
7044 MvecOut = Builder.CreateInsertValue(MvecOut, Vec, {0, i});
7902 Value *Vec = EmitScalarExpr(E->getArg(0));
7904 Vec = Builder.CreateBitCast(Vec, T
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/freebsd-12-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DBugReporterVisitors.cpp384 /// Note that \p Vec is passed by value, leading to quadratic copying cost,
389 const MemRegion *R, const RegionVector &Vec = {},
489 /// Note that \p Vec is passed by value, leading to quadratic copying cost,
495 const NoStoreFuncVisitor::RegionVector &Vec /* = {} */,
511 findRegionOfInterestInRecord(RRD, State, R, Vec, depth))
520 RegionVector VecF = Vec;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DRewriteStatepointsForGC.cpp1883 template <typename T> static void unique_unsorted(SmallVectorImpl<T> &Vec) { argument
1885 Vec.erase(remove_if(Vec, [&](const T &V) { return !Seen.insert(V).second; }),
1886 Vec.end());
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Bitcode/Reader/
H A DBitcodeReader.cpp4131 Value *Vec, *Idx; local
4132 if (getValueTypePair(Record, OpNum, NextValueNo, Vec, &FullTy) ||
4135 if (!Vec->getType()->isVectorTy())
4137 I = ExtractElementInst::Create(Vec, Idx);
4145 Value *Vec, *Elt, *Idx; local
4146 if (getValueTypePair(Record, OpNum, NextValueNo, Vec, &FullTy))
4148 if (!Vec->getType()->isVectorTy())
4151 cast<VectorType>(Vec->getType())->getElementType(), Elt) ||
4154 I = InsertElementInst::Create(Vec, Elt, Idx);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp6547 SDValue Vec; member in struct:ShuffleSourceInfo
6551 // We may insert some combination of BITCASTs and VEXT nodes to force Vec to
6553 // ShuffleVec will be some sliding window into the original Vec.
6556 // Code should guarantee that element i in Vec starts at element "WindowBase
6561 ShuffleSourceInfo(SDValue Vec) argument
6562 : Vec(Vec), MinElt(std::numeric_limits<unsigned>::max()), MaxElt(0),
6563 ShuffleVec(Vec), WindowBase(0), WindowScale(1) {}
6565 bool operator ==(SDValue OtherVec) { return Vec == OtherVec; }
6608 EVT SrcEltTy = Source.Vec
8068 SDValue Vec = DAG.getSplatBuildVector(VT, dl, ConstantValue), local
8113 SDValue Vec = DAG.getUNDEF(VT); local
10449 SDValue Vec = Op1.getOperand(0); local
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp1221 SDValue Vec = Value.getOperand(0);
1222 EVT VT = Vec.getValueType();
1234 Vec, Base, Disp, Index, CurDAG->getTargetConstant(Elem, DL, MVT::i32),
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp1364 SDValue Vec = Op->getOperand(1); local
1367 EVT EltTy = Vec->getValueType(0).getVectorElementType();
1369 SDValue Result = DAG.getNode(Opc, DL, ResTy, Vec, Idx,
1511 SDValue Vec = Op->getOperand(2); local
1514 SDValue ConstValue = DAG.getConstant(Vec.getScalarValueSizeInBits() - 1,
1518 return DAG.getNode(ISD::AND, DL, ResTy, Vec, SplatVec);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp990 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2i32); local
995 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2i32, Vec, Lo,
1001 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2i32, Vec, Hi,
1003 InVals.push_back(Vec);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DLoopVectorize.cpp617 /// Generate a shuffle sequence that will reverse the vector Vec.
618 virtual Value *reverseVector(Value *Vec);
796 Value *reverseVector(Value *Vec) override;
2119 Value *InnerLoopVectorizer::reverseVector(Value *Vec) {
2120 assert(Vec->getType()->isVectorTy() && "Invalid type");
2125 return Builder.CreateShuffleVector(Vec, UndefValue::get(Vec->getType()),
6621 Value *InnerLoopUnroller::reverseVector(Value *Vec) { return Vec; }
/freebsd-12-stable/contrib/llvm-project/clang/lib/Sema/
H A DSemaDecl.cpp17429 auto Vec = std::make_unique<ECDVector>(); local
17430 Vec->push_back(D);
17431 Vec->push_back(ECD);
17434 Entry = Vec.get();
17438 DupVector.emplace_back(std::move(Vec));
17442 ECDVector *Vec = Entry.get<ECDVector*>(); local
17444 if (*Vec->begin() == ECD)
17447 Vec->push_back(ECD);
17451 for (const auto &Vec : DupVector) {
17452 assert(Vec
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerInfo.h1311 static SizeAndAction findAction(const SizeAndActionsVec &Vec,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp2648 SDValue Vec = Op.getOperand(0); local
2649 MVT ElemTy = ty(Vec).getVectorElementType();
2650 return extractVector(Vec, Op.getOperand(1), SDLoc(Op), ElemTy, ty(Op), DAG);

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