Lines Matching refs:Vec
2001 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64);
2002 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val,
2016 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val,
7371 SDValue Vec = DAG.getUNDEF(VT);
7377 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx);
7379 return Vec;
7395 SDValue Vec;
7399 // We may insert some combination of BITCASTs and VEXT nodes to force Vec to
7401 // ShuffleVec will be some sliding window into the original Vec.
7404 // Code should guarantee that element i in Vec starts at element "WindowBase
7409 ShuffleSourceInfo(SDValue Vec) : Vec(Vec), ShuffleVec(Vec) {}
7411 bool operator ==(SDValue OtherVec) { return Vec == OtherVec; }
7452 EVT SrcEltTy = Source.Vec.getValueType().getVectorElementType();
8229 SDValue Vec = Op.getOperand(0);
8230 EVT VT = Vec.getValueType();
8235 if (Op.getValueType() == MVT::i32 && Vec.getScalarValueSizeInBits() < 32) {
8237 return DAG.getNode(ARMISD::VGETLANEu, dl, MVT::i32, Vec, Lane);
11209 SDValue Vec = N0->getOperand(0)->getOperand(0);
11210 SDNode *V = Vec.getNode();
11246 if (nextIndex != Vec.getValueType().getVectorNumElements() ||
11247 Vec.getValueType().getVectorElementType() == VT.getVectorElementType())
11262 Ops.push_back(Vec);
11268 EVT inputLaneType = Vec.getValueType().getVectorElementType();
12914 SDValue Vec = DAG.getUNDEF(VecVT);
12930 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecVT, Vec, V, LaneIdx);
12932 Vec = DAG.getNode(ISD::BITCAST, dl, VT, Vec);
12934 DCI.AddToWorklist(Vec.getNode());
12935 return Vec;
13005 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0));
13008 DCI.AddToWorklist(Vec.getNode());
13011 Vec, V, N->getOperand(2));
13643 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, IntVec);
13645 Vec, StVal.getOperand(1));
13649 DCI.AddToWorklist(Vec.getNode());
14103 SDValue Vec = N0.getOperand(0);
14111 TLI.isTypeLegal(Vec.getValueType()) &&
14125 return DAG.getNode(Opc, SDLoc(N), VT, Vec, Lane);