/freebsd-11.0-release/contrib/llvm/tools/clang/lib/CodeGen/ |
H A D | CGExpr.cpp | 2445 llvm::Value *&Cond = local 2451 Cond = Cond ? Builder.CreateAnd(Cond, Check) : Check; 2535 void CodeGenFunction::EmitCfiSlowPathCheck(llvm::Value *Cond, argument 2542 llvm::BranchInst *BI = Builder.CreateCondBr(Cond, Cont, CheckBB);
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H A D | CGCall.cpp | 2485 llvm::Value *Cond = Builder.CreateICmpNE( 2491 EmitCheck(std::make_pair(Cond, SanitizerKind::ReturnsNonnullAttribute), 2818 llvm::Value *Cond = 2825 EmitCheck(std::make_pair(Cond, SanitizerKind::NonnullAttribute),
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H A D | CGStmt.cpp | 1104 llvm::Value *Cond = local 1118 Builder.CreateCondBr(Cond, CaseDest, FalseDest, Weights);
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H A D | CGOpenMPRuntime.cpp | 1240 /// if (Cond) { 1245 static void emitOMPIfClause(CodeGenFunction &CGF, const Expr *Cond, argument 1248 CodeGenFunction::LexicalScope ConditionScope(CGF, Cond->getSourceRange()); 1253 if (CGF.ConstantFoldsToSimpleInteger(Cond, CondConstant)) { 1268 CGF.EmitBranchOnBoolExpr(Cond, ThenBlock, ElseBlock, /*TrueCount=*/0);
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/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 6417 SDValue Cond = DAG.getNode(ISD::SRA, dl, MVT::i64, local 6419 Cond = DAG.getNode(ISD::ADD, dl, MVT::i64, 6420 Cond, DAG.getConstant(1, dl, MVT::i64)); 6421 Cond = DAG.getSetCC(dl, MVT::i32, 6422 Cond, DAG.getConstant(1, dl, MVT::i64), ISD::SETUGT); 6424 SINT = DAG.getNode(ISD::SELECT, dl, MVT::i64, Cond, Round, SINT); 8633 SmallVector<MachineOperand, 2> Cond; local 8636 Cond.push_back(MI->getOperand(4)); 8638 Cond.push_back(MachineOperand::CreateImm(PPC::PRED_BIT_SET)); 8639 Cond 10601 SDValue Cond = N->getOperand(1); local [all...] |
/freebsd-11.0-release/contrib/llvm/lib/IR/ |
H A D | Instructions.cpp | 1025 BranchInst::BranchInst(BasicBlock *IfTrue, BasicBlock *IfFalse, Value *Cond, 1032 Op<-3>() = Cond; 1046 BranchInst::BranchInst(BasicBlock *IfTrue, BasicBlock *IfFalse, Value *Cond, 1053 Op<-3>() = Cond;
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H A D | Core.cpp | 2123 void LLVMSetCondition(LLVMValueRef Branch, LLVMValueRef Cond) { argument 2124 return unwrap<BranchInst>(Branch)->setCondition(unwrap(Cond));
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/freebsd-11.0-release/contrib/llvm/tools/clang/lib/Sema/ |
H A D | SemaDeclAttr.cpp | 804 Expr *Cond = Attr.getArgAsExpr(0); local 805 if (!Cond->isTypeDependent()) { 806 ExprResult Converted = S.PerformContextuallyConvertToBool(Cond); 809 Cond = Converted.get(); 817 if (!Cond->isValueDependent() && 818 !Expr::isPotentialConstantExprUnevaluated(Cond, cast<FunctionDecl>(D), 827 EnableIfAttr(Attr.getRange(), S.Context, Cond, Msg,
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H A D | AnalysisBasedWarnings.cpp | 1169 const Expr *Cond = cast<DoStmt>(S)->getCond(); local 1171 if (!Cond->EvaluateAsInt(Val, Ctx))
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H A D | SemaOpenMP.cpp | 2826 Expr *BuildPreCond(Scope *S, Expr *Cond) const; 3371 Expr *OpenMPIterationSpaceChecker::BuildPreCond(Scope *S, Expr *Cond) const { 3380 return Cond; 3392 return Cond; 3406 return CondExpr.isUsable() ? CondExpr.get() : Cond; 3984 ExprResult Cond = 4129 Built.Cond = Cond.get();
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H A D | SemaExprCXX.cpp | 4827 /// extension. In this case, LHS == Cond. (But they're not aliases.) 4828 QualType Sema::CXXCheckConditionalOperands(ExprResult &Cond, ExprResult &LHS, argument 4837 if (!Cond.get()->isTypeDependent()) { 4838 ExprResult CondRes = CheckCXXBooleanCondition(Cond.get()); 4841 Cond = CondRes;
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/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 149 ARMCC::CondCodes Cond; // Condition for IT block. member in struct:__anon2786::ARMAsmParser::__anon2787 4658 unsigned Cond = static_cast<ARMOperand &>(*Operands[CondOp]).getCondCode(); local 4662 Inst.setOpcode(Cond == ARMCC::AL ? ARM::tB : ARM::tBcc); 4666 Inst.setOpcode(Cond == ARMCC::AL ? ARM::t2B : ARM::t2Bcc); 6060 unsigned Cond = Inst.getOperand(MCID.findFirstPredOperandIdx()).getImm(); local 6061 unsigned ITCond = Bit ? ITState.Cond : 6062 ARMCC::getOppositeCondition(ITState.Cond); 6063 if (Cond != ITCond) { 6070 StringRef(ARMCondCodeToString(ARMCC::CondCodes(Cond))) + 8419 ITState.Cond [all...] |
/freebsd-11.0-release/contrib/llvm/lib/CodeGen/ |
H A D | CodeGenPrepare.cpp | 4692 Value *Cond = SI->getCondition(); 4693 Type *OldType = Cond->getType(); 4694 LLVMContext &Context = Cond->getContext(); 4714 if (auto *Arg = dyn_cast<Argument>(Cond)) 4718 auto *ExtInst = CastInst::Create(ExtType, Cond, NewType);
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/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 58 AArch64CC::CondCode parseCondCodeString(StringRef Cond); 2349 AArch64CC::CondCode AArch64AsmParser::parseCondCodeString(StringRef Cond) { argument 2350 AArch64CC::CondCode CC = StringSwitch<AArch64CC::CondCode>(Cond.lower()) 2381 StringRef Cond = Tok.getString(); local 2382 AArch64CC::CondCode CC = parseCondCodeString(Cond);
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/freebsd-11.0-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 4033 const SDValue Cond = N->getOperand(0); 4034 if (Cond.getOpcode() != ISD::SETCC) return SDValue(); 4036 const SDValue LHS = Cond.getOperand(0); 4037 const SDValue RHS = Cond.getOperand(1); 4046 const ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
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/freebsd-11.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 339 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, 5219 SDValue Cond = N->getOperand(0); local 5226 Cond.getOpcode() == ISD::BUILD_VECTOR); 5240 if (Cond->getOperand(i)->getOpcode() == ISD::UNDEF) 5244 BottomHalf = cast<ConstantSDNode>(Cond.getOperand(i)); 5245 else if (Cond->getOperand(i).getNode() != BottomHalf) 5252 if (Cond->getOperand(i)->getOpcode() == ISD::UNDEF) 5256 TopHalf = cast<ConstantSDNode>(Cond.getOperand(i)); 5257 else if (Cond->getOperand(i).getNode() != TopHalf) 5709 SDValue Cond local 7090 SDValue Cond = N0.getOperand(0); local 14047 SDValue Cond = DAG.getSetCC(DL, local 14217 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, SDLoc DL, bool foldBooleans) argument [all...] |
H A D | LegalizeDAG.cpp | 1732 SDValue Cond = DAG.getSetCC(DL, getSetCCResultType(IntVT), SignBit, 1734 return DAG.getSelect(DL, FloatVT, Cond, NegValue, AbsValue); 3860 SDValue Cond = DAG.getNode(ISD::SETCC, dl, CCVT, Tmp1, Tmp2, CC); 3861 Results.push_back(DAG.getSelect(dl, VT, Cond, Tmp3, Tmp4));
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/freebsd-11.0-release/contrib/llvm/tools/clang/lib/StaticAnalyzer/Checkers/ |
H A D | MallocChecker.cpp | 207 ProgramStateRef evalAssume(ProgramStateRef state, SVal Cond, 2333 SVal Cond, 2332 evalAssume(ProgramStateRef state, SVal Cond, bool Assumption) const argument
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/freebsd-11.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGNodes.h | 1877 explicit CondCodeSDNode(ISD::CondCode Cond) 1879 Condition(Cond) {
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/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 980 const Value *Cond = SI->getCondition(); local 983 unsigned CondReg = getRegForValue(Cond);
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/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 1499 SDValue Cond = Op.getOperand(0); local 1510 SDValue Lo = DAG.getSelect(DL, MVT::i32, Cond, Lo0, Lo1); 1515 SDValue Hi = DAG.getSelect(DL, MVT::i32, Cond, Hi0, Hi1);
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/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 421 uint32_t Cond = (Insn >> 28) & 0xF; local 422 if (Cond == 0xF) 424 if (Cond != 0xE) 5177 unsigned Cond = fieldFromInstruction(Val, 28, 4); local 5190 if (!Check(S, DecodePredicateOperand(Inst, Cond, Address, Decoder)))
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/freebsd-11.0-release/contrib/llvm/include/llvm/Target/ |
H A D | TargetLowering.h | 2210 ISD::CondCode Cond, bool foldBooleans,
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/freebsd-11.0-release/contrib/llvm/include/llvm-c/ |
H A D | Core.h | 2488 void LLVMSetCondition(LLVMValueRef Branch, LLVMValueRef Cond);
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/freebsd-11.0-release/contrib/llvm/lib/AsmParser/ |
H A D | LLParser.cpp | 4940 Value *Cond; 4942 if (ParseTypeAndValue(Cond, CondLoc, PFS) || 4948 if (!Cond->getType()->isIntegerTy()) 4973 SwitchInst *SI = SwitchInst::Create(Cond, DefaultBB, Table.size());
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