Searched refs:reg (Results 526 - 550 of 1755) sorted by relevance

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/freebsd-11-stable/sys/dev/tl/
H A Dif_tlreg.h464 #define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->tl_res, reg, val)
465 #define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->tl_res, reg, val)
466 #define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->tl_res, reg, val)
468 #define CSR_READ_4(sc, reg) bus_read_4(sc->tl_res, reg)
469 #define CSR_READ_2(sc, reg) bus_read_2(sc->tl_res, reg)
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H A Dif_tl.c371 static u_int8_t tl_dio_read8(sc, reg)
373 int reg;
378 CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
381 return(CSR_READ_1(sc, TL_DIO_DATA + (reg & 3)));
384 static u_int16_t tl_dio_read16(sc, reg)
386 int reg;
391 CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
394 return(CSR_READ_2(sc, TL_DIO_DATA + (reg & 3)));
397 static u_int32_t tl_dio_read32(sc, reg)
399 int reg;
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/freebsd-11-stable/sys/dev/vnic/
H A Dthunder_mdio.c146 #define mdio_reg_read(sc, reg) \
147 bus_read_8((sc)->reg_base, (reg))
149 #define mdio_reg_write(sc, reg, val) \
150 bus_write_8((sc)->reg_base, (reg), (val))
217 thunder_mdio_c45_addr(struct thunder_mdio_softc *sc, int phy, int reg) argument
225 mdio_reg_write(sc, SMI_WR_DAT, reg & SMI_WR_DAT_DAT_MASK);
236 smi_cmd |= ((reg << SMI_CMD_PHY_REG_ADR_SHIFT) &
257 thunder_mdio_read(device_t dev, int phy, int reg) argument
278 err = thunder_mdio_c45_addr(sc, phy, reg);
282 reg
309 thunder_mdio_write(device_t dev, int phy, int reg, int data) argument
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/freebsd-11-stable/sys/arm/freescale/imx/
H A Dimx51_ccm.c101 * The fdt data does not provide reg properties describing the DPLL register
156 pll_read_4(struct imxccm_softc *sc, int pll, int reg) argument
159 return (bus_space_read_4(sc->pllbst, sc->pllbsh[pll - 1], reg));
163 ccm_read_4(struct imxccm_softc *sc, int reg) argument
166 return (bus_read_4(sc->ccmregs, reg));
170 ccm_write_4(struct imxccm_softc *sc, int reg, uint32_t val) argument
173 bus_write_4(sc->ccmregs, reg, val);
527 uint32_t reg; local
531 reg = ccm_read_4(ccm_softc, CCMC_CCGR(group));
532 reg
540 uint32_t reg; local
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H A Dimx6_sdma.c211 int reg; local
214 reg = READ4(sc, SDMAARM_EVTOVR);
216 reg |= (1 << chn);
218 reg &= ~(1 << chn);
219 WRITE4(sc, SDMAARM_EVTOVR, reg);
222 reg = READ4(sc, SDMAARM_HOSTOVR);
224 reg |= (1 << chn);
226 reg &= ~(1 << chn);
227 WRITE4(sc, SDMAARM_HOSTOVR, reg);
230 reg
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/freebsd-11-stable/sys/cddl/contrib/opensolaris/uts/powerpc/dtrace/
H A Dfasttrap_isa.c191 fasttrap_anarg(struct reg *rp, int argno)
219 struct reg r;
230 struct reg r;
238 fasttrap_usdt_args(fasttrap_probe_t *probe, struct reg *rp, int argc,
263 fasttrap_return_common(struct reg *rp, uintptr_t pc, pid_t pid,
309 fasttrap_branch_taken(int bo, int bi, struct reg *regs)
333 struct reg reg, *rp; local
344 fill_regs(curthread, &reg);
345 rp = &reg;
525 struct reg reg, *rp; local
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/freebsd-11-stable/contrib/binutils/include/opcode/
H A Dcr16.h44 reg; typedef in typeref:enum:__anon578
75 CR16_RP_REGTYPE, /* reg pair */
275 reg r;
277 reg rp;
279 reg i_r;
353 reg reg_val;
/freebsd-11-stable/sys/dev/sound/isa/
H A Dsb8.c90 static int sb_rd(struct sb_info *sb, int reg);
91 static void sb_wr(struct sb_info *sb, int reg, u_int8_t val);
140 sb_rd(struct sb_info *sb, int reg) argument
142 return port_rd(sb->io_base, reg);
146 sb_wr(struct sb_info *sb, int reg, u_int8_t val) argument
148 port_wr(sb->io_base, reg, val);
333 int reg, max; local
339 reg = 0x04;
343 reg = 0x0a;
348 reg
426 int reg, max; local
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/freebsd-11-stable/sys/dev/sound/macio/
H A Di2s.c89 struct resource *reg; member in struct:i2s_softc
213 sc->reg = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
214 if (sc->reg == NULL)
452 u_int reg = 0, x, wordformat; local
472 reg = clksrc[i].cs_reg;
477 if (reg == 0)
495 reg |= (x << 24) & MCLK_DIV_MASK;
508 reg |= (x << 20) & SCLK_DIV_MASK;
514 reg |= SCLK_MASTER;
518 reg |
618 u_int reg; local
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/freebsd-11-stable/sys/x86/include/
H A Dreg.h33 * from: @(#)reg.h 5.5 (Berkeley) 1/18/91
34 * $FreeBSD: stable/11/sys/x86/include/reg.h 338691 2018-09-14 23:21:52Z jhb $
84 #define __reg32 reg
89 #define __reg64 reg
250 int fill_regs(struct thread *, struct reg *);
251 int fill_frame_regs(struct trapframe *, struct reg *);
252 int set_regs(struct thread *, struct reg *);
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Process/minidump/
H A DRegisterContextMinidump_x86_64.cpp20 const RegisterInfo &reg) {
21 auto bytes = reg.mutable_data(context);
23 switch (reg.kinds[lldb::eRegisterKindLLDB]) {
42 const RegisterInfo &reg) {
43 llvm::MutableArrayRef<uint8_t> reg_dest = getDestRegister(context, reg);
19 getDestRegister(uint8_t *context, const RegisterInfo &reg) argument
41 writeRegister(const void *reg_src, uint8_t *context, const RegisterInfo &reg) argument
/freebsd-11-stable/sys/dev/jme/
H A Dif_jme.c215 jme_miibus_readreg(device_t dev, int phy, int reg) argument
228 SMI_PHY_ADDR(phy) | SMI_REG_ADDR(reg));
236 device_printf(sc->jme_dev, "phy read timeout : %d\n", reg);
247 jme_miibus_writereg(device_t dev, int phy, int reg, int val) argument
260 SMI_PHY_ADDR(phy) | SMI_REG_ADDR(reg));
268 device_printf(sc->jme_dev, "phy write timeout : %d\n", reg);
354 uint32_t reg; local
359 reg = CSR_READ_4(sc, JME_SMBCSR);
360 if ((reg & SMBCSR_HW_BUSY_MASK) == SMBCSR_HW_IDLE)
370 reg
394 uint8_t fup, reg, val; local
440 uint32_t reg; local
629 uint32_t reg; local
1977 uint32_t reg; local
2767 uint32_t reg; local
3072 uint32_t reg; local
3092 uint32_t reg; local
3225 uint32_t reg; local
3333 uint32_t reg; local
3371 uint32_t reg; local
3388 uint32_t reg; local
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/freebsd-11-stable/contrib/gcc/
H A Dbt-load.c27 #include "hard-reg-set.h"
69 2. A list of branch reg definitions per basic block (head is
71 3. A list of all branch reg definitions belonging to the same
328 "Found target reg definition: sets %u { bb %d, insn %d }%s priority %d\n",
372 fprintf (dump_file, "Uses target reg: { bb %d, insn %d }",
376 fprintf (dump_file, ": unambiguous use of reg %d\n",
387 int reg;
388 for (reg = 0; reg < FIRST_PSEUDO_REGISTER; reg
386 int reg; local
468 int reg; local
540 int reg; local
715 int reg; local
1404 int reg; local
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/freebsd-11-stable/sys/dev/dc/
H A Ddcphy.c73 #define DC_SETBIT(sc, reg, x) \
74 CSR_WRITE_4(sc, reg, \
75 CSR_READ_4(sc, reg) | x)
77 #define DC_CLRBIT(sc, reg, x) \
78 CSR_WRITE_4(sc, reg, \
79 CSR_READ_4(sc, reg) & ~x)
191 int reg; local
263 reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
264 if (!(reg & DC_TSTAT_LS10) || !(reg
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/freebsd-11-stable/sys/dev/e1000/
H A De1000_82571.c1272 u32 reg; local
1277 reg = E1000_READ_REG(hw, E1000_TXDCTL(0));
1278 reg |= (1 << 22);
1279 E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg);
1282 reg = E1000_READ_REG(hw, E1000_TXDCTL(1));
1283 reg |= (1 << 22);
1284 E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg);
1287 reg = E1000_READ_REG(hw, E1000_TARC(0));
1288 reg &= ~(0xF << 27); /* 30:27 */
1292 reg |
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/freebsd-11-stable/sys/dev/tsec/
H A Dif_tsec.h253 #define TSEC_READ(sc, reg) \
254 bus_space_read_4((sc)->sc_bas.bst, (sc)->sc_bas.bsh, (reg))
255 #define TSEC_WRITE(sc, reg, val) \
256 bus_space_write_4((sc)->sc_bas.bst, (sc)->sc_bas.bsh, (reg), (val))
261 #define TSEC_PHY_READ(sc, reg) \
263 (reg) + (sc)->phy_regoff)
264 #define TSEC_PHY_WRITE(sc, reg, val) \
266 (reg) + (sc)->phy_regoff, (val))
378 int tsec_miibus_readreg(device_t dev, int phy, int reg);
379 int tsec_miibus_writereg(device_t dev, int phy, int reg, in
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DCalcSpillWeights.cpp50 // Return the preferred allocation register for reg, given a COPY instruction.
51 static Register copyHint(const MachineInstr *mi, unsigned reg, argument
56 if (mi->getOperand(0).getReg() == reg) {
72 const TargetRegisterClass *rc = mri.getRegClass(reg);
77 // Check if reg:sub matches so that a super register could be hinted.
89 unsigned Reg = LI.reg;
162 std::pair<unsigned, unsigned> TargetHint = mri.getRegAllocationHint(li.reg);
207 I = mri.reg_instr_begin(li.reg), E = mri.reg_instr_end();
234 std::tie(reads, writes) = mi->readsWritesVirtualRegister(li.reg);
247 Register hint = copyHint(mi, li.reg, tr
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/freebsd-11-stable/sys/cddl/contrib/opensolaris/uts/intel/dtrace/
H A Dfasttrap_isa.c53 #include <machine/reg.h>
104 #define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm))
222 static ulong_t fasttrap_getreg(struct reg *, uint_t);
225 fasttrap_anarg(struct reg *rp, int function_entry, int argno)
413 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]); local
416 if (reg == 2 || reg == 4) {
419 if (reg == 2)
612 uint_t reg local
972 struct reg reg, *rp; local
1641 greg_t *reg = NULL; local
1804 struct reg reg, *rp; local
1865 fasttrap_getreg(struct reg *rp, uint_t reg) argument
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/freebsd-11-stable/contrib/binutils/binutils/
H A Ddwarf.c2837 frame_need_space (Frame_Chunk *fc, int reg) argument
2841 if (reg < fc->ncols)
2844 fc->ncols = reg + 1;
3230 unsigned long reg, tmp; local
3266 reg = LEB (); LEB ();
3267 frame_need_space (fc, reg);
3268 fc->col_type[reg] = DW_CFA_undefined;
3271 reg = LEB ();
3272 frame_need_space (fc, reg);
3273 fc->col_type[reg]
3347 unsigned long ul, reg, roffs; local
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/freebsd-11-stable/lib/libc/sparc64/fpu/
H A Dfpu.c274 u_long reg, fsr; local
318 reg = __emul_fetch_reg(uf, IF_F4_RS1(insn));
319 if (reg == 0)
323 reg = __emul_fetch_reg(uf, IF_F4_RS1(insn));
324 if (reg <= 0)
328 reg = __emul_fetch_reg(uf, IF_F4_RS1(insn));
329 if (reg < 0)
333 reg = __emul_fetch_reg(uf, IF_F4_RS1(insn));
334 if (reg != 0)
338 reg
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/freebsd-11-stable/sys/mips/adm5120/
H A Dadmpci.c195 admpci_make_addr(int bus, int slot, int func, int reg) argument
198 return (0x80000000 | (bus << 16) | (slot << 11) | (func << 8) | reg);
202 admpci_read_config(device_t dev, int bus, int slot, int func, int reg, argument
210 ADMPCI_DPRINTF("%s: sc %p tag (%x, %x, %x) reg %d\n", __func__,
211 (void *)sc, bus, slot, func, reg);
213 addr = admpci_make_addr(bus, slot, func, reg);
221 switch (reg % 4) {
243 if (reg % 4 == 0)
260 admpci_write_config(device_t dev, int bus, int slot, int func, int reg, argument
268 ADMPCI_DPRINTF("%s: sc %p tag (%x, %x, %x) reg
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/freebsd-11-stable/sys/mips/cavium/octe/
H A Dmv88e61xxphy.c93 #define MV88E61XX_READ(sc, phy, reg) \
94 MIIBUS_READREG(device_get_parent((sc)->sc_dev), (phy), (reg))
96 #define MV88E61XX_WRITE(sc, phy, reg, val) \
97 MIIBUS_WRITEREG(device_get_parent((sc)->sc_dev), (phy), (reg), (val))
99 #define MV88E61XX_READ_PORT(psc, reg) \
100 MV88E61XX_READ((psc)->sc_switch, MV88E61XX_PORT((psc)->sc_port), (reg))
102 #define MV88E61XX_WRITE_PORT(psc, reg, val) \
103 MV88E61XX_WRITE((psc)->sc_switch, MV88E61XX_PORT((psc)->sc_port), (reg), (val))
566 unsigned shift, reg; local
588 reg
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/freebsd-11-stable/sys/mips/idt/
H A Didtpci.c130 idtpci_make_addr(int bus, int slot, int func, int reg) argument
133 return 0x80000000 | (bus << 16) | (slot << 11) | (func << 8) | reg;
289 idtpci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, argument
296 IDTPCI_DPRINTF("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__,
297 bus, slot, func, reg, bytes);
299 addr = idtpci_make_addr(bus, slot, func, reg);
304 switch (reg % 4) {
326 if (reg % 4 == 0)
345 idtpci_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, argument
352 IDTPCI_DPRINTF("%s: tag (%x, %x, %x) reg
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/freebsd-11-stable/sys/dev/iwm/
H A Dif_iwm_pcie_trans.c238 iwm_poll_bit(struct iwm_softc *sc, int reg, argument
242 if ((IWM_READ(sc, reg) & mask) == (bits & mask)) {
294 uint32_t reg, uint32_t bits, uint32_t mask)
300 val = iwm_read_prph(sc, reg) & mask;
302 iwm_write_prph(sc, reg, val);
308 iwm_set_bits_prph(struct iwm_softc *sc, uint32_t reg, uint32_t bits) argument
310 iwm_set_bits_mask_prph(sc, reg, bits, ~0);
314 iwm_clear_bits_prph(struct iwm_softc *sc, uint32_t reg, uint32_t bits) argument
316 iwm_set_bits_mask_prph(sc, reg, 0, ~bits);
409 uint16_t reg; local
293 iwm_set_bits_mask_prph(struct iwm_softc *sc, uint32_t reg, uint32_t bits, uint32_t mask) argument
[all...]
/freebsd-11-stable/usr.sbin/bhyve/
H A Duart_emul.c521 uint8_t iir, intr_reason, reg; local
530 reg = sc->dll;
535 reg = sc->dlh;
542 reg = rxfifo_getchar(sc);
545 reg = sc->ier;
560 reg = iir;
563 reg = sc->lcr;
566 reg = sc->mcr;
578 reg = sc->lsr;
587 reg
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