/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | Utils.h | 155 const unsigned Op2,
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | DFAPacketizer.h | 194 bool alias(const MachineMemOperand &Op1, const MachineMemOperand &Op2,
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H A D | ISDOpcodes.h | 1125 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, EVT Type); 1130 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, EVT Type);
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H A D | SelectionDAG.h | 895 SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, argument 901 Ops.push_back(Op2); 1216 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2); 1217 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 1219 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 1221 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 1245 SDValue Op1, SDValue Op2); 1247 SDValue Op1, SDValue Op2, SDValue Op3); 1258 EVT VT2, SDValue Op1, SDValue Op2); 1282 SDValue Op1, SDValue Op2); [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64InstPrinter.cpp | 77 const MCOperand &Op2 = MI->getOperand(2); local 82 if (Op2.isImm() && Op2.getImm() == 0 && Op3.isImm()) { 118 if (Op2.isImm() && Op3.isImm()) { 121 int64_t immr = Op2.getImm(); 152 if (Op2.getImm() > Op3.getImm()) { 155 << ", #" << (Is64Bit ? 64 : 32) - Op2.getImm() << ", #" << Op3.getImm() + 1; 163 << ", #" << Op2.getImm() << ", #" << Op3.getImm() - Op2.getImm() + 1; 170 const MCOperand &Op2 local 772 const MCOperand &Op2 = MI->getOperand(3); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrBuilder.h | 107 const MachineOperand &Op2 = MI->getOperand(Operand + 2); local 108 AM.IndexReg = Op2.getReg();
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H A D | X86AvoidStoreForwardingBlocks.cpp | 113 bool alias(const MachineMemOperand &Op1, const MachineMemOperand &Op2) const; 523 const MachineMemOperand &Op2) const { 524 if (!Op1.getValue() || !Op2.getValue()) 527 int64_t MinOffset = std::min(Op1.getOffset(), Op2.getOffset()); 529 int64_t Overlapb = Op2.getSize() + Op2.getOffset() - MinOffset; 533 MemoryLocation(Op2.getValue(), Overlapb, Op2.getAAInfo()));
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H A D | X86OptimizeLEAs.cpp | 404 const MachineOperand &Op2 = MI2.getOperand(N2 + X86::AddrDisp); local 406 assert(isSimilarDispOp(Op1, Op2) && 414 return Op1.isImm() ? Op1.getImm() - Op2.getImm() 415 : Op1.getOffset() - Op2.getOffset();
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | NaryReassociate.cpp | 498 Value *&Op1, Value *&Op2) { 501 return match(V, m_Add(m_Value(Op1), m_Value(Op2))); 503 return match(V, m_Mul(m_Value(Op1), m_Value(Op2))); 497 matchTernaryOp(BinaryOperator *I, Value *V, Value *&Op1, Value *&Op2) argument
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H A D | LoopRerollPass.cpp | 1350 Value *Op2 = RootInst->getOperand(j); local 1356 if (Instruction *Op2I = dyn_cast<Instruction>(Op2)) 1360 DenseMap<Value *, Value *>::iterator BMI = BaseMap.find(Op2); 1362 Op2 = BMI->second; 1365 if (DRS.Roots[Iter-1] == (Instruction*) Op2) { 1366 Op2 = DRS.BaseInst; 1372 if (BaseInst->getOperand(Swapped ? unsigned(!j) : j) != Op2) { 1379 BaseInst->getOperand(!j) == Op2) {
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H A D | Scalarizer.cpp | 580 Scatterer Op2 = scatter(&SI, SI.getOperand(2)); local 582 assert(Op2.size() == NumElems && "Mismatched select"); 590 Res[I] = Builder.CreateSelect(Op0[I], Op1[I], Op2[I], 595 Res[I] = Builder.CreateSelect(Op0, Op1[I], Op2[I],
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | PatternMatch.h | 1209 T1 Op2; member in struct:llvm::PatternMatch::TwoOps_match 1211 TwoOps_match(const T0 &Op1, const T1 &Op2) : Op1(Op1), Op2(Op2) {} argument 1216 return Op1.match(I->getOperand(0)) && Op2.match(I->getOperand(1)); 1226 T1 Op2; member in struct:llvm::PatternMatch::ThreeOps_match 1229 ThreeOps_match(const T0 &Op1, const T1 &Op2, const T2 &Op3) argument 1230 : Op1(Op1), Op2(Op2), Op3(Op3) {} 1235 return Op1.match(I->getOperand(0)) && Op2 1786 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2) argument 1793 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2, const T3 &Op3) argument 1800 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2, const T3 &Op3, const T4 &Op4) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/ |
H A D | BuildLibCalls.h | 165 /// function is known to take type matching 'Op1' and 'Op2' and return one 166 /// value with the same type. If 'Op1/Op2' are long double, 'l' is added as 167 /// the suffix of name, if 'Op1/Op2' are float, we add a 'f' suffix. 168 Value *emitBinaryFloatFnCall(Value *Op1, Value *Op2, StringRef Name, 173 Value *emitBinaryFloatFnCall(Value *Op1, Value *Op2,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFMISimplifyPatchable.cpp | 92 const MachineOperand *Op2 = &Inst->getOperand(2); local 93 const MachineOperand *BaseOp = (RelocOp == Op1) ? Op2 : Op1;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/ |
H A D | X86AsmParser.cpp | 248 ICToken Op2 = OperandStack.pop_back_val(); local 255 Val = Op1.second + Op2.second; 259 Val = Op1.second - Op2.second; 263 assert (Op1.first == IC_IMM && Op2.first == IC_IMM && 265 Val = Op1.second * Op2.second; 269 assert (Op1.first == IC_IMM && Op2.first == IC_IMM && 271 assert (Op2.second != 0 && "Division by zero!"); 272 Val = Op1.second / Op2.second; 276 assert (Op1.first == IC_IMM && Op2.first == IC_IMM && 278 Val = Op1.second % Op2 2753 X86Operand &Op2 = (X86Operand &)*Operands[2]; local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | ConstantFolding.cpp | 2038 if (auto *Op2 = dyn_cast<ConstantFP>(Operands[1])) { 2039 if (Op2->getType() != Op1->getType()) 2042 double Op2V = getValueAsDouble(Op2); 2048 const APFloat &V2 = Op2->getValueAPF(); 2055 const APFloat &C2 = Op2->getValueAPF(); 2061 const APFloat &C2 = Op2->getValueAPF(); 2067 const APFloat &C2 = Op2->getValueAPF(); 2073 const APFloat &C2 = Op2->getValueAPF(); 2096 if (APFloat::opStatus::opOK == V.mod(Op2->getValueAPF())) 2287 if (const auto *Op2 [all...] |
H A D | IVDescriptors.cpp | 543 Value *Op1, *Op2; 544 if ((m_FAdd(m_Value(Op1), m_Value(Op2)).match(I1) || 545 m_FSub(m_Value(Op1), m_Value(Op2)).match(I1)) && 549 if (m_FMul(m_Value(Op1), m_Value(Op2)).match(I1) && (I1->isFast()))
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 1007 SDValue Op2 = Node->getOperand(2); local 1010 && Op1.getValueType() == Op2.getValueType() && "Invalid type"); 1041 Op2 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op2); 1048 Op2 = DAG.getNode(ISD::AND, DL, MaskTy, Op2, NotMask); 1049 SDValue Val = DAG.getNode(ISD::OR, DL, MaskTy, Op1, Op2); 1257 SDValue Op2 = Node->getOperand(2); local 1285 Op2 = DAG.getNode(ISD::BITCAST, DL, VT, Op2); [all...] |
H A D | LegalizeIntegerTypes.cpp | 241 SDValue Op2 = GetPromotedInteger(N->getOperand(2)); local 245 Op2, N->getMemOperand()); 274 // Op2 is used for the comparison and thus must be extended according to the 276 SDValue Op2 = N->getOperand(2); local 283 Op2 = SExtPromotedInteger(Op2); 285 Op2 = GetPromotedInteger(Op2); 289 DAG.getVTList(Op2.getValueType(), N->getValueType(1), MVT::Other); 292 N->getBasePtr(), Op2, Op 687 SDValue Op2 = N->getOperand(1); local 1414 SDValue Op2 = GetPromotedInteger(N->getOperand(2)); local 1715 SDValue Op2 = ZExtPromotedInteger(N->getOperand(2)); local 1730 SDValue Op2 = ZExtPromotedInteger(N->getOperand(2)); local 2108 unsigned Op1, Op2; local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonNewValueJump.cpp | 251 const MachineOperand &Op2 = MI.getOperand(2); local 252 if (!Op2.isImm()) 255 int64_t v = Op2.getImm();
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCExpandISEL.cpp | 87 bool useSameRegister(const MachineOperand &Op1, const MachineOperand &Op2) { argument 88 return (Op1.getReg() == Op2.getReg());
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H A D | PPCMIPeephole.cpp | 767 MachineOperand Op2 = MI.getOperand(2); local 768 if (isSingleUsePHI(&Op2) && dominatesAllSingleUseLIs(&Op1, &Op2)) 769 std::swap(Op1, Op2); 770 else if (!isSingleUsePHI(&Op1) || !dominatesAllSingleUseLIs(&Op2, &Op1)) 773 // Now we know that Op1 is the PHI node and Op2 is the dominator 774 Register DominatorReg = Op2.getReg(); 1435 Register Op2 = CMPI2->getOperand(2).getReg(); local 1436 CMPI2->getOperand(1).setReg(Op2);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | Utils.cpp | 339 const unsigned Op2, 342 auto MaybeOp2Cst = getConstantVRegVal(Op2, MRI); 338 ConstantFoldBinOp(unsigned Opcode, const unsigned Op1, const unsigned Op2, const MachineRegisterInfo &MRI) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | BuildLibCalls.cpp | 1084 static Value *emitBinaryFloatFnCallHelper(Value *Op1, Value *Op2, argument 1091 Op1->getType(), Op2->getType()); 1092 CallInst *CI = B.CreateCall(Callee, { Op1, Op2 }, Name); 1107 Value *llvm::emitBinaryFloatFnCall(Value *Op1, Value *Op2, StringRef Name, argument 1114 return emitBinaryFloatFnCallHelper(Op1, Op2, Name, B, Attrs); 1117 Value *llvm::emitBinaryFloatFnCall(Value *Op1, Value *Op2, argument 1126 return emitBinaryFloatFnCallHelper(Op1, Op2, Name, B, Attrs);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 259 const MCParsedAsmOperand &Op2) const override; 2868 const uint16_t Op2 = Encoding & 7; local 2881 Expr = MCConstantExpr::create(Op2, getContext()); 3722 const MCParsedAsmOperand &Op2) const { 3724 auto &AOp2 = static_cast<const AArch64Operand&>(Op2); 3727 return MCTargetAsmParser::regsEqual(Op1, Op2); 3734 return getXRegFromWReg(Op1.getReg()) == Op2.getReg(); 3736 return getWRegFromXReg(Op1.getReg()) == Op2.getReg(); 3738 return getXRegFromWReg(Op2.getReg()) == Op1.getReg(); 3740 return getWRegFromXReg(Op2 4508 AArch64Operand &Op2 = static_cast<AArch64Operand &>(*Operands[2]); local 4717 AArch64Operand &Op2 = static_cast<AArch64Operand &>(*Operands[2]); local [all...] |