/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | MachineRegisterInfo.h | 974 MachineOperand *Op = nullptr; member in class:llvm::MachineRegisterInfo::defusechain_iterator 976 explicit defusechain_iterator(MachineOperand *op) : Op(op) { 988 assert(Op && "Cannot increment end iterator!"); 989 Op = getNextOperandForReg(Op); 993 if (Op) { 994 if (Op->isUse()) 995 Op = nullptr; 997 assert(!Op->isDebug() && "Can't have debug defs"); 1001 while (Op 1080 MachineOperand *Op = nullptr; member in class:llvm::MachineRegisterInfo::defusechain_instr_iterator [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 331 /// G8RC = ADDI_TLSGD_L_ADDR G8RReg, Symbol, Symbol - Op that 352 /// G8RC = ADDI_TLSLD_L_ADDR G8RReg, Symbol, Symbol - Op that 739 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 758 void computeKnownBitsForTargetNode(const SDValue Op, 816 void LowerAsmOperandForConstraint(SDValue Op, 1005 bool canReuseLoadAddress(SDValue Op, EVT MemVT, ReuseLoadInfo &RLI, 1011 void LowerFP_TO_INTForReuse(SDValue Op, ReuseLoadInfo &RLI, 1013 SDValue LowerFP_TO_INTDirectMove(SDValue Op, SelectionDAG &DAG, 1016 bool directMoveIsProfitable(const SDValue &Op) const; 1017 SDValue LowerINT_TO_FPDirectMove(SDValue Op, SelectionDA [all...] |
/freebsd-11-stable/sys/contrib/dev/acpica/components/dispatcher/ |
H A D | dsfield.c | 172 ACPI_PARSE_OBJECT *Op, 191 * Op - Op containing the Field definition and args 206 ACPI_PARSE_OBJECT *Op, 225 AcpiDmAddOpToExternalList (Op, Path, ACPI_TYPE_REGION, 0, 0); 253 * PARAMETERS: Op - Current parse op (CreateXXField) 270 ACPI_PARSE_OBJECT *Op, 287 if (Op->Common.AmlOpcode == AML_CREATE_FIELD_OP) 291 Arg = AcpiPsGetArg (Op, 3); 297 Arg = AcpiPsGetArg (Op, 204 AcpiDsCreateExternalRegion( ACPI_STATUS LookupStatus, ACPI_PARSE_OBJECT *Op, char *Path, ACPI_WALK_STATE *WalkState, ACPI_NAMESPACE_NODE **Node) argument 269 AcpiDsCreateBufferField( ACPI_PARSE_OBJECT *Op, ACPI_WALK_STATE *WalkState) argument 617 AcpiDsCreateField( ACPI_PARSE_OBJECT *Op, ACPI_NAMESPACE_NODE *RegionNode, ACPI_WALK_STATE *WalkState) argument 685 AcpiDsInitFieldObjects( ACPI_PARSE_OBJECT *Op, ACPI_WALK_STATE *WalkState) argument 815 AcpiDsCreateBankField( ACPI_PARSE_OBJECT *Op, ACPI_NAMESPACE_NODE *RegionNode, ACPI_WALK_STATE *WalkState) argument 909 AcpiDsCreateIndexField( ACPI_PARSE_OBJECT *Op, ACPI_NAMESPACE_NODE *RegionNode, ACPI_WALK_STATE *WalkState) argument [all...] |
H A D | dsargs.c | 196 ACPI_PARSE_OBJECT *Op; local 205 Op = AcpiPsAllocOp (AML_INT_EVAL_SUBTREE_OP, AmlStart); 206 if (!Op) 213 Op->Common.Node = ScopeNode; 224 Status = AcpiDsInitAmlWalk (WalkState, Op, NULL, AmlStart, 245 /* Get and init the Op created above */ 247 Op->Common.Node = Node; 248 AcpiPsDeleteParseTree (Op); 252 Op = AcpiPsAllocOp (AML_INT_EVAL_SUBTREE_OP, AmlStart); 253 if (!Op) [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | MIRVRegNamerUtils.cpp | 108 for (const auto *Op : MI.memoperands()) { 109 MIOperands.push_back((unsigned)Op->getSize()); 110 MIOperands.push_back((unsigned)Op->getFlags()); 111 MIOperands.push_back((unsigned)Op->getOffset()); 112 MIOperands.push_back((unsigned)Op->getOrdering()); 113 MIOperands.push_back((unsigned)Op->getAddrSpace()); 114 MIOperands.push_back((unsigned)Op->getSyncScopeID()); 115 MIOperands.push_back((unsigned)Op->getBaseAlignment()); 116 MIOperands.push_back((unsigned)Op->getFailureOrdering());
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.h | 83 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 89 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const; 90 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 91 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 92 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const; 93 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 94 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const; 95 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 96 SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) const; 97 SDValue LowerRETURNADDR(SDValue Op, SelectionDA [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CodeGenInstruction.h | 45 static ConstraintInfo getTied(unsigned Op) { argument 48 I.OtherTiedOperand = Op; 184 std::pair<unsigned,unsigned> ParseOperandName(const std::string &Op, 189 unsigned getFlattenedOperandNumber(std::pair<unsigned,unsigned> Op) const { 190 return OperandList[Op.first].MIOperandNo + Op.second; 195 std::pair<unsigned,unsigned> getSubOperandNumber(unsigned Op) const { 198 if (OperandList[i].MIOperandNo+OperandList[i].MINumOperands > Op) 199 return std::make_pair(i, Op-OperandList[i].MIOperandNo); 207 std::pair<unsigned,unsigned> Op local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUAtomicOptimizer.cpp | 35 AtomicRMWInst::BinOp Op; member in struct:__anon2070::ReplacementInfo 50 Value *buildScan(IRBuilder<> &B, AtomicRMWInst::BinOp Op, Value *V, 53 void optimizeAtomic(Instruction &I, AtomicRMWInst::BinOp Op, unsigned ValIdx, 99 optimizeAtomic(*Info.I, Info.Op, Info.ValIdx, Info.ValDivergent); 117 AtomicRMWInst::BinOp Op = I.getOperation(); local 119 switch (Op) { 157 const ReplacementInfo Info = {&I, Op, ValIdx, ValDivergent}; 163 AtomicRMWInst::BinOp Op; local 171 Op = AtomicRMWInst::Add; 176 Op 246 buildNonAtomicBinOp(IRBuilder< &B, AtomicRMWInst::BinOp Op, Value *LHS, Value *RHS) argument 283 buildScan(IRBuilder< &B, AtomicRMWInst::BinOp Op, Value *V, Value *const Identity) const argument 386 getIdentityValueForAtomicOp(AtomicRMWInst::BinOp Op, unsigned BitWidth) argument 407 optimizeAtomic(Instruction &I, AtomicRMWInst::BinOp Op, unsigned ValIdx, bool ValDivergent) const argument [all...] |
/freebsd-11-stable/sys/contrib/dev/acpica/components/executer/ |
H A D | extrace.c | 450 * PARAMETERS: Op - The parser opcode object 462 ACPI_PARSE_OBJECT *Op, 473 Op->Common.Aml, Op->Common.AmlOpName); 482 * PARAMETERS: Op - The parser opcode object 494 ACPI_PARSE_OBJECT *Op, 505 Op->Common.Aml, Op->Common.AmlOpName); 461 AcpiExStartTraceOpcode( ACPI_PARSE_OBJECT *Op, ACPI_WALK_STATE *WalkState) argument 493 AcpiExStopTraceOpcode( ACPI_PARSE_OBJECT *Op, ACPI_WALK_STATE *WalkState) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 74 static MachineOperand earlyUseOperand(MachineOperand Op) { argument 75 if (Op.isReg()) 76 Op.setIsKill(false); 77 return Op; 1183 LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, argument 1190 if (auto *C = dyn_cast<ConstantSDNode>(Op)) 1192 Ops.push_back(DAG.getTargetConstant(C->getZExtValue(), SDLoc(Op), 1193 Op.getValueType())); 1197 if (auto *C = dyn_cast<ConstantSDNode>(Op)) 1199 Ops.push_back(DAG.getTargetConstant(C->getZExtValue(), SDLoc(Op), 1744 isIntrinsicWithCCAndChain(SDValue Op, unsigned &Opcode, unsigned &CCValid) argument 1771 isIntrinsicWithCC(SDValue Op, unsigned &Opcode, unsigned &CCValid) argument 1929 emitIntrinsicWithCCAndChain(SelectionDAG &DAG, SDValue Op, unsigned Opcode) argument 1949 emitIntrinsicWithCC(SelectionDAG &DAG, SDValue Op, unsigned Opcode) argument 2085 isNaturalMemoryOperand(SDValue Op, unsigned ICmpType) argument 3215 lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const argument 3239 lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const argument 3262 lowerBITCAST(SDValue Op, SelectionDAG &DAG) const argument 3312 lowerVASTART(SDValue Op, SelectionDAG &DAG) const argument 3348 lowerVACOPY(SDValue Op, SelectionDAG &DAG) const argument 3364 lowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const argument 3429 lowerGET_DYNAMIC_AREA_OFFSET( SDValue Op, SelectionDAG &DAG) const argument 3436 lowerSMUL_LOHI(SDValue Op, SelectionDAG &DAG) const argument 3484 lowerUMUL_LOHI(SDValue Op, SelectionDAG &DAG) const argument 3503 lowerSDIVREM(SDValue Op, SelectionDAG &DAG) const argument 3525 lowerUDIVREM(SDValue Op, SelectionDAG &DAG) const argument 3538 lowerOR(SDValue Op, SelectionDAG &DAG) const argument 3594 lowerXALUO(SDValue Op, SelectionDAG &DAG) const argument 3651 lowerADDSUBCARRY(SDValue Op, SelectionDAG &DAG) const argument 3704 lowerCTPOP(SDValue Op, SelectionDAG &DAG) const argument 3778 lowerATOMIC_FENCE(SDValue Op, SelectionDAG &DAG) const argument 3800 lowerATOMIC_LOAD(SDValue Op, SelectionDAG &DAG) const argument 3809 lowerATOMIC_STORE(SDValue Op, SelectionDAG &DAG) const argument 3825 lowerATOMIC_LOAD_OP(SDValue Op, SelectionDAG &DAG, unsigned Opcode) const argument 3899 lowerATOMIC_LOAD_SUB(SDValue Op, SelectionDAG &DAG) const argument 3934 lowerATOMIC_CMP_SWAP(SDValue Op, SelectionDAG &DAG) const argument 4018 lowerSTACKSAVE(SDValue Op, SelectionDAG &DAG) const argument 4029 lowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG) const argument 4057 lowerPREFETCH(SDValue Op, SelectionDAG &DAG) const argument 4084 lowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const argument 4099 lowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const argument 4409 SDValue Op; local 4484 add(SDValue Op, unsigned Elem) argument 4614 SDValue Op; local 4623 isScalarToVector(SDValue Op) argument 4698 SDValue Op = BVN->getOperand(I); local 4813 SDValue Op = DAG.getNode(SystemZISD::MERGE_HIGH, local 4887 lowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const argument 4917 lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const argument 5445 combineExtract(const SDLoc &DL, EVT ResVT, EVT VecVT, SDValue Op, unsigned Index, DAGCombinerInfo &DCI, bool Force) const argument 5551 combineTruncateExtract( const SDLoc &DL, EVT TruncVT, SDValue Op, DAGCombinerInfo &DCI) const argument 5690 SDValue Op = DAG.getNode(Opcode, SDLoc(N), OutVT, Op1); local 6100 SDValue Op = N->getOperand(0); local 6409 getDemandedSrcElements(SDValue Op, const APInt &DemandedElts, unsigned OpNo) argument 6506 computeKnownBitsBinOp(const SDValue Op, KnownBits &Known, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth, unsigned OpNo) argument 6521 computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth) const argument 6615 computeNumSignBitsBinOp(SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth, unsigned OpNo) argument 6639 ComputeNumSignBitsForTargetNode( SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth) const argument [all...] |
/freebsd-11-stable/sys/contrib/dev/acpica/compiler/ |
H A D | aslexternal.c | 167 ACPI_PARSE_OBJECT *Op); 178 * PARAMETERS: Op - Current Parse node 189 ACPI_PARSE_OBJECT *Op) 197 ArgCountOp = Op->Asl.Child->Asl.Next->Asl.Next; 209 ListOp->Asl.Child = Op; 237 * PARAMETERS: Op - Op for a method invocation 248 ACPI_PARSE_OBJECT *Op) 260 CallName = AcpiNsGetNormalizedPathname (Op->Asl.Node, TRUE); 306 Child = Op 188 ExDoExternal( ACPI_PARSE_OBJECT *Op) argument 247 ExInsertArgCount( ACPI_PARSE_OBJECT *Op) argument 337 ExAmlExternalWalkBegin( ACPI_PARSE_OBJECT *Op, UINT32 Level, void *Context) argument 391 ExAmlExternalWalkEnd( ACPI_PARSE_OBJECT *Op, UINT32 Level, void *Context) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
H A D | LanaiAsmParser.cpp | 584 auto Op = std::make_unique<LanaiOperand>(TOKEN); local 585 Op->Tok.Data = Str.data(); 586 Op->Tok.Length = Str.size(); 587 Op->StartLoc = Start; 588 Op->EndLoc = Start; 589 return Op; 594 auto Op = std::make_unique<LanaiOperand>(REGISTER); local 595 Op->Reg.RegNum = RegNum; 596 Op->StartLoc = Start; 597 Op 603 auto Op = std::make_unique<LanaiOperand>(IMMEDIATE); local 611 MorphToMemImm(std::unique_ptr<LanaiOperand> Op) argument 622 MorphToMemRegReg(unsigned BaseReg, std::unique_ptr<LanaiOperand> Op, unsigned AluOp) argument 634 MorphToMemRegImm(unsigned BaseReg, std::unique_ptr<LanaiOperand> Op, unsigned AluOp) argument 713 std::unique_ptr<LanaiOperand> Op = parseRegister(); local 842 shouldBeSls(const LanaiOperand &Op) argument 890 std::unique_ptr<LanaiOperand> Op = parseRegister(); local 1014 std::unique_ptr<LanaiOperand> Op = parseRegister(); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/ |
H A D | MSP430MCCodeEmitter.cpp | 57 unsigned getMemOpValue(const MCInst &MI, unsigned Op, 61 unsigned getPCRelImmOpValue(const MCInst &MI, unsigned Op, 65 unsigned getCGImmOpValue(const MCInst &MI, unsigned Op, 69 unsigned getCCOpValue(const MCInst &MI, unsigned Op, 120 unsigned MSP430MCCodeEmitter::getMemOpValue(const MCInst &MI, unsigned Op, argument 123 const MCOperand &MO1 = MI.getOperand(Op); 127 const MCOperand &MO2 = MI.getOperand(Op + 1); 152 unsigned MSP430MCCodeEmitter::getPCRelImmOpValue(const MCInst &MI, unsigned Op, argument 155 const MCOperand &MO = MI.getOperand(Op); 165 unsigned MSP430MCCodeEmitter::getCGImmOpValue(const MCInst &MI, unsigned Op, argument 184 getCCOpValue(const MCInst &MI, unsigned Op, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/ |
H A D | PredicateInfo.h | 112 PredicateBase(PredicateType PT, Value *Op) : Type(PT), OriginalOp(Op) {} argument 124 PredicateWithCondition(PredicateType PT, Value *Op, Value *Condition) argument 125 : PredicateBase(PT, Op), Condition(Condition) {} 134 PredicateAssume(Value *Op, IntrinsicInst *AssumeInst, Value *Condition) argument 135 : PredicateWithCondition(PT_Assume, Op, Condition), 156 PredicateWithEdge(PredicateType PType, Value *Op, BasicBlock *From, argument 158 : PredicateWithCondition(PType, Op, Cond), From(From), To(To) {} 166 PredicateBranch(Value *Op, BasicBlock *BranchBB, BasicBlock *SplitBB, argument 168 : PredicateWithEdge(PT_Branch, Op, BranchB 181 PredicateSwitch(Value *Op, BasicBlock *SwitchBB, BasicBlock *TargetBB, Value *CaseValue, SwitchInst *SI) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.h | 81 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 87 unsigned ComputeNumSignBitsForTargetNode(SDValue Op, 103 void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, 193 SDValue lowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 194 SDValue lowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 195 SDValue lowerConstantPool(SDValue Op, SelectionDAG &DAG) const; 196 SDValue lowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; 197 SDValue lowerSELECT(SDValue Op, SelectionDAG &DAG) const; 198 SDValue lowerVASTART(SDValue Op, SelectionDAG &DAG) const; 199 SDValue lowerFRAMEADDR(SDValue Op, SelectionDA [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | Reassociate.cpp | 79 << *Ops[0].Op->getType() << '\t'; 82 Ops[i].Op->printAsOperand(dbgs(), false, M); 472 SmallVector<std::pair<Instruction*, APInt>, 8> Worklist; // (Op, Weight) 503 Value *Op = I->getOperand(OpIdx); local 505 LLVM_DEBUG(dbgs() << "OPERAND: " << *Op << " (" << Weight << ")\n"); 506 assert(!Op->use_empty() && "No uses, so how did we get to it?!"); 510 if (BinaryOperator *BO = isReassociableOp(Op, Opcode)) { 511 assert(Visited.insert(Op).second && "Not first visit!"); 512 LLVM_DEBUG(dbgs() << "DIRECT ADD: " << *Op << " (" << Weight << ")\n"); 518 LeafMap::iterator It = Leaves.find(Op); 652 BinaryOperator *Op = I; local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXReplaceImageHandles.cpp | 44 void replaceImageHandle(MachineOperand &Op, MachineFunction &MF); 45 bool findIndexForHandle(MachineOperand &Op, MachineFunction &MF, 125 replaceImageHandle(MachineOperand &Op, MachineFunction &MF) { argument 127 if (findIndexForHandle(Op, MF, Idx)) { 128 Op.ChangeToImmediate(Idx); 133 findIndexForHandle(MachineOperand &Op, MachineFunction &MF, unsigned &Idx) { argument 137 assert(Op.isReg() && "Handle is not in a reg?"); 140 MachineInstr &TexHandleDef = *MRI.getVRegDef(Op.getReg());
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H A D | NVPTXProxyRegErasure.cpp | 112 for (auto &Op : Instr.uses()) { 113 if (Op.isReg() && Op.getReg() == From.getReg()) { 114 Op.setReg(To.getReg());
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | MCInstBuilder.h | 61 MCInstBuilder &addOperand(const MCOperand &Op) { argument 62 Inst.addOperand(Op);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 306 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 408 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base, 412 void computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known, 417 bool targetShrinkDemandedConstant(SDValue Op, const APInt &Demanded, 440 void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, 659 std::pair<SDValue, SDValue> getARMXALUOOp(SDValue Op, SelectionDAG &DAG, SDValue &ARMcc) const; 681 SDValue LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const; 682 SDValue LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const; 683 SDValue LowerEH_SJLJ_SETUP_DISPATCH(SDValue Op, SelectionDAG &DAG) const; 684 SDValue LowerINTRINSIC_VOID(SDValue Op, SelectionDA [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyDebugValueManager.cpp | 50 MachineOperand &Op = DBI->getOperand(0); local 51 Op.ChangeToTargetIndex(llvm::WebAssembly::TI_LOCAL_START, LocalId);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Bitstream/Reader/ |
H A D | BitstreamReader.cpp | 68 const BitCodeAbbrevOp &Op) { 69 assert(!Op.isLiteral() && "Not to be used with literals!"); 72 switch (Op.getEncoding()) { 77 assert((unsigned)Op.getEncodingData() <= Cursor.MaxChunkSize); 78 return Cursor.Read((unsigned)Op.getEncodingData()); 80 assert((unsigned)Op.getEncodingData() <= Cursor.MaxChunkSize); 81 return Cursor.ReadVBR64((unsigned)Op.getEncodingData()); 129 const BitCodeAbbrevOp &Op = Abbv->getOperandInfo(i); local 130 if (Op.isLiteral()) 133 if (Op 67 readAbbreviatedField(BitstreamCursor &Cursor, const BitCodeAbbrevOp &Op) argument 245 const BitCodeAbbrevOp &Op = Abbv->getOperandInfo(i); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonExpandCondsets.cpp | 178 RegisterRef(const MachineOperand &Op) : Reg(Op.getReg()), argument 179 Sub(Op.getSubReg()) {} 320 MachineOperand &Op = MI->getOperand(i); 321 if (!Op.isReg() || !Op.isUse() || Op.getReg() != Reg || 324 LaneBitmask SLM = getLaneMask(Reg, Op.getSubReg()); 328 Op.setIsKill(true); 373 auto IsRegDef = [this,Reg,LM] (MachineOperand &Op) 498 MachineOperand &Op = DefI->getOperand(i); local [all...] |
H A D | HexagonISelLoweringHVX.cpp | 212 for (const SDValue &Op : Ops) 213 IntOps.push_back(Op); 1026 HexagonTargetLowering::LowerHvxBuildVector(SDValue Op, SelectionDAG &DAG) argument 1028 const SDLoc &dl(Op); 1029 MVT VecTy = ty(Op); 1031 unsigned Size = Op.getNumOperands(); 1034 Ops.push_back(Op.getOperand(i)); 1051 HexagonTargetLowering::LowerHvxConcatVectors(SDValue Op, SelectionDAG &DAG) argument 1056 MVT VecTy = ty(Op); 1057 const SDLoc &dl(Op); 1141 LowerHvxExtractElement(SDValue Op, SelectionDAG &DAG) const argument 1155 LowerHvxInsertElement(SDValue Op, SelectionDAG &DAG) const argument 1169 LowerHvxExtractSubvector(SDValue Op, SelectionDAG &DAG) const argument 1188 LowerHvxInsertSubvector(SDValue Op, SelectionDAG &DAG) const argument 1205 LowerHvxAnyExt(SDValue Op, SelectionDAG &DAG) const argument 1219 LowerHvxSignExt(SDValue Op, SelectionDAG &DAG) const argument 1229 LowerHvxZeroExt(SDValue Op, SelectionDAG &DAG) const argument 1239 LowerHvxCttz(SDValue Op, SelectionDAG &DAG) const argument 1274 LowerHvxMul(SDValue Op, SelectionDAG &DAG) const argument 1328 LowerHvxMulh(SDValue Op, SelectionDAG &DAG) const argument 1434 LowerHvxExtend(SDValue Op, SelectionDAG &DAG) const argument 1442 LowerHvxShift(SDValue Op, SelectionDAG &DAG) const argument 1449 SplitHvxPairOp(SDValue Op, SelectionDAG &DAG) const argument 1482 SplitHvxMemOp(SDValue Op, SelectionDAG &DAG) const argument 1525 LowerHvxOperation(SDValue Op, SelectionDAG &DAG) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/ObjCARC/ |
H A D | DependencyAnalysis.cpp | 55 for (const Value *Op : Call->args()) { 56 if (IsPotentialRetainableObjPtr(Op, *PA.getAA()) && 57 PA.related(Ptr, Op, DL)) 102 const Value *Op = *OI; local 103 if (IsPotentialRetainableObjPtr(Op, *PA.getAA()) && 104 PA.related(Ptr, Op, DL)) 111 const Value *Op = GetUnderlyingObjCPtr(SI->getPointerOperand(), DL); local 114 return IsPotentialRetainableObjPtr(Op, *PA.getAA()) && 115 PA.related(Op, Ptr, DL); 121 const Value *Op local [all...] |