Searched refs:FP (Results 101 - 107 of 107) sorted by relevance
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/freebsd-11-stable/contrib/llvm-project/clang/lib/Sema/ |
H A D | SemaExpr.cpp | 735 // Half FP have to be promoted to float unless it is natively supported 1117 // Half FP has to be promoted to float unless it is natively supported 13698 // Though we still have to promote half FP to float... 16808 } else if (auto *FP = dyn_cast<FunctionParmPackExpr>(E)) { 16809 for (VarDecl *VD : *FP) 16810 MarkVarDeclODRUsed(VD, FP->getParameterPackLocation(), *this);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2504 DAG.getEntryNode(), DL, ABI.IsN64() ? Mips::FP_64 : Mips::FP, VT); 4052 // If the size of FP registers is 64-bit or Reg is an even number, select
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 505 // AArch64 has implementations of a lot of rounding-like FP operations. 829 // AArch64 has implementations of a lot of rounding-like FP operations. 931 // F[MIN|MAX][NUM|NAN] are available for all FP NEON types. 1554 llvm_unreachable("Unknown FP condition!"); 1666 changeFPCCToAArch64CC(getSetCCInverse(CC, /* FP inverse */ MVT::f32), 1927 // Determine OutCC and handle FP special case. 3050 // stack objects. For now we simply return the incoming FP. Refer D53541 5064 // Unfortunately, the mapping of LLVM FP CC's onto AArch64 CC's isn't totally 5260 // Now we know we're dealing with FP values. 5285 // Unfortunately, the mapping of LLVM FP C [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.cpp | 269 // FP split into multiple FP parts (for ppcf128) 279 // FP split into integer parts (soft fp) 297 // For an FP value in an integer part, we need to truncate to the right 537 // FP values need to be bitcast, then extended if they are being put 1129 // Constrained FP intrinsics with fpexcept.ignore should also get 3332 case SPNB_NA: llvm_unreachable("No NaN behavior for FP op?"); 3349 case SPNB_NA: llvm_unreachable("No NaN behavior for FP op?"); 6798 // Add the offset to the FP. 6799 Value *FP local [all...] |
/freebsd-11-stable/contrib/binutils/gas/config/ |
H A D | tc-mips.c | 118 #define FP 30 macro 14667 /* 32 bit code with 64 bit FP registers. */
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H A D | tc-arm.c | 4198 /* Our FP word must be 32 bits (single-precision FP). */ 14542 REGDEF(WR, 7,RN), REGDEF(SB, 9,RN), REGDEF(SL,10,RN), REGDEF(FP,11,RN), 19849 -macps-float Floats passed in FP registers 19868 FP variants:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 509 // Set up the FP register classes. 547 // Set up the FP register classes. 579 // Set up the FP register classes. 754 // Some FP actions are always expanded for vector types. 2694 "Unexpected FP-extend for return value."); 2711 // the RET instruction and handled by the FP Stackifier. 2715 // change the value to the FP stack register class. 3018 // Report an error if there was an attempt to return FP values via XMM 4928 /// Current x86 isa includes the following FP cmov instructions: 5012 /// specified FP immediat [all...] |
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