| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/toolchains/hndtools-arm-linux-2.6.36-uclibc-4.5.3/arm-linux/sysroot/usr/include/linux/ |
| H A D | synclink.h | 18 #define BIT0 0x0001 macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/char/ |
| H A D | synclinkmp.c | 421 #define RXRDYE BIT0
433 #define BRKE BIT0
434 #define IDLD BIT0
2180 while((status = read_reg(info,CST0)) & BIT0)
2365 /* clear IRQ (BIT0 must be 1 to prevent clearing DE bit) */
2382 /* clear IRQ (BIT0 must be 1 to prevent clearing DE bit) */
2418 /* clear IRQ (BIT0 must be 1 to prevent clearing DE bit) */
2596 if (status & BIT0 << shift)
2605 if (dmastatus & BIT0 << shift)
4038 write_reg(info, MD2, (unsigned char)(read_reg(info, MD2) | (BIT1 + BIT0)));
[all...] |
| H A D | synclink.c | 501 #define MISC BIT0
520 #define RXSTATUS_DATA_AVAILABLE BIT0
558 #define TXSTATUS_FIFO_EMPTY BIT0
578 #define MISCSTATUS_BRG0_ZERO BIT0
604 #define SICR_BRG0_ZERO BIT0
628 * and Transmit Interrupt Control Register (TICR) (except BIT2, BIT0)
638 #define TXSTATUS_FIFO_EMPTY BIT0
641 #define DICR_TRANSMIT BIT0
657 /* and Transmit Interrupt Control Register (TICR) (except BIT2, BIT0) */
1651 usc_OutDmaReg(info, CDIR, BIT8+BIT0 );
[all...] |
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/char/ |
| H A D | synclinkmp.c | 421 #define RXRDYE BIT0
433 #define BRKE BIT0
434 #define IDLD BIT0
2180 while((status = read_reg(info,CST0)) & BIT0)
2365 /* clear IRQ (BIT0 must be 1 to prevent clearing DE bit) */
2382 /* clear IRQ (BIT0 must be 1 to prevent clearing DE bit) */
2418 /* clear IRQ (BIT0 must be 1 to prevent clearing DE bit) */
2596 if (status & BIT0 << shift)
2605 if (dmastatus & BIT0 << shift)
4038 write_reg(info, MD2, (unsigned char)(read_reg(info, MD2) | (BIT1 + BIT0)));
[all...] |
| H A D | synclink.c | 501 #define MISC BIT0
520 #define RXSTATUS_DATA_AVAILABLE BIT0
558 #define TXSTATUS_FIFO_EMPTY BIT0
578 #define MISCSTATUS_BRG0_ZERO BIT0
604 #define SICR_BRG0_ZERO BIT0
628 * and Transmit Interrupt Control Register (TICR) (except BIT2, BIT0)
638 #define TXSTATUS_FIFO_EMPTY BIT0
641 #define DICR_TRANSMIT BIT0
657 /* and Transmit Interrupt Control Register (TICR) (except BIT2, BIT0) */
1651 usc_OutDmaReg(info, CDIR, BIT8+BIT0 );
[all...] |
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rtl8187se/ |
| H A D | r8180_hw.h | 24 #define BIT0 0x00000001 macro
513 #define BEQ_ACM_CTL (0x01 << 0) //BIT0 // Set to 1 when AC_BE used time reaches or exceeds the admitted time
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8187se/ |
| H A D | r8180_hw.h | 24 #define BIT0 0x00000001 macro
513 #define BEQ_ACM_CTL (0x01 << 0) //BIT0 // Set to 1 when AC_BE used time reaches or exceeds the admitted time
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/char/pcmcia/ |
| H A D | synclink_cs.c | 304 #define IRQ_RXFIFO BIT0 // receive pool full
312 #define PVR_DTR BIT0
699 #define CMD_TXRESET BIT0 // transmit reset
1203 if (gis & (BIT1 + BIT0)) {
3041 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3055 val = read_reg(info, CHA + MODE) | BIT0;
3108 val |= BIT0;
3178 val |= BIT0;
3454 val |= BIT0;
3532 val |= BIT0; /*
[all...] |
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/char/pcmcia/ |
| H A D | synclink_cs.c | 304 #define IRQ_RXFIFO BIT0 // receive pool full
312 #define PVR_DTR BIT0
699 #define CMD_TXRESET BIT0 // transmit reset
1203 if (gis & (BIT1 + BIT0)) {
3041 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3055 val = read_reg(info, CHA + MODE) | BIT0;
3108 val |= BIT0;
3178 val |= BIT0;
3454 val |= BIT0;
3532 val |= BIT0; /*
[all...] |
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rtl8192su/ |
| H A D | r8192U.h | 67 #define BIT0 0x00000001 macro
120 #define COMP_TRACE BIT0 // For function call tracing.
631 #define HAL_DM_DIG_DISABLE BIT0
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8192su/ |
| H A D | r8192U.h | 67 #define BIT0 0x00000001 macro
120 #define COMP_TRACE BIT0 // For function call tracing.
631 #define HAL_DM_DIG_DISABLE BIT0
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/wlags49_h2/ |
| H A D | hcfdef.h | 233 #define HREG_DMA_CTRL_TX_MODE_SINGLE_PACKET BIT0 // mode 1
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/wlags49_h2/ |
| H A D | hcfdef.h | 233 #define HREG_DMA_CTRL_TX_MODE_SINGLE_PACKET BIT0 // mode 1
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/ |
| H A D | cs89x0.h | 463 #define BIT0 1 macro
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/ |
| H A D | cs89x0.h | 463 #define BIT0 1 macro
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rtl8192e/ |
| H A D | r8192E.h | 54 #define BIT0 0x00000001 macro
105 #define COMP_TRACE BIT0 // For function call tracing.
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rtl8192u/ |
| H A D | r8192U.h | 52 #define BIT0 0x00000001 macro
97 #define COMP_TRACE BIT0 // For function call tracing.
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8192u/ |
| H A D | r8192U.h | 52 #define BIT0 0x00000001 macro
97 #define COMP_TRACE BIT0 // For function call tracing.
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8192e/ |
| H A D | r8192E.h | 54 #define BIT0 0x00000001 macro
105 #define COMP_TRACE BIT0 // For function call tracing.
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/vt6655/ |
| H A D | baseband.c | 2170 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2203 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2239 //MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0); // RobertYu: 20050104, 20050131 disable PA_Delay
2524 byOrgData |= BIT0;
2546 byOrgData &= ~(BIT0);
|
| H A D | hostap.c | 42 #define HOSTAP_CRYPT_FLAG_SET_TX_KEY BIT0
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/vt6656/ |
| H A D | hostap.c | 43 #define HOSTAP_CRYPT_FLAG_SET_TX_KEY BIT0
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/video/via/ |
| H A D | share.h | 34 #define BIT0 0x01 macro
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/vt6655/ |
| H A D | baseband.c | 2170 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2203 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2239 //MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0); // RobertYu: 20050104, 20050131 disable PA_Delay
2524 byOrgData |= BIT0;
2546 byOrgData &= ~(BIT0);
|
| H A D | hostap.c | 42 #define HOSTAP_CRYPT_FLAG_SET_TX_KEY BIT0
|