| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LoopStrengthReduce.cpp | 2648 SmallVector<const SCEV *, 4> Worklist; local
3773 GenerateConstantOffsetsImpl( LSRUse &LU, unsigned LUIdx, const Formula &Base, const SmallVectorImpl<int64_t> &Worklist, size_t Idx, bool IsScaledReg) argument
3849 SmallVector<int64_t, 2> Worklist; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 5156 SetVectorType Worklist; local
5509 moveScalarAddSub(SetVectorType &Worklist, MachineInstr &Inst, MachineDominatorTree *MDT) const argument
5544 lowerSelect(SetVectorType &Worklist, MachineInstr &Inst, MachineDominatorTree *MDT) const argument
5616 lowerScalarAbs(SetVectorType &Worklist, MachineInstr &Inst) const argument
5643 lowerScalarXnor(SetVectorType &Worklist, MachineInstr &Inst) const argument
5708 splitScalarNotBinop(SetVectorType &Worklist, MachineInstr &Inst, unsigned Opcode) const argument
5737 splitScalarBinOpN2(SetVectorType& Worklist, MachineInstr &Inst, unsigned Opcode) const argument
5766 splitScalar64BitUnaryOp( SetVectorType &Worklist, MachineInstr &Inst, unsigned Opcode) const argument
5820 splitScalar64BitAddSub(SetVectorType &Worklist, MachineInstr &Inst, MachineDominatorTree *MDT) const argument
5892 splitScalar64BitBinaryOp(SetVectorType &Worklist, MachineInstr &Inst, unsigned Opcode, MachineDominatorTree *MDT) const argument
5956 splitScalar64BitXnor(SetVectorType &Worklist, MachineInstr &Inst, MachineDominatorTree *MDT) const argument
5998 splitScalar64BitBCNT( SetVectorType &Worklist, MachineInstr &Inst) const argument
6035 splitScalar64BitBFE(SetVectorType &Worklist, MachineInstr &Inst) const argument
6132 movePackToVALU(SetVectorType &Worklist, MachineRegisterInfo &MRI, MachineInstr &Inst) const argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
| H A D | AttributorAttributes.cpp | 263 SmallVector<Item, 16> Worklist; local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 3636 SmallVector<Value *, 32> Worklist; local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12665 SmallVector<const SDNode *, 16> Worklist; local
12758 SmallVector<const SDNode *, 16> Worklist; local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 159 SmallVector<SDNode *, 64> Worklist; member in class:__anon3568::DAGCombiner
1879 SmallVector<std::pair<SDNode *, unsigned>, 8> Worklist; local
14353 SmallVector<const SDNode *, 16> Worklist; local
14537 SmallVector<const SDNode *, 2> Worklist; local
14579 SmallVector<const SDNode *, 8> Worklist; local
16230 SmallVector<const SDNode *, 8> Worklist; local
21051 SmallVector<const SDNode *, 16> Worklist; local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 3532 SmallVector<const User*,4> Worklist; local
13828 SmallVector<const SDNode *, 16> Worklist; local
14062 SmallVector<const SDNode *, 16> Worklist; local
[all...] |