| /freebsd-10-stable/contrib/llvm/lib/CodeGen/ |
| H A D | DeadMachineInstructionElim.cpp | 135 MachineInstr *UseMI = Use.getParent(); local
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| H A D | OptimizePHIs.cpp | 144 MachineInstr *UseMI = &*I; local
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| H A D | LiveRangeEdit.cpp | 167 MachineInstr *DefMI = 0, *UseMI = 0; local
206 << " into single use: " << *UseMI); local
[all...] |
| H A D | RegisterScavenging.cpp | 386 MachineBasicBlock::iterator UseMI; local
286 findSurvivorReg(MachineBasicBlock::iterator StartMI, BitVector &Candidates, unsigned InstrLimit, MachineBasicBlock::iterator &UseMI) argument
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| H A D | TargetSchedule.cpp | 155 computeOperandLatency( const MachineInstr *DefMI, unsigned DefOperIdx, const MachineInstr *UseMI, unsigned UseOperIdx) const argument
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| H A D | MachineSSAUpdater.cpp | 221 MachineInstr *UseMI = U.getParent(); local
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| H A D | PeepholeOptimizer.cpp | 206 MachineInstr *UseMI = &*UI; local
282 MachineInstr *UseMI = UseMO->getParent(); local
[all...] |
| H A D | RegAllocFast.cpp | 593 const MachineInstr &UseMI = *MRI->use_nodbg_begin(VirtReg); local
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| H A D | TailDuplication.cpp | 256 MachineInstr *UseMI = &*UI; local
333 MachineInstr *UseMI = &*UI; local
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| H A D | TargetInstrInfo.cpp | 705 getOperandLatency(const InstrItineraryData *ItinData, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const argument
742 computeOperandLatency(const InstrItineraryData *ItinData, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const argument
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| H A D | MachineLICM.cpp | 983 MachineInstr *UseMI = &*UI; local
1016 MachineInstr *UseMI = &*I; local
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| H A D | RegisterCoalescer.cpp | 628 MachineInstr *UseMI = &*UI; local
673 MachineInstr *UseMI = &*UI; local
705 DEBUG(dbgs() << "\\t\\tnoop: " << DefIdx << '\\t' << *UseMI); local
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/Mips/ |
| H A D | Mips16RegisterInfo.cpp | 61 saveScavengerRegister(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, unsigned Reg) const argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 123 MachineInstr *UseMI = &*MRI->use_nodbg_begin(Reg); local
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| H A D | ARMExpandPseudoInsts.cpp | 72 TransferImpOps(MachineInstr &OldMI, MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI) argument
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| H A D | ARMBaseInstrInfo.cpp | 2462 bool ARMBaseInstrInfo::FoldImmediate(MachineInstr *UseMI, argument
3470 getOperandLatency(const InstrItineraryData *ItinData, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const argument
3863 hasHighOperandLatency(const InstrItineraryData *ItinData, const MachineRegisterInfo *MRI, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const argument
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/R600/ |
| H A D | SIInstrInfo.cpp | 623 MachineInstr &UseMI = *I; local
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| /freebsd-10-stable/contrib/llvm/include/llvm/Target/ |
| H A D | TargetInstrInfo.h | 792 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, argument
865 hasHighOperandLatency(const InstrItineraryData *ItinData, const MachineRegisterInfo *MRI, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 817 bool PPCInstrInfo::FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, argument
1161 MachineInstr *UseMI = &*I; local
1294 MachineInstr *UseMI = &*I; local
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 926 MachineInstr *UseMI = Use.getParent(); local
960 MachineInstr *UseMI = Use.getParent(); local
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 5304 hasHighOperandLatency(const InstrItineraryData *ItinData, const MachineRegisterInfo *MRI, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const argument
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