Searched defs:UVD_SUVD_CGC_CTRL__SRE_MODE_MASK (Results 1 - 12 of 12) sorted by relevance

/linux-master/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_5_0_sh_mask.h785 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x1 macro
H A Duvd_6_0_sh_mask.h779 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x1 macro
H A Duvd_7_0_sh_mask.h255 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x00000001L macro
/linux-master/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h547 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x00000001L macro
H A Dvcn_2_0_0_sh_mask.h3306 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x00000001L macro
H A Dvcn_2_6_0_sh_mask.h3851 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x00000001L macro
H A Dvcn_2_5_sh_mask.h2180 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x00000001L macro
H A Dvcn_3_0_0_sh_mask.h2937 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x00000001L macro
H A Dvcn_5_0_0_sh_mask.h2398 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x00000001L macro
H A Dvcn_4_0_3_sh_mask.h2865 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x00000001L macro
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H A Dvcn_4_0_0_sh_mask.h2865 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x00000001L macro
H A Dvcn_4_0_5_sh_mask.h2897 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x00000001L macro

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