| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHazardRecognizer.cpp | 39 HexagonHazardRecognizer::getHazardType(SUnit *SU, int stalls) { argument
100 bool HexagonHazardRecognizer::ShouldPreferAnother(SUnit *SU) { argument
108 void HexagonHazardRecognizer::EmitInstruction(SUnit *SU) { argument
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| H A D | HexagonMachineScheduler.h | 115 SUnit *SU = nullptr; member in struct:llvm::ConvergingVLIWScheduler::SchedCandidate
209 isLatencyBound(SUnit *SU) argument
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| H A D | HexagonMachineScheduler.cpp | 97 bool VLIWResourceModel::isResourceAvailable(SUnit *SU, bool IsTop) { argument
138 bool VLIWResourceModel::reserveResources(SUnit *SU, boo argument
228 SUnit *SU = SchedImpl->pickNode(IsTopNode); local
288 releaseTopNode(SUnit *SU) argument
304 releaseBottomNode(SUnit *SU) argument
336 checkHazard(SUnit *SU) argument
347 releaseNode(SUnit *SU, unsigned ReadyCycle) argument
389 bumpNode(SUnit *SU) argument
427 SUnit *SU = *(Pending.begin()+i); local
447 removeReady(SUnit *SU) argument
484 traceCandidate(const char *Label, const ReadyQueue &Q, SUnit *SU, int Cost, PressureChange P) argument
521 isSingleUnscheduledPred(SUnit *SU, SUnit *SU2) argument
536 isSingleUnscheduledSucc(SUnit *SU, SUnit *SU2) argument
553 pressureChange(const SUnit *SU, bool isBotUp) argument
576 SchedulingCost(ReadyQueue &Q, SUnit *SU, SchedCandidate &Candidate, RegPressureDelta &Delta, bool verbose) argument
951 SUnit *SU; local
994 schedNode(SUnit *SU, bool IsTopNode) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ScheduleDAGPrinter.cpp | 76 std::string DOTGraphTraits<ScheduleDAG*>::getNodeLabel(const SUnit *SU, argument
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| H A D | LatencyPriorityQueue.cpp | 56 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { argument
73 void LatencyPriorityQueue::push(SUnit *SU) { argument
92 scheduledNode(SUnit *SU) argument
105 AdjustPriorityOfUnscheduledPreds(SUnit *SU) argument
134 remove(SUnit *SU) argument
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| H A D | MacroFusion.cpp | 39 static SUnit *getPredClusterSU(const SUnit &SU) { argument
47 static bool hasLessThanNumFused(const SUnit &SU, unsigned FuseLimit) { argument
101 SUnit *SU = SI.getSUnit(); local
114 SUnit *SU = SI.getSUnit(); local
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| H A D | ScoreboardHazardRecognizer.cpp | 113 ScoreboardHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { argument
172 void ScoreboardHazardRecognizer::EmitInstruction(SUnit *SU) { argument
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| H A D | CriticalAntiDepBreaker.cpp | 142 static const SDep *CriticalPathStep(const SUnit *SU) { argument
462 const SUnit *SU = &SUnits[i]; local
668 const SUnit *SU = MISUnitMap[Q->second->getParent()]; local
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| H A D | PostRASchedulerList.cpp | 452 void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) { argument
487 void SchedulePostRATDList::ReleaseSuccessors(SUnit *SU) { argument
497 ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMHazardRecognizer.cpp | 34 ARMHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { argument
81 void ARMHazardRecognizer::EmitInstruction(SUnit *SU) { argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGVLIW.cpp | 113 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { argument
137 void ScheduleDAGVLIW::releaseSuccessors(SUnit *SU) { argument
151 void ScheduleDAGVLIW::scheduleNodeTopDown(SUnit *SU, unsigne argument
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| H A D | ResourcePriorityQueue.cpp | 71 ResourcePriorityQueue::numberRCValPredInSU(SUnit *SU, unsigned RCId) { argument
108 unsigned ResourcePriorityQueue::numberRCValSuccInSU(SUnit *SU, argument
146 static unsigned numberCtrlDepsInSU(SUnit *SU) { argument
155 static unsigned numberCtrlPredInSU(SUnit *SU) { argument
172 SUnit *SU = &(*SUnits)[i]; local
214 getSingleUnscheduledPred(SUnit *SU) argument
229 push(SUnit *SU) argument
243 isResourceAvailable(SUnit *SU) argument
286 reserveResources(SUnit *SU) argument
323 rawRegPressureDelta(SUnit *SU, unsigned RCId) argument
357 regPressureDelta(SUnit *SU, bool RawPressure) argument
393 SUSchedulingCost(SUnit *SU) argument
464 scheduledNode(SUnit *SU) argument
538 initNumRegDefsLeft(SUnit *SU) argument
571 adjustPriorityOfUnscheduledPreds(SUnit *SU) argument
622 remove(SUnit *SU) argument
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| H A D | ScheduleDAGSDNodes.cpp | 79 SUnit *SU = &SUnits.back(); local
91 SUnit *SU = newSUnit(Old->getNode()); local
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| H A D | ScheduleDAGFast.cpp | 88 void AddPred(SUnit *SU, const SDep &D) { argument
94 void RemovePred(SUnit *SU, const SDep &D) { argument
139 void ScheduleDAGFast::ReleasePred(SUnit *SU, SDep *PredEdge) { argument
160 void ScheduleDAGFast::ReleasePredecessors(SUnit *SU, unsigne argument
181 ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) argument
210 CopyAndMoveSuccessors(SUnit *SU) argument
380 InsertCopiesAndMoveSuccs(SUnit *SU, unsigned Reg, const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC, SmallVectorImpl<SUnit*> &Copies) argument
446 CheckForLiveRegDef(SUnit *SU, unsigned Reg, std::vector<SUnit*> &LiveRegDefs, SmallSet<unsigned, 4> &RegAdded, SmallVectorImpl<unsigned> &LRegs, const TargetRegisterInfo *TRI) argument
467 DelayForLiveRegsBottomUp(SUnit *SU, SmallVectorImpl<unsigned> &LRegs) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUExportClustering.cpp | 29 static bool isExport(const SUnit &SU) { argument
35 static bool isPositionExport(const SIInstrInfo *TII, SUnit *SU) { argument
84 static void removeExportDependencies(ScheduleDAGInstrs *DAG, SUnit &SU) { argument
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| H A D | GCNMinRegStrategy.cpp | 38 const SUnit *SU; member in struct:__anon3945::GCNMinRegScheduler::Candidate
56 void setIsScheduled(const SUnit *SU) { argument
67 decNumPreds(const SUnit *SU) argument
206 auto SU = Worklist.pop_back_val(); local
226 releaseSuccessors(const SUnit* SU, int Priority) argument
265 auto SU = C->SU; local
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| H A D | GCNILPSched.cpp | 24 SUnit *SU; member in struct:__anon3943::GCNILPScheduler::Candidate
59 CalcNodeSethiUllmanNumber(const SUnit *SU, std::vector<unsigned> &SUNumbers) { argument
107 closestSucc(const SUnit *SU) argument
122 calcMaxScratches(const SUnit *SU) argument
276 releasePredecessors(const SUnit* SU) argument
337 auto SU = C->SU; local
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| H A D | R600MachineScheduler.cpp | 58 SUnit *SU = nullptr; local
142 schedNode(SUnit *SU, bool IsTopNode) argument
189 releaseTopNode(SUnit *SU) argument
193 releaseBottomNode(SUnit *SU) argument
293 getInstKind(SUnit* SU) argument
322 SUnit *SU = *It; local
431 SUnit *SU = AttemptFillSlot(3, true); local
440 SUnit *SU = AttemptFillSlot(Chan, false); local
454 SUnit *SU = nullptr; local
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| H A D | GCNIterativeScheduler.cpp | 56 static inline MachineInstr *getMachineInstr(const SUnit *SU) { argument
59 static inline MachineInstr *getMachineInstr(const SUnit &SU) { argument
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| H A D | GCNSchedStrategy.cpp | 62 void GCNMaxOccupancySchedStrategy::initCandidate(SchedCandidate &Cand, SUnit *SU, argument
256 SUnit *SU; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZMachineScheduler.h | 42 SUnit *SU = nullptr; member in struct:llvm::SystemZPostRASchedStrategy::Candidate
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| H A D | SystemZMachineScheduler.cpp | 241 schedNode(SUnit *SU, bool IsTopNode) argument
251 releaseTopNode(SUnit *SU) argument
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| H A D | SystemZHazardRecognizer.cpp | 167 dumpSU(SUnit *SU, raw_ostream &OS) const argument
271 EmitInstruction(SUnit *SU) argument
387 resourcesCost(SUnit *SU) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCHazardRecognizers.cpp | 24 bool PPCDispatchGroupSBHazardRecognizer::isLoadAfterStore(SUnit *SU) { argument
54 bool PPCDispatchGroupSBHazardRecognizer::isBCTRAfterSet(SUnit *SU) { argument
139 getHazardType(SUnit *SU, int Stalls) argument
146 ShouldPreferAnother(SUnit *SU) argument
155 PreEmitNoops(SUnit *SU) argument
174 EmitInstruction(SUnit *SU) argument
325 getHazardType(SUnit *SU, int Stalls) argument
385 EmitInstruction(SUnit *SU) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAGInstrs.h | 55 SUnit *SU; member in struct:llvm::VReg2SUnit
57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) argument
77 SUnit *SU; member in struct:llvm::PhysRegSUOper
69 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, unsigned OperandIndex, SUnit *SU) argument
210 addChainDependencies(SUnit *SU, SUList &SUs, unsigned Latency) argument
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