Lines Matching defs:SU
79 SUnit *SU = &SUnits.back();
84 SU->SchedulingPref = Sched::None;
86 SU->SchedulingPref = TLI.getSchedulingPreference(N);
87 return SU;
91 SUnit *SU = newSUnit(Old->getNode());
92 SU->OrigNode = Old->OrigNode;
93 SU->Latency = Old->Latency;
94 SU->isVRegCycle = Old->isVRegCycle;
95 SU->isCall = Old->isCall;
96 SU->isCallOp = Old->isCallOp;
97 SU->isTwoAddress = Old->isTwoAddress;
98 SU->isCommutable = Old->isCommutable;
99 SU->hasPhysRegDefs = Old->hasPhysRegDefs;
100 SU->hasPhysRegClobbers = Old->hasPhysRegClobbers;
101 SU->isScheduleHigh = Old->isScheduleHigh;
102 SU->isScheduleLow = Old->isScheduleLow;
103 SU->SchedulingPref = Old->SchedulingPref;
105 return SU;
427 SUnit *SU = CallSUnits.pop_back_val();
428 for (const SDNode *SUNode = SU->getNode(); SUNode;
448 SUnit *SU = &SUnits[su];
449 SDNode *MainNode = SU->getNode();
456 SU->isTwoAddress = true;
461 SU->isCommutable = true;
465 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode()) {
468 SU->hasPhysRegClobbers = true;
473 SU->hasPhysRegDefs = true;
482 if (OpSU == SU) continue; // In the same group.
513 ST.adjustSchedDependency(OpSU, DefIdx, SU, i, Dep);
516 if (!SU->addPred(Dep) && !Dep.isCtrl() && OpSU->NumRegDefsLeft > 1) {
580 ScheduleDAGSDNodes::RegDefIter::RegDefIter(const SUnit *SU,
582 : SchedDAG(SD), Node(SU->getNode()), DefIdx(0), NodeNumDefs(0) {
605 void ScheduleDAGSDNodes::InitNumRegDefsLeft(SUnit *SU) {
606 assert(SU->NumRegDefsLeft == 0 && "expect a new node");
607 for (RegDefIter I(SU, this); I.IsValid(); I.Advance()) {
608 assert(SU->NumRegDefsLeft < USHRT_MAX && "overflow is ok but unexpected");
609 ++SU->NumRegDefsLeft;
613 void ScheduleDAGSDNodes::computeLatency(SUnit *SU) {
614 SDNode *N = SU->getNode();
620 SU->Latency = 0;
626 SU->Latency = 1;
633 SU->Latency = HighLatencyCycles;
635 SU->Latency = 1;
641 SU->Latency = 0;
642 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode())
644 SU->Latency += TII->getInstrLatency(InstrItins, N);
674 void ScheduleDAGSDNodes::dumpNode(const SUnit &SU) const {
676 dumpNodeName(SU);
679 if (!SU.getNode()) {
684 SU.getNode()->dump(DAG);
687 for (SDNode *N = SU.getNode()->getGluedNode(); N; N = N->getGluedNode())
702 for (const SUnit &SU : SUnits)
703 dumpNodeAll(SU);
712 if (SUnit *SU = Sequence[i])
713 dumpNode(*SU);
792 EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, Register> &VRBaseMap,
794 for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
803 for (SUnit::const_succ_iterator II = SU->Succs.begin(),
804 EE = SU->Succs.end(); II != EE; ++II) {
816 Register VRBase = MRI.createVirtualRegister(SU->CopyDstRC);
817 bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase)).second;
898 SUnit *SU = Sequence[i];
899 if (!SU) {
907 if (!SU->getNode()) {
909 EmitPhysRegCopy(SU, CopyVRBaseMap, InsertPos);
914 for (SDNode *N = SU->getNode()->getGluedNode(); N; N = N->getGluedNode())
918 auto NewInsn = EmitNode(N, SU->OrigNode != SU, SU->isCloned, VRBaseMap);
930 EmitNode(SU->getNode(), SU->OrigNode != SU, SU->isCloned, VRBaseMap);
933 ProcessSourceNode(SU->getNode(), DAG, Emitter, VRBaseMap, Orders, Seen,
936 if (MDNode *MD = DAG->getHeapAllocSite(SU->getNode())) {