| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 355 SmallVector<std::pair<unsigned, SDValue>, MaxArgs> RegsToPass; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelLowering.cpp | 409 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const argument
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| H A D | MipsSEISelLowering.cpp | 1163 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const argument
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| H A D | MipsISelLowering.cpp | 3259 std::deque<std::pair<unsigned, SDValue>> RegsToPass; local
3033 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const argument
4381 passByValArg( SDValue Chain, const SDLoc &DL, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, MachineFrameInfo &MFI, SelectionDAG &DAG, SDValue Arg, unsigned FirstReg, unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle, const CCValAssign &VA) const argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 257 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 300 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1171 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 652 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 822 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2595 Passv64i1ArgInRegs( const SDLoc &Dl, SelectionDAG &DAG, SDValue &Arg, SmallVectorImpl<std::pair<Register, SDValue>> &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, const X86Subtarget &Subtarget) argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1139 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 776 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 432 SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass; local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2247 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1571 SmallVector<std::pair<unsigned, SDValue>, 9> RegsToPass; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 2860 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
2543 passSpecialInputs( CallLoweringInfo &CLI, CCState &CCInfo, const SIMachineFunctionInfo &Info, SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue Chain) const argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 5865 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
5521 buildCallOperands(SmallVectorImpl<SDValue> &Ops, PPCTargetLowering::CallFlags CFlags, const SDLoc &dl, SelectionDAG &DAG, SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue Glue, SDValue Chain, SDValue &Callee, int SPDiff, const PPCSubtarget &Subtarget) argument
5603 FinishCall( CallFlags CFlags, const SDLoc &dl, SelectionDAG &DAG, SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue Glue, SDValue Chain, SDValue CallSeqStart, SDValue &Callee, int SPDiff, unsigned NumBytes, const SmallVectorImpl<ISD::InputArg> &Ins, SmallVectorImpl<SDValue> &InVals, const CallBase *CB) const argument
6211 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
6794 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
7541 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4453 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 2288 RegsToPassVector RegsToPass; local
2172 PassF64ArgInRegs(const SDLoc &dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVectorImpl<SDValue> &MemOpChains, ISD::ArgFlagsTy Flags) const argument
[all...] |