| /freebsd-10.0-release/contrib/llvm/include/llvm/Support/ |
| H A D | GetElementPtrTypeIterator.h | 102 gep_type_begin(Type *Op0, ArrayRef<T> A) { argument
108 gep_type_end(Type *Op0, ArrayRef<T> A) { argument
|
| H A D | PatternMatch.h | 1082 m_Intrinsic(const T0 &Op0) { argument
1088 m_Intrinsic(const T0 &Op0, const T1 &Op1) { argument
1094 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2) { argument
1100 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2, const T3 &Op3) { argument
1107 m_BSwap(const Opnd0 &Op0) { argument
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 272 Value *Op0 = CI->getArgOperand(0); local
|
| H A D | Verifier.cpp | 1954 Value *Op0 = MD->getOperand(0); local
|
| /freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPeephole.cpp | 247 MachineOperand &Op0 = MI->getOperand(0); local
|
| H A D | HexagonISelDAGToDAG.cpp | 1583 SDValue Op0, Op1; local
|
| /freebsd-10.0-release/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 198 SDValue Op0, Op1; local
|
| /freebsd-10.0-release/contrib/llvm/lib/Transforms/Scalar/ |
| H A D | CorrelatedValuePropagation.cpp | 163 Value *Op0 = C->getOperand(0); local
|
| /freebsd-10.0-release/contrib/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelDAGToDAG.cpp | 288 SDValue Op0, Op1; local
|
| /freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.cpp | 786 uint32_t Op0 = 3, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; local
814 uint32_t Op0 = (Bits >> 14) & 0x3; local
|
| /freebsd-10.0-release/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 1703 SDValue Op0, Op1; local
|
| /freebsd-10.0-release/contrib/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 24 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
312 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1, argument
[all...] |
| H A D | InstCombineMulDivRem.cpp | 100 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
372 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
642 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
707 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
793 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
874 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
990 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1022 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1065 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1136 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
[all...] |
| H A D | InstCombineCalls.cpp | 598 Value *Op0 = Builder->CreateBitCast(II->getArgOperand(0), local
|
| /freebsd-10.0-release/contrib/llvm/include/llvm/Analysis/ |
| H A D | ScalarEvolution.h | 590 const SCEV *getAddExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2, argument
608 const SCEV *getMulExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2, argument
|
| /freebsd-10.0-release/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 320 SDValue Op0 = N.getOperand(0); local
296 expandDisp(SystemZAddressingMode &AM, bool IsBase, SDValue Op0, ConstantSDNode *Op1) argument
521 splitLargeImmediate(unsigned Opcode, SDNode *Node, SDValue Op0, uint64_t UpperVal, uint64_t LowerVal) argument
[all...] |
| H A D | SystemZISelLowering.cpp | 1257 SDValue Op0 = Op.getOperand(0); local
962 lowerGR128Binary(SelectionDAG &DAG, DebugLoc DL, EVT VT, unsigned Extend, unsigned Opcode, SDValue Op0, SDValue Op1, SDValue &Even, SDValue &Odd) argument
|
| /freebsd-10.0-release/contrib/llvm/lib/Analysis/ |
| H A D | ConstantFolding.cpp | 544 static Constant *SymbolicallyEvaluateBinop(unsigned Opc, Constant *Op0, argument
[all...] |
| H A D | ValueTracking.cpp | 46 static void ComputeMaskedBitsAddSub(bool Add, Value *Op0, Value *Op1, bool NSW, argument
132 static void ComputeMaskedBitsMul(Value *Op0, Value *Op1, bool NSW, argument
1311 Value *Op0 = I->getOperand(0); local
[all...] |
| H A D | InstructionSimplify.cpp | 592 SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
653 SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
733 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
858 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
867 SimplifyFAddInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned MaxRecurse) argument
909 SimplifyFSubInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned MaxRecurse) argument
945 SimplifyFMulInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned MaxRecurse) argument
973 SimplifyMulInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1036 SimplifyFAddInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1042 SimplifyFSubInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1048 SimplifyFMulInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1056 SimplifyMulInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1064 SimplifyDiv(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1136 SimplifySDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1144 SimplifySDivInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1152 SimplifyUDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1160 SimplifyUDivInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1166 SimplifyFDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned) argument
1179 SimplifyFDivInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1187 SimplifyRem(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1241 SimplifySRemInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1249 SimplifySRemInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1257 SimplifyURemInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1265 SimplifyURemInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1271 SimplifyFRemInst(Value *Op0, Value *Op1, const Query &, unsigned) argument
1284 SimplifyFRemInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1292 SimplifyShift(unsigned Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1336 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
1352 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1361 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1379 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1389 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1411 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1421 SimplifyAndInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1512 SimplifyAndInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1520 SimplifyOrInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1606 SimplifyOrInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1614 SimplifyXorInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1666 SimplifyXorInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 399 unsigned Op0 = getRegForValue(I->getOperand(0)); local
774 unsigned Op0 = getRegForValue(I->getOperand(0)); local
938 const Value *Op0 local
1153 FastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType) argument
1204 FastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill) argument
1223 FastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) argument
1244 FastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill) argument
1268 FastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm) argument
1289 FastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm1, uint64_t Imm2) argument
1312 FastEmitInst_rf(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, const ConstantFP *FPImm) argument
1333 FastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
1357 FastEmitInst_rrii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm1, uint64_t Imm2) argument
1414 FastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill, uint32_t Idx) argument
1430 FastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill) argument
[all...] |
| H A D | TargetLowering.cpp | 1356 SDValue Op0 = N0; local
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/ExecutionEngine/ |
| H A D | ExecutionEngine.cpp | 565 Constant *Op0 = CE->getOperand(0); local
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 398 SDValue Op0 = N->getOperand(0); local
|
| /freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 1559 static void concatenateMemOperands(MachineInstr *MI, MachineInstr *Op0, argument
1575 ARMPreAllocLoadStoreOpt::CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, argument
1737 MachineInstr *Op0 = Ops.back(); local
[all...] |