| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfExpression.cpp | 94 void DwarfExpression::addAnd(unsigned Mask) { argument
527 uint64_t Mask = (1ULL << (uint64_t)SubRegisterSizeInBits) - 1ULL; local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 89 static bool isConstantMask(SDNode *Node, uint64_t &Mask) { argument
141 uint64_t Mask; local
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| /freebsd-11-stable/contrib/llvm-project/clang/lib/AST/Interp/ |
| H A D | Descriptor.cpp | 274 unsigned Mask = 1ull << static_cast<uint64_t>(I % PER_FIELD); local
284 unsigned Mask = 1ull << static_cast<uint64_t>(I % PER_FIELD); local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
| H A D | AggressiveInstCombine.cpp | 160 APInt Mask; member in struct:MaskOps
245 Constant *Mask = ConstantInt::get(I.getType(), MOps.Mask); local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 1677 void createUnpackShuffleMask(MVT VT, SmallVectorImpl<T> &Mask, bool Lo, argument
1696 void scaleShuffleMask(size_t Scale, ArrayRef<T> Mask, argument
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| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RDFRegisters.h | 73 LaneBitmask Mask = LaneBitmask::getNone(); member in struct:llvm::rdf::RegisterRef
140 LaneBitmask Mask; member in struct:llvm::rdf::PhysicalRegisterInfo::UnitInfo
232 LaneBitmask Mask; member in struct:llvm::rdf::PrintLaneMaskOpt
[all...] |
| H A D | TargetRegisterInfo.h | 1059 const uint32_t *Mask; member in class:llvm::TargetRegisterInfo::BitMaskClassIterator
[all...] |
| H A D | MachineInstr.h | 323 unsigned Mask = BundledPred | BundledSucc; local
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| H A D | SwitchLoweringUtils.h | 88 uint64_t Mask = 0; member in struct:llvm::SwitchCG::CaseBits
191 uint64_t Mask; member in struct:llvm::SwitchCG::BitTestCase
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/DebugInfo/MSF/ |
| H A D | MSFBuilder.cpp | 329 uint8_t Mask = uint8_t(IsFree) << I; local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/Utils/ |
| H A D | X86ShuffleDecode.cpp | 385 DecodeZeroExtendMask(unsigned SrcScalarBits, unsigned DstScalarBits, unsigned NumDstElts, bool IsAnyExtend, SmallVectorImpl<int> &Mask) argument
|
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/ADT/ |
| H A D | BitVector.h | 419 BitWord Mask = EMask - IMask; local
458 BitWord Mask = EMask - IMask; local
[all...] |
| H A D | SmallBitVector.h | 293 uintptr_t Mask = (uintptr_t(1) << Prev) - 1; local
391 uintptr_t Mask = EMask - IMask; local
422 uintptr_t Mask = EMask - IMask; local
631 setBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) argument
640 clearBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) argument
649 setBitsNotInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) argument
658 clearBitsNotInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) argument
667 applyMask(const uint32_t *Mask, unsigned MaskWords) argument
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 115 APInt Mask = APInt::getAllOnesValue(SrcTy.getScalarSizeInBits()); local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Bitstream/ |
| H A D | BitstreamReader.h | 195 static const unsigned Mask = sizeof(word_t) > 4 ? 0x3f : 0x1f; local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 104 Register Mask = I->getOperand(2).getReg(); local
413 Register Mask = I->getOperand(3).getReg(); local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUArgumentUsageInfo.h | 37 unsigned Mask; member in struct:llvm::ArgDescriptor
55 static ArgDescriptor createArg(const ArgDescriptor &Arg, unsigned Mask) { argument
[all...] |
| H A D | GCNDPPCombine.cpp | 496 const int64_t Mask = ~(SISrcMods::ABS | SISrcMods::NEG); local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | DetectDeadLanes.cpp | 461 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubReg); local
|
| H A D | LiveRangeCalc.cpp | 156 void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg, LaneBitmask Mask, argument
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| H A D | InterleavedLoadCombinePass.cpp | 1233 SmallVector<uint32_t, 4> Mask; local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 297 int64_t Mask = 0xffff; local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/tools/llvm-mca/Views/ |
| H A D | BottleneckAnalysis.h | 260 void addResourceDep(unsigned From, unsigned To, uint64_t Mask, argument
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| /freebsd-11-stable/sys/dev/rp/ |
| H A D | rp.c | 491 Byte_t Mask; /* Interrupt Mask Register */ local
536 Byte_t Mask; /* Interrupt Mask Register */ local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 741 unsigned Mask = (1 << NumBits) - 1; local
|