/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 2731 buildLegalVectorShuffle(EVT VT, const SDLoc &DL, SDValue N0, SDValue N1, MutableArrayRef<int> Mask, SelectionDAG &DAG) const argument 3054 SDValue Mask = N0.getOperand(1); local 3324 const APInt &Mask = N0.getConstantOperandAPInt(1); local [all...] |
H A D | LegalizeIntegerTypes.cpp | 898 SDValue Mask = N->getOperand(0); local 1606 SDValue Mask = N->getMask(); local 1632 SDValue Mask = PromoteTargetBoolean(N->getOperand(OpNo), DataVT); local 2962 SDValue Mask = DAG.getConstant(APInt::getLowBitsSet(Bits, HalfBits), dl, local [all...] |
H A D | SelectionDAGBuilder.cpp | 3602 SmallVector<int, 8> Mask; local 4333 SDValue Mask = getValue(MaskOperand); local 4454 SDValue Mask = getValue(I.getArgOperand(3)); local 4522 SDValue Mask = getValue(MaskOperand); local 4568 SDValue Mask = getValue(I.getArgOperand(2)); local [all...] |
H A D | DAGCombiner.cpp | 4704 APInt Mask = APInt::getHighBitsSet(VT.getSizeInBits(), local 4978 auto *Mask local 4888 SearchForAndLoads(SDNode *N, SmallVectorImpl<LoadSDNode*> &Loads, SmallPtrSetImpl<SDNode*> &NodesWithConsts, ConstantSDNode *Mask, SDNode *&NodeToMask) argument 5144 SDValue Mask = DAG.getConstant( local 5226 APInt Mask = ~N1C->getAPIntValue(); local 5968 stripConstantMask(SelectionDAG &DAG, SDValue Op, SDValue &Mask) argument 5978 matchRotateHalf(SelectionDAG &DAG, SDValue Op, SDValue &Shift, SDValue &Mask) argument 6012 extractShiftForRotate(SelectionDAG &DAG, SDValue OppShift, SDValue ExtractFrom, SDValue &Mask, const SDLoc &DL) argument 6350 SDValue Mask = AllOnes; local 7643 APInt Mask = APInt::getHighBitsSet(OpSizeInBits, OpSizeInBits - c1); local 7982 SDValue Mask = DAG.getConstant(APInt::getLowBitsSet(InnerShiftSize, local 7996 SDValue Mask = local 8019 APInt Mask = APInt::getLowBitsSet(OpSizeInBits, OpSizeInBits - ShiftAmt); local 8755 SDValue Mask = MSC->getMask(); local 8768 SDValue Mask = MST->getMask(); local 8785 SDValue Mask = MGT->getMask(); local 8797 SDValue Mask = MLD->getMask(); local 9405 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue(); local 9712 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue(); local 9981 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue(); local 10036 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue(); local 10197 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue(); local 10408 const APInt &Mask = AndC->getAPIntValue(); local 10889 APInt Mask = local 14255 auto Mask = local 15046 APInt Mask = ~APInt::getBitsSet(IVal.getValueSizeInBits(), local 15177 APInt Mask = APInt::getBitsSet(BitWidth, ShAmt, local 16742 ArrayRef<int> Mask = SVN->getMask(); local 18045 SmallVector<int, 8> Mask; local 18724 ArrayRef<int> Mask = SVN->getMask(); local 18952 ArrayRef<int> Mask = SVN->getMask(); local 19049 getShuffleMaskIndexOfOneElementFromOp0IntoOp1(ArrayRef<int> Mask) argument 19077 ArrayRef<int> Mask = Shuf->getMask(); local 19437 SmallVector<int, 4> Mask; local [all...] |
/freebsd-11-stable/contrib/llvm-project/openmp/runtime/src/ |
H A D | kmp.h | 590 KAFFINITY Mask; member in struct:GROUP_AFFINITY 656 class Mask { class in class:KMPAffinity [all...] |
/freebsd-11-stable/sys/contrib/dev/acpica/include/ |
H A D | actbl1.h | 236 UINT64 Mask; /* Bitmask required for this register instruction */ member in struct:acpi_whea_header
|
/freebsd-11-stable/sys/contrib/edk2/Include/IndustryStandard/ |
H A D | Acpi60.h | 1909 UINT64 Mask; member in struct:__anon5990 1988 UINT64 Mask; member in struct:__anon5992
|
H A D | Acpi51.h | 1722 UINT64 Mask; member in struct:__anon5888 1801 UINT64 Mask; member in struct:__anon5890
|
H A D | Acpi50.h | 1706 UINT64 Mask; member in struct:__anon5797 1785 UINT64 Mask; member in struct:__anon5799
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 98 static inline unsigned extractITMaskBit(unsigned Mask, unsigned Position) { argument 212 unsigned Mask:4; // Condition mask for instructions. member in struct:__anon2168::ARMAsmParser::__anon2169 357 startExplicitITBlock(ARMCC::CondCodes Cond, unsigned Mask) argument 366 unsigned Mask : 4; member in struct:__anon2168::ARMAsmParser::__anon2170 727 unsigned Mask:4; member in struct:__anon2168::ARMOperand::ITMaskOp 2185 uint64_t Mask = (1ull << Width) - 1; local 2522 uint32_t Mask = ~(((uint32_t)0xffffffff >> lsb) << (32 - width) >> local 3382 CreateITMask(unsigned Mask, SMLoc S) argument 6836 unsigned Mask = 8; local 7407 unsigned Mask = Inst.getOperand(1).getImm(); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 1713 const unsigned Mask = 0x3ff; local 2953 const uint32_t *Mask = TRI->getCallPreservedMask(MF, CallConv); local 3707 unsigned Mask = (getSubtarget()->getWavefrontSize() << 1) - 1; local 8279 uint64_t Mask = CRHS->getZExtValue(); local 8338 const uint32_t Mask = SIInstrFlags::N_NORMAL | local 8366 const ConstantSDNode *Mask = dyn_cast<ConstantSDNode>(RHS.getOperand(1)); local 8420 uint32_t Mask = LHSMask & RHSMask; local 8710 SDValue Mask = N->getOperand(1); local 9906 unsigned Mask = CC == ISD::SETOEQ ? IsInfMask : IsFiniteMask; local [all...] |
/freebsd-11-stable/contrib/llvm-project/clang/include/clang/AST/ |
H A D | Expr.h | 2179 enum { MaskBits = 2, Mask = 0x03 }; enumerator in enum:clang::final::OffsetOfNode::__anon52
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 969 uint64_t Mask = ((uint64_t)(-1LL) >> (64 - Size)), OrigMask = Mask; local 1157 APInt Mask local 1161 APInt Mask = APInt::getHighBitsSet(BitWidth, BitWidth - 16); local 4284 const uint32_t *Mask; local 4645 const uint32_t *Mask = TRI->getTLSCallPreservedMask(); local 5013 uint64_t Mask = LHS.getConstantOperandVal(1); local 5029 uint64_t Mask = LHS.getConstantOperandVal(1); local 5040 uint64_t Mask = LHS.getValueSizeInBits() - 1; local 5050 uint64_t Mask = LHS.getValueSizeInBits() - 1; local 6982 isConcatMask(ArrayRef<int> Mask, EVT VT, bool SplitLHS) argument 7007 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(Op)->getMask(); local 8617 const uint32_t *Mask = TRI->getWindowsStackProbePreservedMask(); local 9317 auto Mask = SVI->getShuffleMask(); local 10246 SDValue Mask = N->getOperand(1); local 10821 tryCombineCRC32(unsigned Mask, SDNode *N, SelectionDAG &DAG) argument 12268 SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask); local 13274 ConstantInt* Mask = dyn_cast<ConstantInt>(AndI.getOperand(1)); local [all...] |
/freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGOpenMPRuntime.cpp | 10523 static void addAArch64AdvSIMDNDSNames(unsigned NDS, StringRef Mask, argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 5432 const uint32_t *Mask = local 9024 ArrayRef<int> Mask = N->getMask(); local 9128 uint32_t Mask = 0; local 15809 const Value *Mask = AndI.getOperand(1); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 2440 const uint32_t *Mask; local 3142 const uint32_t *Mask = ARI->getTLSCallPreservedMask(DAG.getMachineFunction()); local 3633 const uint32_t *Mask local 4288 unsigned Mask = cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue(); local 5181 SDValue Mask = DAG.getConstant(0x7fffffff, dl, MVT::i32); local 5515 SDValue Mask = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v2i32, local 6780 SelectPairHalf(unsigned Elements, ArrayRef<int> Mask, unsigned Index) argument 8155 unsigned Mask = ((1 << LaneWidth) - 1) << Lane * LaneWidth; local 9143 SDValue Mask = N->getMask(); local 11855 APInt Mask = APInt::getHighBitsSet(C2Int.getBitWidth(), local 12320 unsigned Mask = MaskC->getZExtValue(); local 15711 const APInt &Mask = CI->getAPIntValue(); local 15772 unsigned Mask = C->getZExtValue(); local 17255 auto Mask = SVI->getShuffleMask(); local [all...] |