1/****************************************************************************** 2 * 3 * Name: actbl1.h - Additional ACPI table definitions 4 * 5 *****************************************************************************/ 6 7/****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152#ifndef __ACTBL1_H__ 153#define __ACTBL1_H__ 154 155 156/******************************************************************************* 157 * 158 * Additional ACPI Tables (1) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 * The tables in this file are fully defined within the ACPI specification. 164 * 165 ******************************************************************************/ 166 167 168/* 169 * Values for description table header signatures for tables defined in this 170 * file. Useful because they make it more difficult to inadvertently type in 171 * the wrong signature. 172 */ 173#define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 174#define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 175#define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 176#define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 177#define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 178#define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 179#define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 180#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 181#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 182#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 183#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 184#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 185#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 186#define ACPI_SIG_SLIT "SLIT" /* System Locality Distance Information Table */ 187#define ACPI_SIG_SRAT "SRAT" /* System Resource Affinity Table */ 188#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 189 190 191/* 192 * All tables must be byte-packed to match the ACPI specification, since 193 * the tables are provided by the system BIOS. 194 */ 195#pragma pack(1) 196 197/* 198 * Note: C bitfields are not used for this reason: 199 * 200 * "Bitfields are great and easy to read, but unfortunately the C language 201 * does not specify the layout of bitfields in memory, which means they are 202 * essentially useless for dealing with packed data in on-disk formats or 203 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 204 * this decision was a design error in C. Ritchie could have picked an order 205 * and stuck with it." Norman Ramsey. 206 * See http://stackoverflow.com/a/1053662/41661 207 */ 208 209 210/******************************************************************************* 211 * 212 * Common subtable headers 213 * 214 ******************************************************************************/ 215 216/* Generic subtable header (used in MADT, SRAT, etc.) */ 217 218typedef struct acpi_subtable_header 219{ 220 UINT8 Type; 221 UINT8 Length; 222 223} ACPI_SUBTABLE_HEADER; 224 225 226/* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 227 228typedef struct acpi_whea_header 229{ 230 UINT8 Action; 231 UINT8 Instruction; 232 UINT8 Flags; 233 UINT8 Reserved; 234 ACPI_GENERIC_ADDRESS RegisterRegion; 235 UINT64 Value; /* Value used with Read/Write register */ 236 UINT64 Mask; /* Bitmask required for this register instruction */ 237 238} ACPI_WHEA_HEADER; 239 240 241/******************************************************************************* 242 * 243 * BERT - Boot Error Record Table (ACPI 4.0) 244 * Version 1 245 * 246 ******************************************************************************/ 247 248typedef struct acpi_table_bert 249{ 250 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 251 UINT32 RegionLength; /* Length of the boot error region */ 252 UINT64 Address; /* Physical address of the error region */ 253 254} ACPI_TABLE_BERT; 255 256 257/* Boot Error Region (not a subtable, pointed to by Address field above) */ 258 259typedef struct acpi_bert_region 260{ 261 UINT32 BlockStatus; /* Type of error information */ 262 UINT32 RawDataOffset; /* Offset to raw error data */ 263 UINT32 RawDataLength; /* Length of raw error data */ 264 UINT32 DataLength; /* Length of generic error data */ 265 UINT32 ErrorSeverity; /* Severity code */ 266 267} ACPI_BERT_REGION; 268 269/* Values for BlockStatus flags above */ 270 271#define ACPI_BERT_UNCORRECTABLE (1) 272#define ACPI_BERT_CORRECTABLE (1<<1) 273#define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 274#define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 275#define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 276 277/* Values for ErrorSeverity above */ 278 279enum AcpiBertErrorSeverity 280{ 281 ACPI_BERT_ERROR_CORRECTABLE = 0, 282 ACPI_BERT_ERROR_FATAL = 1, 283 ACPI_BERT_ERROR_CORRECTED = 2, 284 ACPI_BERT_ERROR_NONE = 3, 285 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 286}; 287 288/* 289 * Note: The generic error data that follows the ErrorSeverity field above 290 * uses the ACPI_HEST_GENERIC_DATA defined under the HEST table below 291 */ 292 293 294/******************************************************************************* 295 * 296 * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 297 * Version 1 298 * 299 ******************************************************************************/ 300 301typedef struct acpi_table_cpep 302{ 303 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 304 UINT64 Reserved; 305 306} ACPI_TABLE_CPEP; 307 308 309/* Subtable */ 310 311typedef struct acpi_cpep_polling 312{ 313 ACPI_SUBTABLE_HEADER Header; 314 UINT8 Id; /* Processor ID */ 315 UINT8 Eid; /* Processor EID */ 316 UINT32 Interval; /* Polling interval (msec) */ 317 318} ACPI_CPEP_POLLING; 319 320 321/******************************************************************************* 322 * 323 * ECDT - Embedded Controller Boot Resources Table 324 * Version 1 325 * 326 ******************************************************************************/ 327 328typedef struct acpi_table_ecdt 329{ 330 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 331 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */ 332 ACPI_GENERIC_ADDRESS Data; /* Address of EC data register */ 333 UINT32 Uid; /* Unique ID - must be same as the EC _UID method */ 334 UINT8 Gpe; /* The GPE for the EC */ 335 UINT8 Id[1]; /* Full namepath of the EC in the ACPI namespace */ 336 337} ACPI_TABLE_ECDT; 338 339 340/******************************************************************************* 341 * 342 * EINJ - Error Injection Table (ACPI 4.0) 343 * Version 1 344 * 345 ******************************************************************************/ 346 347typedef struct acpi_table_einj 348{ 349 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 350 UINT32 HeaderLength; 351 UINT8 Flags; 352 UINT8 Reserved[3]; 353 UINT32 Entries; 354 355} ACPI_TABLE_EINJ; 356 357 358/* EINJ Injection Instruction Entries (actions) */ 359 360typedef struct acpi_einj_entry 361{ 362 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 363 364} ACPI_EINJ_ENTRY; 365 366/* Masks for Flags field above */ 367 368#define ACPI_EINJ_PRESERVE (1) 369 370/* Values for Action field above */ 371 372enum AcpiEinjActions 373{ 374 ACPI_EINJ_BEGIN_OPERATION = 0, 375 ACPI_EINJ_GET_TRIGGER_TABLE = 1, 376 ACPI_EINJ_SET_ERROR_TYPE = 2, 377 ACPI_EINJ_GET_ERROR_TYPE = 3, 378 ACPI_EINJ_END_OPERATION = 4, 379 ACPI_EINJ_EXECUTE_OPERATION = 5, 380 ACPI_EINJ_CHECK_BUSY_STATUS = 6, 381 ACPI_EINJ_GET_COMMAND_STATUS = 7, 382 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8, 383 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9, 384 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */ 385 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 386}; 387 388/* Values for Instruction field above */ 389 390enum AcpiEinjInstructions 391{ 392 ACPI_EINJ_READ_REGISTER = 0, 393 ACPI_EINJ_READ_REGISTER_VALUE = 1, 394 ACPI_EINJ_WRITE_REGISTER = 2, 395 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 396 ACPI_EINJ_NOOP = 4, 397 ACPI_EINJ_FLUSH_CACHELINE = 5, 398 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 399}; 400 401typedef struct acpi_einj_error_type_with_addr 402{ 403 UINT32 ErrorType; 404 UINT32 VendorStructOffset; 405 UINT32 Flags; 406 UINT32 ApicId; 407 UINT64 Address; 408 UINT64 Range; 409 UINT32 PcieId; 410 411} ACPI_EINJ_ERROR_TYPE_WITH_ADDR; 412 413typedef struct acpi_einj_vendor 414{ 415 UINT32 Length; 416 UINT32 PcieId; 417 UINT16 VendorId; 418 UINT16 DeviceId; 419 UINT8 RevisionId; 420 UINT8 Reserved[3]; 421 422} ACPI_EINJ_VENDOR; 423 424 425/* EINJ Trigger Error Action Table */ 426 427typedef struct acpi_einj_trigger 428{ 429 UINT32 HeaderSize; 430 UINT32 Revision; 431 UINT32 TableSize; 432 UINT32 EntryCount; 433 434} ACPI_EINJ_TRIGGER; 435 436/* Command status return values */ 437 438enum AcpiEinjCommandStatus 439{ 440 ACPI_EINJ_SUCCESS = 0, 441 ACPI_EINJ_FAILURE = 1, 442 ACPI_EINJ_INVALID_ACCESS = 2, 443 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 444}; 445 446 447/* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 448 449#define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 450#define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 451#define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 452#define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 453#define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 454#define ACPI_EINJ_MEMORY_FATAL (1<<5) 455#define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 456#define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 457#define ACPI_EINJ_PCIX_FATAL (1<<8) 458#define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 459#define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 460#define ACPI_EINJ_PLATFORM_FATAL (1<<11) 461#define ACPI_EINJ_VENDOR_DEFINED (1<<31) 462 463 464/******************************************************************************* 465 * 466 * ERST - Error Record Serialization Table (ACPI 4.0) 467 * Version 1 468 * 469 ******************************************************************************/ 470 471typedef struct acpi_table_erst 472{ 473 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 474 UINT32 HeaderLength; 475 UINT32 Reserved; 476 UINT32 Entries; 477 478} ACPI_TABLE_ERST; 479 480 481/* ERST Serialization Entries (actions) */ 482 483typedef struct acpi_erst_entry 484{ 485 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 486 487} ACPI_ERST_ENTRY; 488 489/* Masks for Flags field above */ 490 491#define ACPI_ERST_PRESERVE (1) 492 493/* Values for Action field above */ 494 495enum AcpiErstActions 496{ 497 ACPI_ERST_BEGIN_WRITE = 0, 498 ACPI_ERST_BEGIN_READ = 1, 499 ACPI_ERST_BEGIN_CLEAR = 2, 500 ACPI_ERST_END = 3, 501 ACPI_ERST_SET_RECORD_OFFSET = 4, 502 ACPI_ERST_EXECUTE_OPERATION = 5, 503 ACPI_ERST_CHECK_BUSY_STATUS = 6, 504 ACPI_ERST_GET_COMMAND_STATUS = 7, 505 ACPI_ERST_GET_RECORD_ID = 8, 506 ACPI_ERST_SET_RECORD_ID = 9, 507 ACPI_ERST_GET_RECORD_COUNT = 10, 508 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 509 ACPI_ERST_NOT_USED = 12, 510 ACPI_ERST_GET_ERROR_RANGE = 13, 511 ACPI_ERST_GET_ERROR_LENGTH = 14, 512 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 513 ACPI_ERST_EXECUTE_TIMINGS = 16, 514 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 515}; 516 517/* Values for Instruction field above */ 518 519enum AcpiErstInstructions 520{ 521 ACPI_ERST_READ_REGISTER = 0, 522 ACPI_ERST_READ_REGISTER_VALUE = 1, 523 ACPI_ERST_WRITE_REGISTER = 2, 524 ACPI_ERST_WRITE_REGISTER_VALUE = 3, 525 ACPI_ERST_NOOP = 4, 526 ACPI_ERST_LOAD_VAR1 = 5, 527 ACPI_ERST_LOAD_VAR2 = 6, 528 ACPI_ERST_STORE_VAR1 = 7, 529 ACPI_ERST_ADD = 8, 530 ACPI_ERST_SUBTRACT = 9, 531 ACPI_ERST_ADD_VALUE = 10, 532 ACPI_ERST_SUBTRACT_VALUE = 11, 533 ACPI_ERST_STALL = 12, 534 ACPI_ERST_STALL_WHILE_TRUE = 13, 535 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 536 ACPI_ERST_GOTO = 15, 537 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 538 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 539 ACPI_ERST_MOVE_DATA = 18, 540 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 541}; 542 543/* Command status return values */ 544 545enum AcpiErstCommandStatus 546{ 547 ACPI_ERST_SUCESS = 0, 548 ACPI_ERST_NO_SPACE = 1, 549 ACPI_ERST_NOT_AVAILABLE = 2, 550 ACPI_ERST_FAILURE = 3, 551 ACPI_ERST_RECORD_EMPTY = 4, 552 ACPI_ERST_NOT_FOUND = 5, 553 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 554}; 555 556 557/* Error Record Serialization Information */ 558 559typedef struct acpi_erst_info 560{ 561 UINT16 Signature; /* Should be "ER" */ 562 UINT8 Data[48]; 563 564} ACPI_ERST_INFO; 565 566 567/******************************************************************************* 568 * 569 * HEST - Hardware Error Source Table (ACPI 4.0) 570 * Version 1 571 * 572 ******************************************************************************/ 573 574typedef struct acpi_table_hest 575{ 576 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 577 UINT32 ErrorSourceCount; 578 579} ACPI_TABLE_HEST; 580 581 582/* HEST subtable header */ 583 584typedef struct acpi_hest_header 585{ 586 UINT16 Type; 587 UINT16 SourceId; 588 589} ACPI_HEST_HEADER; 590 591 592/* Values for Type field above for subtables */ 593 594enum AcpiHestTypes 595{ 596 ACPI_HEST_TYPE_IA32_CHECK = 0, 597 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 598 ACPI_HEST_TYPE_IA32_NMI = 2, 599 ACPI_HEST_TYPE_NOT_USED3 = 3, 600 ACPI_HEST_TYPE_NOT_USED4 = 4, 601 ACPI_HEST_TYPE_NOT_USED5 = 5, 602 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 603 ACPI_HEST_TYPE_AER_ENDPOINT = 7, 604 ACPI_HEST_TYPE_AER_BRIDGE = 8, 605 ACPI_HEST_TYPE_GENERIC_ERROR = 9, 606 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 607 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 608 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 609}; 610 611 612/* 613 * HEST substructures contained in subtables 614 */ 615 616/* 617 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 618 * ACPI_HEST_IA_CORRECTED structures. 619 */ 620typedef struct acpi_hest_ia_error_bank 621{ 622 UINT8 BankNumber; 623 UINT8 ClearStatusOnInit; 624 UINT8 StatusFormat; 625 UINT8 Reserved; 626 UINT32 ControlRegister; 627 UINT64 ControlData; 628 UINT32 StatusRegister; 629 UINT32 AddressRegister; 630 UINT32 MiscRegister; 631 632} ACPI_HEST_IA_ERROR_BANK; 633 634 635/* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 636 637typedef struct acpi_hest_aer_common 638{ 639 UINT16 Reserved1; 640 UINT8 Flags; 641 UINT8 Enabled; 642 UINT32 RecordsToPreallocate; 643 UINT32 MaxSectionsPerRecord; 644 UINT32 Bus; /* Bus and Segment numbers */ 645 UINT16 Device; 646 UINT16 Function; 647 UINT16 DeviceControl; 648 UINT16 Reserved2; 649 UINT32 UncorrectableMask; 650 UINT32 UncorrectableSeverity; 651 UINT32 CorrectableMask; 652 UINT32 AdvancedCapabilities; 653 654} ACPI_HEST_AER_COMMON; 655 656/* Masks for HEST Flags fields */ 657 658#define ACPI_HEST_FIRMWARE_FIRST (1) 659#define ACPI_HEST_GLOBAL (1<<1) 660#define ACPI_HEST_GHES_ASSIST (1<<2) 661 662/* 663 * Macros to access the bus/segment numbers in Bus field above: 664 * Bus number is encoded in bits 7:0 665 * Segment number is encoded in bits 23:8 666 */ 667#define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF) 668#define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF) 669 670 671/* Hardware Error Notification */ 672 673typedef struct acpi_hest_notify 674{ 675 UINT8 Type; 676 UINT8 Length; 677 UINT16 ConfigWriteEnable; 678 UINT32 PollInterval; 679 UINT32 Vector; 680 UINT32 PollingThresholdValue; 681 UINT32 PollingThresholdWindow; 682 UINT32 ErrorThresholdValue; 683 UINT32 ErrorThresholdWindow; 684 685} ACPI_HEST_NOTIFY; 686 687/* Values for Notify Type field above */ 688 689enum AcpiHestNotifyTypes 690{ 691 ACPI_HEST_NOTIFY_POLLED = 0, 692 ACPI_HEST_NOTIFY_EXTERNAL = 1, 693 ACPI_HEST_NOTIFY_LOCAL = 2, 694 ACPI_HEST_NOTIFY_SCI = 3, 695 ACPI_HEST_NOTIFY_NMI = 4, 696 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 697 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 698 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 699 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 700 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 701 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 702 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 703 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 704}; 705 706/* Values for ConfigWriteEnable bitfield above */ 707 708#define ACPI_HEST_TYPE (1) 709#define ACPI_HEST_POLL_INTERVAL (1<<1) 710#define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 711#define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 712#define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 713#define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 714 715 716/* 717 * HEST subtables 718 */ 719 720/* 0: IA32 Machine Check Exception */ 721 722typedef struct acpi_hest_ia_machine_check 723{ 724 ACPI_HEST_HEADER Header; 725 UINT16 Reserved1; 726 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 727 UINT8 Enabled; 728 UINT32 RecordsToPreallocate; 729 UINT32 MaxSectionsPerRecord; 730 UINT64 GlobalCapabilityData; 731 UINT64 GlobalControlData; 732 UINT8 NumHardwareBanks; 733 UINT8 Reserved3[7]; 734 735} ACPI_HEST_IA_MACHINE_CHECK; 736 737 738/* 1: IA32 Corrected Machine Check */ 739 740typedef struct acpi_hest_ia_corrected 741{ 742 ACPI_HEST_HEADER Header; 743 UINT16 Reserved1; 744 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 745 UINT8 Enabled; 746 UINT32 RecordsToPreallocate; 747 UINT32 MaxSectionsPerRecord; 748 ACPI_HEST_NOTIFY Notify; 749 UINT8 NumHardwareBanks; 750 UINT8 Reserved2[3]; 751 752} ACPI_HEST_IA_CORRECTED; 753 754 755/* 2: IA32 Non-Maskable Interrupt */ 756 757typedef struct acpi_hest_ia_nmi 758{ 759 ACPI_HEST_HEADER Header; 760 UINT32 Reserved; 761 UINT32 RecordsToPreallocate; 762 UINT32 MaxSectionsPerRecord; 763 UINT32 MaxRawDataLength; 764 765} ACPI_HEST_IA_NMI; 766 767 768/* 3,4,5: Not used */ 769 770/* 6: PCI Express Root Port AER */ 771 772typedef struct acpi_hest_aer_root 773{ 774 ACPI_HEST_HEADER Header; 775 ACPI_HEST_AER_COMMON Aer; 776 UINT32 RootErrorCommand; 777 778} ACPI_HEST_AER_ROOT; 779 780 781/* 7: PCI Express AER (AER Endpoint) */ 782 783typedef struct acpi_hest_aer 784{ 785 ACPI_HEST_HEADER Header; 786 ACPI_HEST_AER_COMMON Aer; 787 788} ACPI_HEST_AER; 789 790 791/* 8: PCI Express/PCI-X Bridge AER */ 792 793typedef struct acpi_hest_aer_bridge 794{ 795 ACPI_HEST_HEADER Header; 796 ACPI_HEST_AER_COMMON Aer; 797 UINT32 UncorrectableMask2; 798 UINT32 UncorrectableSeverity2; 799 UINT32 AdvancedCapabilities2; 800 801} ACPI_HEST_AER_BRIDGE; 802 803 804/* 9: Generic Hardware Error Source */ 805 806typedef struct acpi_hest_generic 807{ 808 ACPI_HEST_HEADER Header; 809 UINT16 RelatedSourceId; 810 UINT8 Reserved; 811 UINT8 Enabled; 812 UINT32 RecordsToPreallocate; 813 UINT32 MaxSectionsPerRecord; 814 UINT32 MaxRawDataLength; 815 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 816 ACPI_HEST_NOTIFY Notify; 817 UINT32 ErrorBlockLength; 818 819} ACPI_HEST_GENERIC; 820 821 822/* 10: Generic Hardware Error Source, version 2 */ 823 824typedef struct acpi_hest_generic_v2 825{ 826 ACPI_HEST_HEADER Header; 827 UINT16 RelatedSourceId; 828 UINT8 Reserved; 829 UINT8 Enabled; 830 UINT32 RecordsToPreallocate; 831 UINT32 MaxSectionsPerRecord; 832 UINT32 MaxRawDataLength; 833 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 834 ACPI_HEST_NOTIFY Notify; 835 UINT32 ErrorBlockLength; 836 ACPI_GENERIC_ADDRESS ReadAckRegister; 837 UINT64 ReadAckPreserve; 838 UINT64 ReadAckWrite; 839 840} ACPI_HEST_GENERIC_V2; 841 842 843/* Generic Error Status block */ 844 845typedef struct acpi_hest_generic_status 846{ 847 UINT32 BlockStatus; 848 UINT32 RawDataOffset; 849 UINT32 RawDataLength; 850 UINT32 DataLength; 851 UINT32 ErrorSeverity; 852 853} ACPI_HEST_GENERIC_STATUS; 854 855/* Values for BlockStatus flags above */ 856 857#define ACPI_HEST_UNCORRECTABLE (1) 858#define ACPI_HEST_CORRECTABLE (1<<1) 859#define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 860#define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 861#define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 862 863 864/* Generic Error Data entry */ 865 866typedef struct acpi_hest_generic_data 867{ 868 UINT8 SectionType[16]; 869 UINT32 ErrorSeverity; 870 UINT16 Revision; 871 UINT8 ValidationBits; 872 UINT8 Flags; 873 UINT32 ErrorDataLength; 874 UINT8 FruId[16]; 875 UINT8 FruText[20]; 876 877} ACPI_HEST_GENERIC_DATA; 878 879/* Extension for revision 0x0300 */ 880 881typedef struct acpi_hest_generic_data_v300 882{ 883 UINT8 SectionType[16]; 884 UINT32 ErrorSeverity; 885 UINT16 Revision; 886 UINT8 ValidationBits; 887 UINT8 Flags; 888 UINT32 ErrorDataLength; 889 UINT8 FruId[16]; 890 UINT8 FruText[20]; 891 UINT64 TimeStamp; 892 893} ACPI_HEST_GENERIC_DATA_V300; 894 895/* Values for ErrorSeverity above */ 896 897#define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 898#define ACPI_HEST_GEN_ERROR_FATAL 1 899#define ACPI_HEST_GEN_ERROR_CORRECTED 2 900#define ACPI_HEST_GEN_ERROR_NONE 3 901 902/* Flags for ValidationBits above */ 903 904#define ACPI_HEST_GEN_VALID_FRU_ID (1) 905#define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 906#define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 907 908 909/* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 910 911typedef struct acpi_hest_ia_deferred_check 912{ 913 ACPI_HEST_HEADER Header; 914 UINT16 Reserved1; 915 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 916 UINT8 Enabled; 917 UINT32 RecordsToPreallocate; 918 UINT32 MaxSectionsPerRecord; 919 ACPI_HEST_NOTIFY Notify; 920 UINT8 NumHardwareBanks; 921 UINT8 Reserved2[3]; 922 923} ACPI_HEST_IA_DEFERRED_CHECK; 924 925 926/******************************************************************************* 927 * 928 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.2) 929 * Version 1 930 * 931 ******************************************************************************/ 932 933typedef struct acpi_table_hmat 934{ 935 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 936 UINT32 Reserved; 937 938} ACPI_TABLE_HMAT; 939 940 941/* Values for HMAT structure types */ 942 943enum AcpiHmatType 944{ 945 ACPI_HMAT_TYPE_ADDRESS_RANGE = 0, /* Memory subystem address range */ 946 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 947 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 948 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 949}; 950 951typedef struct acpi_hmat_structure 952{ 953 UINT16 Type; 954 UINT16 Reserved; 955 UINT32 Length; 956 957} ACPI_HMAT_STRUCTURE; 958 959 960/* 961 * HMAT Structures, correspond to Type in ACPI_HMAT_STRUCTURE 962 */ 963 964/* 0: Memory subystem address range */ 965 966typedef struct acpi_hmat_address_range 967{ 968 ACPI_HMAT_STRUCTURE Header; 969 UINT16 Flags; 970 UINT16 Reserved1; 971 UINT32 ProcessorPD; /* Processor proximity domain */ 972 UINT32 MemoryPD; /* Memory proximity domain */ 973 UINT32 Reserved2; 974 UINT64 PhysicalAddressBase; /* Physical address range base */ 975 UINT64 PhysicalAddressLength; /* Physical address range length */ 976 977} ACPI_HMAT_ADDRESS_RANGE; 978 979/* Masks for Flags field above */ 980 981#define ACPI_HMAT_PROCESSOR_PD_VALID (1) /* 1: ProcessorPD field is valid */ 982#define ACPI_HMAT_MEMORY_PD_VALID (1<<1) /* 1: MemoryPD field is valid */ 983#define ACPI_HMAT_RESERVATION_HINT (1<<2) /* 1: Reservation hint */ 984 985 986/* 1: System locality latency and bandwidth information */ 987 988typedef struct acpi_hmat_locality 989{ 990 ACPI_HMAT_STRUCTURE Header; 991 UINT8 Flags; 992 UINT8 DataType; 993 UINT16 Reserved1; 994 UINT32 NumberOfInitiatorPDs; 995 UINT32 NumberOfTargetPDs; 996 UINT32 Reserved2; 997 UINT64 EntryBaseUnit; 998 999} ACPI_HMAT_LOCALITY; 1000 1001/* Masks for Flags field above */ 1002 1003#define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) 1004 1005/* Values for Memory Hierarchy flag */ 1006 1007#define ACPI_HMAT_MEMORY 0 1008#define ACPI_HMAT_LAST_LEVEL_CACHE 1 1009#define ACPI_HMAT_1ST_LEVEL_CACHE 2 1010#define ACPI_HMAT_2ND_LEVEL_CACHE 3 1011#define ACPI_HMAT_3RD_LEVEL_CACHE 4 1012 1013/* Values for DataType field above */ 1014 1015#define ACPI_HMAT_ACCESS_LATENCY 0 1016#define ACPI_HMAT_READ_LATENCY 1 1017#define ACPI_HMAT_WRITE_LATENCY 2 1018#define ACPI_HMAT_ACCESS_BANDWIDTH 3 1019#define ACPI_HMAT_READ_BANDWIDTH 4 1020#define ACPI_HMAT_WRITE_BANDWIDTH 5 1021 1022 1023/* 2: Memory side cache information */ 1024 1025typedef struct acpi_hmat_cache 1026{ 1027 ACPI_HMAT_STRUCTURE Header; 1028 UINT32 MemoryPD; 1029 UINT32 Reserved1; 1030 UINT64 CacheSize; 1031 UINT32 CacheAttributes; 1032 UINT16 Reserved2; 1033 UINT16 NumberOfSMBIOSHandles; 1034 1035} ACPI_HMAT_CACHE; 1036 1037/* Masks for CacheAttributes field above */ 1038 1039#define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 1040#define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 1041#define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 1042#define ACPI_HMAT_WRITE_POLICY (0x0000F000) 1043#define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 1044 1045/* Values for cache associativity flag */ 1046 1047#define ACPI_HMAT_CA_NONE (0) 1048#define ACPI_HMAT_CA_DIRECT_MAPPED (1) 1049#define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 1050 1051/* Values for write policy flag */ 1052 1053#define ACPI_HMAT_CP_NONE (0) 1054#define ACPI_HMAT_CP_WB (1) 1055#define ACPI_HMAT_CP_WT (2) 1056 1057 1058/******************************************************************************* 1059 * 1060 * MADT - Multiple APIC Description Table 1061 * Version 3 1062 * 1063 ******************************************************************************/ 1064 1065typedef struct acpi_table_madt 1066{ 1067 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1068 UINT32 Address; /* Physical address of local APIC */ 1069 UINT32 Flags; 1070 1071} ACPI_TABLE_MADT; 1072 1073/* Masks for Flags field above */ 1074 1075#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1076 1077/* Values for PCATCompat flag */ 1078 1079#define ACPI_MADT_DUAL_PIC 1 1080#define ACPI_MADT_MULTIPLE_APIC 0 1081 1082 1083/* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1084 1085enum AcpiMadtType 1086{ 1087 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1088 ACPI_MADT_TYPE_IO_APIC = 1, 1089 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1090 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1091 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1092 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1093 ACPI_MADT_TYPE_IO_SAPIC = 6, 1094 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1095 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1096 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1097 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1098 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1099 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1100 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1101 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1102 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1103 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */ 1104}; 1105 1106 1107/* 1108 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1109 */ 1110 1111/* 0: Processor Local APIC */ 1112 1113typedef struct acpi_madt_local_apic 1114{ 1115 ACPI_SUBTABLE_HEADER Header; 1116 UINT8 ProcessorId; /* ACPI processor id */ 1117 UINT8 Id; /* Processor's local APIC id */ 1118 UINT32 LapicFlags; 1119 1120} ACPI_MADT_LOCAL_APIC; 1121 1122 1123/* 1: IO APIC */ 1124 1125typedef struct acpi_madt_io_apic 1126{ 1127 ACPI_SUBTABLE_HEADER Header; 1128 UINT8 Id; /* I/O APIC ID */ 1129 UINT8 Reserved; /* Reserved - must be zero */ 1130 UINT32 Address; /* APIC physical address */ 1131 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1132 1133} ACPI_MADT_IO_APIC; 1134 1135 1136/* 2: Interrupt Override */ 1137 1138typedef struct acpi_madt_interrupt_override 1139{ 1140 ACPI_SUBTABLE_HEADER Header; 1141 UINT8 Bus; /* 0 - ISA */ 1142 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1143 UINT32 GlobalIrq; /* Global system interrupt */ 1144 UINT16 IntiFlags; 1145 1146} ACPI_MADT_INTERRUPT_OVERRIDE; 1147 1148 1149/* 3: NMI Source */ 1150 1151typedef struct acpi_madt_nmi_source 1152{ 1153 ACPI_SUBTABLE_HEADER Header; 1154 UINT16 IntiFlags; 1155 UINT32 GlobalIrq; /* Global system interrupt */ 1156 1157} ACPI_MADT_NMI_SOURCE; 1158 1159 1160/* 4: Local APIC NMI */ 1161 1162typedef struct acpi_madt_local_apic_nmi 1163{ 1164 ACPI_SUBTABLE_HEADER Header; 1165 UINT8 ProcessorId; /* ACPI processor id */ 1166 UINT16 IntiFlags; 1167 UINT8 Lint; /* LINTn to which NMI is connected */ 1168 1169} ACPI_MADT_LOCAL_APIC_NMI; 1170 1171 1172/* 5: Address Override */ 1173 1174typedef struct acpi_madt_local_apic_override 1175{ 1176 ACPI_SUBTABLE_HEADER Header; 1177 UINT16 Reserved; /* Reserved, must be zero */ 1178 UINT64 Address; /* APIC physical address */ 1179 1180} ACPI_MADT_LOCAL_APIC_OVERRIDE; 1181 1182 1183/* 6: I/O Sapic */ 1184 1185typedef struct acpi_madt_io_sapic 1186{ 1187 ACPI_SUBTABLE_HEADER Header; 1188 UINT8 Id; /* I/O SAPIC ID */ 1189 UINT8 Reserved; /* Reserved, must be zero */ 1190 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1191 UINT64 Address; /* SAPIC physical address */ 1192 1193} ACPI_MADT_IO_SAPIC; 1194 1195 1196/* 7: Local Sapic */ 1197 1198typedef struct acpi_madt_local_sapic 1199{ 1200 ACPI_SUBTABLE_HEADER Header; 1201 UINT8 ProcessorId; /* ACPI processor id */ 1202 UINT8 Id; /* SAPIC ID */ 1203 UINT8 Eid; /* SAPIC EID */ 1204 UINT8 Reserved[3]; /* Reserved, must be zero */ 1205 UINT32 LapicFlags; 1206 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1207 char UidString[1]; /* String UID - ACPI 3.0 */ 1208 1209} ACPI_MADT_LOCAL_SAPIC; 1210 1211 1212/* 8: Platform Interrupt Source */ 1213 1214typedef struct acpi_madt_interrupt_source 1215{ 1216 ACPI_SUBTABLE_HEADER Header; 1217 UINT16 IntiFlags; 1218 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1219 UINT8 Id; /* Processor ID */ 1220 UINT8 Eid; /* Processor EID */ 1221 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1222 UINT32 GlobalIrq; /* Global system interrupt */ 1223 UINT32 Flags; /* Interrupt Source Flags */ 1224 1225} ACPI_MADT_INTERRUPT_SOURCE; 1226 1227/* Masks for Flags field above */ 1228 1229#define ACPI_MADT_CPEI_OVERRIDE (1) 1230 1231 1232/* 9: Processor Local X2APIC (ACPI 4.0) */ 1233 1234typedef struct acpi_madt_local_x2apic 1235{ 1236 ACPI_SUBTABLE_HEADER Header; 1237 UINT16 Reserved; /* Reserved - must be zero */ 1238 UINT32 LocalApicId; /* Processor x2APIC ID */ 1239 UINT32 LapicFlags; 1240 UINT32 Uid; /* ACPI processor UID */ 1241 1242} ACPI_MADT_LOCAL_X2APIC; 1243 1244 1245/* 10: Local X2APIC NMI (ACPI 4.0) */ 1246 1247typedef struct acpi_madt_local_x2apic_nmi 1248{ 1249 ACPI_SUBTABLE_HEADER Header; 1250 UINT16 IntiFlags; 1251 UINT32 Uid; /* ACPI processor UID */ 1252 UINT8 Lint; /* LINTn to which NMI is connected */ 1253 UINT8 Reserved[3]; /* Reserved - must be zero */ 1254 1255} ACPI_MADT_LOCAL_X2APIC_NMI; 1256 1257 1258/* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */ 1259 1260typedef struct acpi_madt_generic_interrupt 1261{ 1262 ACPI_SUBTABLE_HEADER Header; 1263 UINT16 Reserved; /* Reserved - must be zero */ 1264 UINT32 CpuInterfaceNumber; 1265 UINT32 Uid; 1266 UINT32 Flags; 1267 UINT32 ParkingVersion; 1268 UINT32 PerformanceInterrupt; 1269 UINT64 ParkedAddress; 1270 UINT64 BaseAddress; 1271 UINT64 GicvBaseAddress; 1272 UINT64 GichBaseAddress; 1273 UINT32 VgicInterrupt; 1274 UINT64 GicrBaseAddress; 1275 UINT64 ArmMpidr; 1276 UINT8 EfficiencyClass; 1277 UINT8 Reserved2[3]; 1278 1279} ACPI_MADT_GENERIC_INTERRUPT; 1280 1281/* Masks for Flags field above */ 1282 1283/* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1284#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1285#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1286 1287 1288/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1289 1290typedef struct acpi_madt_generic_distributor 1291{ 1292 ACPI_SUBTABLE_HEADER Header; 1293 UINT16 Reserved; /* Reserved - must be zero */ 1294 UINT32 GicId; 1295 UINT64 BaseAddress; 1296 UINT32 GlobalIrqBase; 1297 UINT8 Version; 1298 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1299 1300} ACPI_MADT_GENERIC_DISTRIBUTOR; 1301 1302/* Values for Version field above */ 1303 1304enum AcpiMadtGicVersion 1305{ 1306 ACPI_MADT_GIC_VERSION_NONE = 0, 1307 ACPI_MADT_GIC_VERSION_V1 = 1, 1308 ACPI_MADT_GIC_VERSION_V2 = 2, 1309 ACPI_MADT_GIC_VERSION_V3 = 3, 1310 ACPI_MADT_GIC_VERSION_V4 = 4, 1311 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1312}; 1313 1314 1315/* 13: Generic MSI Frame (ACPI 5.1) */ 1316 1317typedef struct acpi_madt_generic_msi_frame 1318{ 1319 ACPI_SUBTABLE_HEADER Header; 1320 UINT16 Reserved; /* Reserved - must be zero */ 1321 UINT32 MsiFrameId; 1322 UINT64 BaseAddress; 1323 UINT32 Flags; 1324 UINT16 SpiCount; 1325 UINT16 SpiBase; 1326 1327} ACPI_MADT_GENERIC_MSI_FRAME; 1328 1329/* Masks for Flags field above */ 1330 1331#define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1332 1333 1334/* 14: Generic Redistributor (ACPI 5.1) */ 1335 1336typedef struct acpi_madt_generic_redistributor 1337{ 1338 ACPI_SUBTABLE_HEADER Header; 1339 UINT16 Reserved; /* reserved - must be zero */ 1340 UINT64 BaseAddress; 1341 UINT32 Length; 1342 1343} ACPI_MADT_GENERIC_REDISTRIBUTOR; 1344 1345 1346/* 15: Generic Translator (ACPI 6.0) */ 1347 1348typedef struct acpi_madt_generic_translator 1349{ 1350 ACPI_SUBTABLE_HEADER Header; 1351 UINT16 Reserved; /* reserved - must be zero */ 1352 UINT32 TranslationId; 1353 UINT64 BaseAddress; 1354 UINT32 Reserved2; 1355 1356} ACPI_MADT_GENERIC_TRANSLATOR; 1357 1358 1359/* 1360 * Common flags fields for MADT subtables 1361 */ 1362 1363/* MADT Local APIC flags */ 1364 1365#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1366 1367/* MADT MPS INTI flags (IntiFlags) */ 1368 1369#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1370#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1371 1372/* Values for MPS INTI flags */ 1373 1374#define ACPI_MADT_POLARITY_CONFORMS 0 1375#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1376#define ACPI_MADT_POLARITY_RESERVED 2 1377#define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1378 1379#define ACPI_MADT_TRIGGER_CONFORMS (0) 1380#define ACPI_MADT_TRIGGER_EDGE (1<<2) 1381#define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1382#define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1383 1384 1385/******************************************************************************* 1386 * 1387 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1388 * Version 1 1389 * 1390 ******************************************************************************/ 1391 1392typedef struct acpi_table_msct 1393{ 1394 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1395 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1396 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1397 UINT32 MaxClockDomains; /* Max number of clock domains */ 1398 UINT64 MaxAddress; /* Max physical address in system */ 1399 1400} ACPI_TABLE_MSCT; 1401 1402 1403/* Subtable - Maximum Proximity Domain Information. Version 1 */ 1404 1405typedef struct acpi_msct_proximity 1406{ 1407 UINT8 Revision; 1408 UINT8 Length; 1409 UINT32 RangeStart; /* Start of domain range */ 1410 UINT32 RangeEnd; /* End of domain range */ 1411 UINT32 ProcessorCapacity; 1412 UINT64 MemoryCapacity; /* In bytes */ 1413 1414} ACPI_MSCT_PROXIMITY; 1415 1416 1417/******************************************************************************* 1418 * 1419 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1420 * Version 1 1421 * 1422 ******************************************************************************/ 1423 1424typedef struct acpi_table_nfit 1425{ 1426 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1427 UINT32 Reserved; /* Reserved, must be zero */ 1428 1429} ACPI_TABLE_NFIT; 1430 1431/* Subtable header for NFIT */ 1432 1433typedef struct acpi_nfit_header 1434{ 1435 UINT16 Type; 1436 UINT16 Length; 1437 1438} ACPI_NFIT_HEADER; 1439 1440 1441/* Values for subtable type in ACPI_NFIT_HEADER */ 1442 1443enum AcpiNfitType 1444{ 1445 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1446 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1447 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1448 ACPI_NFIT_TYPE_SMBIOS = 3, 1449 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1450 ACPI_NFIT_TYPE_DATA_REGION = 5, 1451 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1452 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1453 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1454}; 1455 1456/* 1457 * NFIT Subtables 1458 */ 1459 1460/* 0: System Physical Address Range Structure */ 1461 1462typedef struct acpi_nfit_system_address 1463{ 1464 ACPI_NFIT_HEADER Header; 1465 UINT16 RangeIndex; 1466 UINT16 Flags; 1467 UINT32 Reserved; /* Reserved, must be zero */ 1468 UINT32 ProximityDomain; 1469 UINT8 RangeGuid[16]; 1470 UINT64 Address; 1471 UINT64 Length; 1472 UINT64 MemoryMapping; 1473 1474} ACPI_NFIT_SYSTEM_ADDRESS; 1475 1476/* Flags */ 1477 1478#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1479#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1480 1481/* Range Type GUIDs appear in the include/acuuid.h file */ 1482 1483 1484/* 1: Memory Device to System Address Range Map Structure */ 1485 1486typedef struct acpi_nfit_memory_map 1487{ 1488 ACPI_NFIT_HEADER Header; 1489 UINT32 DeviceHandle; 1490 UINT16 PhysicalId; 1491 UINT16 RegionId; 1492 UINT16 RangeIndex; 1493 UINT16 RegionIndex; 1494 UINT64 RegionSize; 1495 UINT64 RegionOffset; 1496 UINT64 Address; 1497 UINT16 InterleaveIndex; 1498 UINT16 InterleaveWays; 1499 UINT16 Flags; 1500 UINT16 Reserved; /* Reserved, must be zero */ 1501 1502} ACPI_NFIT_MEMORY_MAP; 1503 1504/* Flags */ 1505 1506#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1507#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1508#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1509#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1510#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1511#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1512#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1513 1514 1515/* 2: Interleave Structure */ 1516 1517typedef struct acpi_nfit_interleave 1518{ 1519 ACPI_NFIT_HEADER Header; 1520 UINT16 InterleaveIndex; 1521 UINT16 Reserved; /* Reserved, must be zero */ 1522 UINT32 LineCount; 1523 UINT32 LineSize; 1524 UINT32 LineOffset[1]; /* Variable length */ 1525 1526} ACPI_NFIT_INTERLEAVE; 1527 1528 1529/* 3: SMBIOS Management Information Structure */ 1530 1531typedef struct acpi_nfit_smbios 1532{ 1533 ACPI_NFIT_HEADER Header; 1534 UINT32 Reserved; /* Reserved, must be zero */ 1535 UINT8 Data[1]; /* Variable length */ 1536 1537} ACPI_NFIT_SMBIOS; 1538 1539 1540/* 4: NVDIMM Control Region Structure */ 1541 1542typedef struct acpi_nfit_control_region 1543{ 1544 ACPI_NFIT_HEADER Header; 1545 UINT16 RegionIndex; 1546 UINT16 VendorId; 1547 UINT16 DeviceId; 1548 UINT16 RevisionId; 1549 UINT16 SubsystemVendorId; 1550 UINT16 SubsystemDeviceId; 1551 UINT16 SubsystemRevisionId; 1552 UINT8 ValidFields; 1553 UINT8 ManufacturingLocation; 1554 UINT16 ManufacturingDate; 1555 UINT8 Reserved[2]; /* Reserved, must be zero */ 1556 UINT32 SerialNumber; 1557 UINT16 Code; 1558 UINT16 Windows; 1559 UINT64 WindowSize; 1560 UINT64 CommandOffset; 1561 UINT64 CommandSize; 1562 UINT64 StatusOffset; 1563 UINT64 StatusSize; 1564 UINT16 Flags; 1565 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1566 1567} ACPI_NFIT_CONTROL_REGION; 1568 1569/* Flags */ 1570 1571#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1572 1573/* ValidFields bits */ 1574 1575#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1576 1577 1578/* 5: NVDIMM Block Data Window Region Structure */ 1579 1580typedef struct acpi_nfit_data_region 1581{ 1582 ACPI_NFIT_HEADER Header; 1583 UINT16 RegionIndex; 1584 UINT16 Windows; 1585 UINT64 Offset; 1586 UINT64 Size; 1587 UINT64 Capacity; 1588 UINT64 StartAddress; 1589 1590} ACPI_NFIT_DATA_REGION; 1591 1592 1593/* 6: Flush Hint Address Structure */ 1594 1595typedef struct acpi_nfit_flush_address 1596{ 1597 ACPI_NFIT_HEADER Header; 1598 UINT32 DeviceHandle; 1599 UINT16 HintCount; 1600 UINT8 Reserved[6]; /* Reserved, must be zero */ 1601 UINT64 HintAddress[1]; /* Variable length */ 1602 1603} ACPI_NFIT_FLUSH_ADDRESS; 1604 1605 1606/* 7: Platform Capabilities Structure */ 1607 1608typedef struct acpi_nfit_capabilities 1609{ 1610 ACPI_NFIT_HEADER Header; 1611 UINT8 HighestCapability; 1612 UINT8 Reserved[3]; /* Reserved, must be zero */ 1613 UINT32 Capabilities; 1614 UINT32 Reserved2; 1615 1616} ACPI_NFIT_CAPABILITIES; 1617 1618/* Capabilities Flags */ 1619 1620#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1621#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1622#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1623 1624 1625/* 1626 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1627 */ 1628typedef struct nfit_device_handle 1629{ 1630 UINT32 Handle; 1631 1632} NFIT_DEVICE_HANDLE; 1633 1634/* Device handle construction and extraction macros */ 1635 1636#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1637#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1638#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1639#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1640#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1641 1642#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1643#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1644#define ACPI_NFIT_MEMORY_ID_OFFSET 8 1645#define ACPI_NFIT_SOCKET_ID_OFFSET 12 1646#define ACPI_NFIT_NODE_ID_OFFSET 16 1647 1648/* Macro to construct a NFIT/NVDIMM device handle */ 1649 1650#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1651 ((dimm) | \ 1652 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1653 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1654 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1655 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1656 1657/* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1658 1659#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1660 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1661 1662#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1663 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1664 1665#define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1666 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1667 1668#define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1669 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1670 1671#define ACPI_NFIT_GET_NODE_ID(handle) \ 1672 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1673 1674 1675/******************************************************************************* 1676 * 1677 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1678 * Version 0 1679 * 1680 ******************************************************************************/ 1681 1682typedef struct acpi_table_pdtt 1683{ 1684 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1685 UINT8 TriggerCount; 1686 UINT8 Reserved[3]; 1687 UINT32 ArrayOffset; 1688 1689} ACPI_TABLE_PDTT; 1690 1691 1692/* 1693 * PDTT Communication Channel Identifier Structure. 1694 * The number of these structures is defined by TriggerCount above, 1695 * starting at ArrayOffset. 1696 */ 1697typedef struct acpi_pdtt_channel 1698{ 1699 UINT8 SubchannelId; 1700 UINT8 Flags; 1701 1702} ACPI_PDTT_CHANNEL; 1703 1704/* Flags for above */ 1705 1706#define ACPI_PDTT_RUNTIME_TRIGGER (1) 1707#define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1708 1709 1710/******************************************************************************* 1711 * 1712 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1713 * Version 1 1714 * 1715 ******************************************************************************/ 1716 1717typedef struct acpi_table_pptt 1718{ 1719 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1720 1721} ACPI_TABLE_PPTT; 1722 1723/* Values for Type field above */ 1724 1725enum AcpiPpttType 1726{ 1727 ACPI_PPTT_TYPE_PROCESSOR = 0, 1728 ACPI_PPTT_TYPE_CACHE = 1, 1729 ACPI_PPTT_TYPE_ID = 2, 1730 ACPI_PPTT_TYPE_RESERVED = 3 1731}; 1732 1733 1734/* 0: Processor Hierarchy Node Structure */ 1735 1736typedef struct acpi_pptt_processor 1737{ 1738 ACPI_SUBTABLE_HEADER Header; 1739 UINT16 Reserved; 1740 UINT32 Flags; 1741 UINT32 Parent; 1742 UINT32 AcpiProcessorId; 1743 UINT32 NumberOfPrivResources; 1744 1745} ACPI_PPTT_PROCESSOR; 1746 1747/* Flags */ 1748 1749#define ACPI_PPTT_PHYSICAL_PACKAGE (1) /* Physical package */ 1750#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (2) /* ACPI Processor ID valid */ 1751 1752 1753/* 1: Cache Type Structure */ 1754 1755typedef struct acpi_pptt_cache 1756{ 1757 ACPI_SUBTABLE_HEADER Header; 1758 UINT16 Reserved; 1759 UINT32 Flags; 1760 UINT32 NextLevelOfCache; 1761 UINT32 Size; 1762 UINT32 NumberOfSets; 1763 UINT8 Associativity; 1764 UINT8 Attributes; 1765 UINT16 LineSize; 1766 1767} ACPI_PPTT_CACHE; 1768 1769/* Flags */ 1770 1771#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1772#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1773#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1774#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1775#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1776#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1777#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1778 1779/* Masks for Attributes */ 1780 1781#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 1782#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 1783#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 1784 1785/* Attributes describing cache */ 1786#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 1787#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 1788#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 1789#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 1790 1791#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 1792#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 1793#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 1794#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 1795 1796#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 1797#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 1798 1799/* 2: ID Structure */ 1800 1801typedef struct acpi_pptt_id 1802{ 1803 ACPI_SUBTABLE_HEADER Header; 1804 UINT16 Reserved; 1805 UINT32 VendorId; 1806 UINT64 Level1Id; 1807 UINT64 Level2Id; 1808 UINT16 MajorRev; 1809 UINT16 MinorRev; 1810 UINT16 SpinRev; 1811 1812} ACPI_PPTT_ID; 1813 1814 1815/******************************************************************************* 1816 * 1817 * SBST - Smart Battery Specification Table 1818 * Version 1 1819 * 1820 ******************************************************************************/ 1821 1822typedef struct acpi_table_sbst 1823{ 1824 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1825 UINT32 WarningLevel; 1826 UINT32 LowLevel; 1827 UINT32 CriticalLevel; 1828 1829} ACPI_TABLE_SBST; 1830 1831 1832/******************************************************************************* 1833 * 1834 * SDEV - Secure Devices Table (ACPI 6.2) 1835 * Version 1 1836 * 1837 ******************************************************************************/ 1838 1839typedef struct acpi_table_sdev 1840{ 1841 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1842 1843} ACPI_TABLE_SDEV; 1844 1845 1846typedef struct acpi_sdev_header 1847{ 1848 UINT8 Type; 1849 UINT8 Flags; 1850 UINT16 Length; 1851 1852} ACPI_SDEV_HEADER; 1853 1854 1855/* Values for subtable type above */ 1856 1857enum AcpiSdevType 1858{ 1859 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 1860 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 1861 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1862}; 1863 1864/* Values for flags above */ 1865 1866#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 1867 1868/* 1869 * SDEV subtables 1870 */ 1871 1872/* 0: Namespace Device Based Secure Device Structure */ 1873 1874typedef struct acpi_sdev_namespace 1875{ 1876 ACPI_SDEV_HEADER Header; 1877 UINT16 DeviceIdOffset; 1878 UINT16 DeviceIdLength; 1879 UINT16 VendorDataOffset; 1880 UINT16 VendorDataLength; 1881 1882} ACPI_SDEV_NAMESPACE; 1883 1884/* 1: PCIe Endpoint Device Based Device Structure */ 1885 1886typedef struct acpi_sdev_pcie 1887{ 1888 ACPI_SDEV_HEADER Header; 1889 UINT16 Segment; 1890 UINT16 StartBus; 1891 UINT16 PathOffset; 1892 UINT16 PathLength; 1893 UINT16 VendorDataOffset; 1894 UINT16 VendorDataLength; 1895 1896} ACPI_SDEV_PCIE; 1897 1898/* 1a: PCIe Endpoint path entry */ 1899 1900typedef struct acpi_sdev_pcie_path 1901{ 1902 UINT8 Device; 1903 UINT8 Function; 1904 1905} ACPI_SDEV_PCIE_PATH; 1906 1907 1908/******************************************************************************* 1909 * 1910 * SLIT - System Locality Distance Information Table 1911 * Version 1 1912 * 1913 ******************************************************************************/ 1914 1915typedef struct acpi_table_slit 1916{ 1917 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1918 UINT64 LocalityCount; 1919 UINT8 Entry[1]; /* Real size = localities^2 */ 1920 1921} ACPI_TABLE_SLIT; 1922 1923 1924/******************************************************************************* 1925 * 1926 * SRAT - System Resource Affinity Table 1927 * Version 3 1928 * 1929 ******************************************************************************/ 1930 1931typedef struct acpi_table_srat 1932{ 1933 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1934 UINT32 TableRevision; /* Must be value '1' */ 1935 UINT64 Reserved; /* Reserved, must be zero */ 1936 1937} ACPI_TABLE_SRAT; 1938 1939/* Values for subtable type in ACPI_SUBTABLE_HEADER */ 1940 1941enum AcpiSratType 1942{ 1943 ACPI_SRAT_TYPE_CPU_AFFINITY = 0, 1944 ACPI_SRAT_TYPE_MEMORY_AFFINITY = 1, 1945 ACPI_SRAT_TYPE_X2APIC_CPU_AFFINITY = 2, 1946 ACPI_SRAT_TYPE_GICC_AFFINITY = 3, 1947 ACPI_SRAT_TYPE_GIC_ITS_AFFINITY = 4, /* ACPI 6.2 */ 1948 ACPI_SRAT_TYPE_RESERVED = 5 /* 5 and greater are reserved */ 1949}; 1950 1951/* 1952 * SRAT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1953 */ 1954 1955/* 0: Processor Local APIC/SAPIC Affinity */ 1956 1957typedef struct acpi_srat_cpu_affinity 1958{ 1959 ACPI_SUBTABLE_HEADER Header; 1960 UINT8 ProximityDomainLo; 1961 UINT8 ApicId; 1962 UINT32 Flags; 1963 UINT8 LocalSapicEid; 1964 UINT8 ProximityDomainHi[3]; 1965 UINT32 ClockDomain; 1966 1967} ACPI_SRAT_CPU_AFFINITY; 1968 1969/* Flags */ 1970 1971#define ACPI_SRAT_CPU_USE_AFFINITY (1) /* 00: Use affinity structure */ 1972 1973 1974/* 1: Memory Affinity */ 1975 1976typedef struct acpi_srat_mem_affinity 1977{ 1978 ACPI_SUBTABLE_HEADER Header; 1979 UINT32 ProximityDomain; 1980 UINT16 Reserved; /* Reserved, must be zero */ 1981 UINT64 BaseAddress; 1982 UINT64 Length; 1983 UINT32 Reserved1; 1984 UINT32 Flags; 1985 UINT64 Reserved2; /* Reserved, must be zero */ 1986 1987} ACPI_SRAT_MEM_AFFINITY; 1988 1989/* Flags */ 1990 1991#define ACPI_SRAT_MEM_ENABLED (1) /* 00: Use affinity structure */ 1992#define ACPI_SRAT_MEM_HOT_PLUGGABLE (1<<1) /* 01: Memory region is hot pluggable */ 1993#define ACPI_SRAT_MEM_NON_VOLATILE (1<<2) /* 02: Memory region is non-volatile */ 1994 1995 1996/* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */ 1997 1998typedef struct acpi_srat_x2apic_cpu_affinity 1999{ 2000 ACPI_SUBTABLE_HEADER Header; 2001 UINT16 Reserved; /* Reserved, must be zero */ 2002 UINT32 ProximityDomain; 2003 UINT32 ApicId; 2004 UINT32 Flags; 2005 UINT32 ClockDomain; 2006 UINT32 Reserved2; 2007 2008} ACPI_SRAT_X2APIC_CPU_AFFINITY; 2009 2010/* Flags for ACPI_SRAT_CPU_AFFINITY and ACPI_SRAT_X2APIC_CPU_AFFINITY */ 2011 2012#define ACPI_SRAT_CPU_ENABLED (1) /* 00: Use affinity structure */ 2013 2014 2015/* 3: GICC Affinity (ACPI 5.1) */ 2016 2017typedef struct acpi_srat_gicc_affinity 2018{ 2019 ACPI_SUBTABLE_HEADER Header; 2020 UINT32 ProximityDomain; 2021 UINT32 AcpiProcessorUid; 2022 UINT32 Flags; 2023 UINT32 ClockDomain; 2024 2025} ACPI_SRAT_GICC_AFFINITY; 2026 2027/* Flags for ACPI_SRAT_GICC_AFFINITY */ 2028 2029#define ACPI_SRAT_GICC_ENABLED (1) /* 00: Use affinity structure */ 2030 2031 2032/* 4: GCC ITS Affinity (ACPI 6.2) */ 2033 2034typedef struct acpi_srat_gic_its_affinity 2035{ 2036 ACPI_SUBTABLE_HEADER Header; 2037 UINT32 ProximityDomain; 2038 UINT16 Reserved; 2039 UINT32 ItsId; 2040 2041} ACPI_SRAT_GIC_ITS_AFFINITY; 2042 2043 2044/* Reset to default packing */ 2045 2046#pragma pack() 2047 2048#endif /* __ACTBL1_H__ */ 2049