| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MBlaze/MCTargetDesc/ |
| H A D | MBlazeMCCodeEmitter.cpp | 51 unsigned getMachineOpValue(const MCInst &MI, unsigned OpIdx) const { argument
109 unsigned MBlazeMCCodeEmitter::getMachineOpValue(const MCInst &MI, argument
135 EmitIMM(const MCInst &MI, unsigne argument
150 EmitImmediate(const MCInst &MI, unsigned opNo, bool pcrel, unsigned &CurByte, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups) const argument
178 EncodeInstruction(const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups) const argument
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCCodeEmitter.cpp | 109 EncodeInstruction(const MCInst &MI, raw_ostream &OS, argument
139 getBranchTargetOpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups) const argument
159 getJumpTargetOpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups) const argument
177 getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixups) const argument
279 getMemEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups) const argument
290 getSizeExtEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups) const argument
300 getSizeInsEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups) const argument
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/ |
| H A D | MipsCodeEmitter.cpp | 156 getRelocation(const MachineInstr &MI, const MachineOperand &MO) const argument
171 getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const argument
185 getBranchTargetOpValue(const MachineInstr &MI, unsigned OpNo) const argument
192 getMemEncoding(const MachineInstr &MI, unsigned OpNo) const argument
200 getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const argument
206 getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const argument
215 getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO) const argument
274 emitUSW(const MachineInstr &MI) argument
287 emitULW(const MachineInstr &MI) argument
314 emitUSH(const MachineInstr &MI) argument
331 emitULH(const MachineInstr &MI) argument
351 emitULHu(const MachineInstr &MI) argument
371 emitInstruction(const MachineInstr &MI) argument
[all...] |
| H A D | MipsSEInstrInfo.cpp | 42 isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const argument
67 isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const argument
[all...] |
| H A D | MipsAsmPrinter.cpp | 60 void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) { argument
323 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, argument
419 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument
433 printOperand(const MachineInstr *MI, int opNum, raw_ostream &O) argument
505 printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O) argument
515 printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O) argument
526 printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O) argument
536 printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O, const char *Modifier) argument
575 PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS) argument
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.cpp | 40 unsigned SparcInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, argument
59 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr *MI, argument
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
| H A D | X86CodeEmitter.cpp | 159 static unsigned determineREX(const MachineInstr &MI) { argument
[all...] |
| H A D | X86InstrBuilder.h | 149 MachineInstr *MI = MIB; local
|
| H A D | X86InstrInfo.h | 112 inline static bool isLeaMem(const MachineInstr *MI, unsigned Op) { argument
123 isMem(const MachineInstr *MI, unsigned Op) argument
[all...] |
| H A D | X86MCInstLower.cpp | 203 static void lower_subreg32(MCInst *MI, unsigned OpNo) { argument
210 static void lower_lea64_32mem(MCInst *MI, unsigned OpNo) { argument
307 void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { argument
548 LowerTlsAddr(MCStreamer &OutStreamer, X86MCInstLower &MCInstLowering, const MachineInstr &MI) argument
638 EmitInstruction(const MachineInstr *MI) argument
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/XCore/ |
| H A D | XCoreAsmPrinter.cpp | 67 void printInlineJT32(const MachineInstr *MI, int opNum, raw_ostream &O) { argument
195 printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O) argument
207 printInlineJT(const MachineInstr *MI, int opNum, raw_ostream &O, const std::string &directive) argument
223 printOperand(const MachineInstr *MI, int opNum, raw_ostream &O) argument
260 PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant,const char *ExtraCode, raw_ostream &O) argument
277 PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS) argument
304 EmitInstruction(const MachineInstr *MI) argument
[all...] |
| H A D | XCoreFrameLowering.cpp | 272 spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument
306 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument
[all...] |
| H A D | XCoreInstrInfo.cpp | 57 XCoreInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const{ argument
78 XCoreInstrInfo::isStoreToStackSlot(const MachineInstr *MI, argument
[all...] |
| H A D | XCoreRegisterInfo.cpp | 160 MachineInstr &MI = *II; local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/tools/bugpoint/ |
| H A D | ExtractFunction.cpp | 185 Module::iterator MI = NewM->begin(); local
|
| /macosx-10.9.5/llvmCore-3425.0.33/include/llvm/CodeGen/ |
| H A D | MachineInstrBuilder.h | 45 MachineInstr *MI; member in class:llvm::MachineInstrBuilder
230 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); local
240 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); local
267 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); local
276 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/include/llvm/MC/ |
| H A D | MCInst.h | 197 inline raw_ostream& operator<<(raw_ostream &OS, const MCInst &MI) { argument
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/ |
| H A D | MachineInstr.cpp | 605 MachineInstr(MachineFunction &MF, const MachineInstr &MI) argument
[all...] |
| H A D | MachineSSAUpdater.cpp | 209 MachineBasicBlock *findCorrespondingPred(const MachineInstr *MI, argument
|
| H A D | MachineSink.cpp | 124 bool MachineSinking::PerformTrivialForwardCoalescing(MachineInstr *MI, argument
268 MachineInstr *MI = I; // The instruction to sink. local
294 isWorthBreakingCriticalEdge(MachineInstr *MI, MachineBasicBlock *From, MachineBasicBlock *To) argument
324 SplitCriticalEdge(MachineInstr *MI, MachineBasicBlock *FromBB, MachineBasicBlock *ToBB, bool BreakPHIEdge) argument
392 AvoidsSinking(MachineInstr *MI, MachineRegisterInfo *MRI) argument
398 collectDebugValues(MachineInstr *MI, SmallVector<MachineInstr *, 2> & DbgValues) argument
433 isProfitableToSinkTo(unsigned Reg, MachineInstr *MI, MachineBasicBlock *MBB, MachineBasicBlock *SuccToSinkTo) argument
472 FindSuccToSinkTo(MachineInstr *MI, MachineBasicBlock *MBB, bool &BreakPHIEdge) argument
579 SinkInstruction(MachineInstr *MI, bool &SawStore) argument
[all...] |
| H A D | PostRASchedulerList.cpp | 316 MachineInstr *MI = llvm::prior(I); local
402 Observe(MachineInstr *MI, unsigned Count) argument
451 ToggleKillFlag(MachineInstr *MI, MachineOperand &MO) argument
500 MachineInstr *MI = --I; local
[all...] |
| H A D | PrologEpilogInserter.cpp | 762 MachineInstr *MI = I; local
828 MachineInstr *MI = I; local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 80 void MLxExpansion::pushStack(MachineInstr *MI) { argument
212 FindMLxHazard(MachineInstr *MI) argument
271 ExpandFPMLxInstruction(MachineBasicBlock &MBB, MachineInstr *MI, unsigned MulOpc, unsigned AddSubOpc, bool NegAcc, bool HasLane) argument
336 MachineInstr *MI = &*MII; local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/ |
| H A D | PPCAsmPrinter.cpp | 147 printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) argument
245 PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument
283 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument
300 EmitInstruction(const MachineInstr *MI) argument
[all...] |
| H A D | PPCInstrInfo.cpp | 86 bool PPCInstrInfo::isCoalescableExtInstr(const MachineInstr &MI, argument
100 unsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, argument
118 isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const argument
139 commuteInstruction(MachineInstr *MI, bool NewMI) const argument
587 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
722 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
[all...] |