/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/AsmParser/ |
H A D | PPCAsmParser.cpp | 273 void addRegOperands(MCInst &Inst, unsigned N) const { argument 277 void addRegGPRCOperands(MCInst &Inst, unsigned N) const { argument 282 void addRegGPRCNoR0Operands(MCInst &Inst, unsigned N) const { argument 287 void addRegG8RCOperands(MCInst &Inst, unsigned N) const { argument 292 void addRegG8RCNoX0Operands(MCInst &Inst, unsigned N) const { argument 297 addRegGxRCOperands(MCInst &Inst, unsigned N) const argument 304 addRegGxRCNoR0Operands(MCInst &Inst, unsigned N) const argument 311 addRegF4RCOperands(MCInst &Inst, unsigned N) const argument 316 addRegF8RCOperands(MCInst &Inst, unsigned N) const argument 321 addRegVRRCOperands(MCInst &Inst, unsigned N) const argument 326 addRegCRBITRCOperands(MCInst &Inst, unsigned N) const argument 331 addRegCRRCOperands(MCInst &Inst, unsigned N) const argument 336 addCRBitMaskOperands(MCInst &Inst, unsigned N) const argument 341 addImmOperands(MCInst &Inst, unsigned N) const argument 349 addDispRIOperands(MCInst &Inst, unsigned N) const argument 357 addDispRIXOperands(MCInst &Inst, unsigned N) const argument 420 ProcessInstruction(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 477 MCInst Inst; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/SystemZ/AsmParser/ |
H A D | SystemZAsmParser.cpp | 90 void addExpr(MCInst &Inst, const MCExpr *Expr) const { argument 200 void addRegOperands(MCInst &Inst, unsigned N) const { argument 204 void addAccessRegOperands(MCInst &Inst, unsigned N) const { argument 209 void addImmOperands(MCInst &Inst, unsigned N) const { argument 213 addBDAddrOperands(MCInst &Inst, unsigned N) const argument 219 addBDXAddrOperands(MCInst &Inst, unsigned N) const argument 624 MCInst Inst; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 847 Instruction *Inst = --I; local
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H A D | InstructionCombining.cpp | 2207 Instruction *Inst = BBI++; local 2221 << *Inst << '\n'); local 2319 Instruction *Inst = --I; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Transforms/Scalar/ |
H A D | LoopIdiomRecognize.cpp | 447 Instruction *Inst = Iter; local 740 Instruction *Inst = I++; local [all...] |
H A D | MemCpyOptimizer.cpp | 204 void addInst(int64_t OffsetFromFirst, Instruction *Inst) { argument 239 addRange(int64_t Start, int64_t Size, Value *Ptr, unsigned Alignment, Instruction *Inst) argument
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H A D | SCCP.cpp | 1540 Instruction *Inst = --I; local 1593 Instruction *Inst = BI++; local 1607 DEBUG(dbgs() << " Constant: " << *Const << " = " << *Inst); local 1802 Instruction *Inst = BI++; local 1815 DEBUG(dbgs() << " Constant: " << *Const << " = " << *Inst); local [all...] |
H A D | IndVarSimplify.cpp | 527 Instruction *Inst = cast<Instruction>(InVal); local 580 << " LoopVal = " << *Inst << "\n"); local 762 Instruction *Inst = dyn_cast<Instruction>(V); local [all...] |
H A D | ScalarReplAggregates.cpp | 2156 void SROA::RewriteMemIntrinUserOfAlloca(MemIntrinsic *MI, Instruction *Inst, argument [all...] |
H A D | GVN.cpp | 1336 static bool isLifetimeStart(const Instruction *Inst) { argument
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/freebsd-10.0-release/contrib/llvm/lib/Transforms/Utils/ |
H A D | PromoteMemoryToRegister.cpp | 382 Instruction *Inst = cast<Instruction>(*UI); local
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/freebsd-10.0-release/contrib/llvm/include/llvm/MC/ |
H A D | MCAssembler.h | 288 MCInst Inst; member in class:llvm::MCRelaxableFragment
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/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGISel.cpp | 1014 const Instruction *Inst = llvm::prior(BI); local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/MC/ |
H A D | MCAsmStreamer.cpp | 1218 void MCAsmStreamer::AddEncodingComment(const MCInst &Inst) { argument
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H A D | MCDwarf.cpp | 1332 MCCFIInstruction Inst = local 1339 MCCFIInstruction Inst = local
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/freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 777 void addExpr(MCInst &Inst, const MCExpr *Expr) const { argument 786 void addBFILSBOperands(MCInst &Inst, unsigned N) const { argument 793 void addBFIWidthOperands(MCInst &Inst, unsigned N) const { argument 799 void addBFXWidthOperands(MCInst &Inst, unsigned N) const { argument 808 addCondCodeOperands(MCInst &Inst, unsigned N) const argument 813 addCVTFixedPosOperands(MCInst &Inst, unsigned N) const argument 820 addFMOVImmOperands(MCInst &Inst, unsigned N) const argument 830 addFPZeroOperands(MCInst &Inst, unsigned N) const argument 835 addInvCondCodeOperands(MCInst &Inst, unsigned N) const argument 841 addRegOperands(MCInst &Inst, unsigned N) const argument 846 addImmOperands(MCInst &Inst, unsigned N) const argument 852 addSImm7ScaledOperands(MCInst &Inst, unsigned N) const argument 861 addSImmOperands(MCInst &Inst, unsigned N) const argument 869 addImmWithLSLOperands(MCInst &Inst, unsigned N) const argument 876 addLabelOperands(MCInst &Inst, unsigned N) const argument 894 addOffsetUImm12Operands(MCInst &Inst, unsigned N) const argument 905 addLogicalImmOperands(MCInst &Inst, unsigned N) const argument 915 addMRSOperands(MCInst &Inst, unsigned N) const argument 925 addMSRWithRegOperands(MCInst &Inst, unsigned N) const argument 935 addMSRPStateOperands(MCInst &Inst, unsigned N) const argument 945 addMoveWideImmOperands(MCInst &Inst, unsigned N) const argument 993 addMoveWideMovAliasOperands(MCInst &Inst, unsigned N) const argument 1012 addPRFMOperands(MCInst &Inst, unsigned N) const argument 1023 addRegExtendOperands(MCInst &Inst, unsigned N) const argument 1031 addAddrRegExtendOperands(MCInst &Inst, unsigned N) const argument 1035 addAddrRegExtendOperands(MCInst &Inst, unsigned N, unsigned MemSize) const argument 1063 addShiftOperands(MCInst &Inst, unsigned N) const argument 1729 validateInstruction(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 1947 MCInst Inst; local 1960 MCInst Inst; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 256 void addRegOperands(MCInst &Inst, unsigned N) const { argument 261 void addExpr(MCInst &Inst, cons argument 271 addImmOperands(MCInst &Inst, unsigned N) const argument 277 addMemOperands(MCInst &Inst, unsigned N) const argument 359 addCPURegsAsmOperands(MCInst &Inst, unsigned N) const argument 366 addCPU64RegsAsmOperands(MCInst &Inst, unsigned N) const argument 374 addHWRegsAsmOperands(MCInst &Inst, unsigned N) const argument 382 addHW64RegsAsmOperands(MCInst &Inst, unsigned N) const argument 386 addCCRAsmOperands(MCInst &Inst, unsigned N) const argument 417 processInstruction(MCInst &Inst, SMLoc IDLoc, SmallVectorImpl<MCInst> &Instructions) argument 476 needsExpansion(MCInst &Inst) argument 488 expandInstruction(MCInst &Inst, SMLoc IDLoc, SmallVectorImpl<MCInst> &Instructions) argument 500 expandLoadImm(MCInst &Inst, SMLoc IDLoc, SmallVectorImpl<MCInst> &Instructions) argument 544 expandLoadAddressReg(MCInst &Inst, SMLoc IDLoc, SmallVectorImpl<MCInst> &Instructions) argument 586 expandLoadAddressImm(MCInst &Inst, SMLoc IDLoc, SmallVectorImpl<MCInst> &Instructions) argument 619 expandMemInst(MCInst &Inst, SMLoc IDLoc, SmallVectorImpl<MCInst> &Instructions, bool isLoad, bool isImmOpnd) argument 705 MCInst Inst; local [all...] |
/freebsd-10.0-release/contrib/llvm/tools/clang/lib/Sema/ |
H A D | SemaTemplateInstantiate.cpp | 182 ActiveTemplateInstantiation Inst; local 205 ActiveTemplateInstantiation Inst; local 229 ActiveTemplateInstantiation Inst; local 255 ActiveTemplateInstantiation Inst; local 283 ActiveTemplateInstantiation Inst; local 307 ActiveTemplateInstantiation Inst; local 331 ActiveTemplateInstantiation Inst; local 355 ActiveTemplateInstantiation Inst; local 379 ActiveTemplateInstantiation Inst; local 2699 InstantiatedLocal(const Decl *D, Decl *Inst) argument 2710 InstantiatedLocalPackArg(const Decl *D, Decl *Inst) argument [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 900 DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 911 DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 923 DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 930 DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 960 DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 977 DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 998 DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1008 DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1016 DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1031 DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1051 DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1072 DecodeDPairSpacedRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1084 DecodePredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1098 DecodeCCOutOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1107 DecodeSOImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1116 DecodeSORegImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1153 DecodeSORegRegOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1188 DecodeRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1223 DecodeSPRRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1240 DecodeDPRRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1259 DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1286 DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1431 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1536 DecodeSORegMemOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1580 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1771 DecodeRFEInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1800 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1885 DecodeCPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1925 DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1967 DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1991 DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2018 DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2046 DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2066 DecodeAddrMode5Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2085 DecodeAddrMode7Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2091 DecodeT2BInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2118 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2144 DecodeAddrMode6Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2161 DecodeVLDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2435 DecodeVSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2706 DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2753 DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2801 DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2836 DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2891 DecodeNEONModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2936 DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2955 DecodeShiftRight8Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2961 DecodeShiftRight16Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2967 DecodeShiftRight32Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2973 DecodeShiftRight64Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2979 DecodeTBLInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3015 DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3039 DecodeThumbBROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3047 DecodeT2BROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3055 DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3063 DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3078 DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3092 DecodeThumbAddrModePC(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3102 DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3110 DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3127 DecodeT2LoadShift(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3182 DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3196 DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3211 DecodeT2AddrModeImm0_1020s4(MCInst &Inst,unsigned Val, uint64_t Address, const void *Decoder) argument 3226 DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3239 DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3270 DecodeT2LdStPre(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3300 DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3315 DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3326 DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3351 DecodeThumbCPS(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3362 DecodePostIdxReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3375 DecodeThumbBLXOffset(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3399 DecodeCoprocessor(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3409 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3425 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3467 DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3499 DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3507 DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3530 DecodeMemBarrierOption(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3539 DecodeMSRMask(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3546 DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3569 DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3596 DecodeLDRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3621 DecodeLDRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3649 DecodeSTRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3674 DecodeSTRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3699 DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3766 DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3832 DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3899 DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3963 DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4033 DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4097 DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4178 DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4250 DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4276 DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4302 DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4324 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4361 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4395 DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) argument 4410 DecodeT2ShifterImmOperand(MCInst &Inst, uint32_t Val, uint64_t Address, const void *Decoder) argument 4421 DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4448 DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4476 DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4504 DecodeImm0_4(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4513 DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 4540 DecodeMRRC2(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/X86/AsmParser/ |
H A D | X86AsmParser.cpp | 839 void addExpr(MCInst &Inst, const MCExpr *Expr) const { argument 847 void addRegOperands(MCInst &Inst, unsigned N) const { argument 852 void addImmOperands(MCInst &Inst, unsigned N) const { argument 857 void addMem8Operands(MCInst &Inst, unsigned N) const { argument 860 addMem16Operands(MCInst &Inst, unsigned N) const argument 863 addMem32Operands(MCInst &Inst, unsigned N) const argument 866 addMem64Operands(MCInst &Inst, unsigned N) const argument 869 addMem80Operands(MCInst &Inst, unsigned N) const argument 872 addMem128Operands(MCInst &Inst, unsigned N) const argument 875 addMem256Operands(MCInst &Inst, unsigned N) const argument 878 addMemVX32Operands(MCInst &Inst, unsigned N) const argument 881 addMemVY32Operands(MCInst &Inst, unsigned N) const argument 884 addMemVX64Operands(MCInst &Inst, unsigned N) const argument 887 addMemVY64Operands(MCInst &Inst, unsigned N) const argument 891 addMemOperands(MCInst &Inst, unsigned N) const argument 900 addAbsMemOperands(MCInst &Inst, unsigned N) const argument 2127 convertToSExti8(MCInst &Inst, unsigned Opcode, unsigned Reg, bool isCmp) argument 2139 convert16i16to16ri8(MCInst &Inst, unsigned Opcode, bool isCmp = false) argument 2148 convert32i32to32ri8(MCInst &Inst, unsigned Opcode, bool isCmp = false) argument 2157 convert64i32to64ri8(MCInst &Inst, unsigned Opcode, bool isCmp = false) argument 2167 processInstruction(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Ops) argument 2217 MCInst Inst; local 2240 MCInst Inst; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Transforms/IPO/ |
H A D | GlobalOpt.cpp | 1161 const Instruction *Inst = cast<Instruction>(*UI); local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Transforms/Instrumentation/ |
H A D | AddressSanitizer.cpp | 1154 Instruction *Inst = ToInstrument[i]; local
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/freebsd-10.0-release/contrib/llvm/lib/Transforms/ObjCARC/ |
H A D | ObjCARCOpts.cpp | 798 AppendMDNodeToInstForPtr(unsigned NodeId, Instruction *Inst, Value *Ptr, MDString *PtrSourceMDNodeID, Sequence OldSeq, Sequence NewSeq) argument 903 GenerateARCAnnotation(unsigned InstMDId, unsigned PtrMDId, Instruction *Inst, Value *Ptr, Sequence OldSeq, Sequence NewSeq) argument 1136 IsRetainBlockOptimizable(const Instruction *Inst) argument 1341 OptimizeRetainBlockCall(Function &F, Instruction *Inst, InstructionClass &Class) argument 1373 Instruction *Inst = &*I++; local 1377 DEBUG(dbgs() << "Visiting: Class: " << Class << "; " << *Inst << "\\n"); local 1783 VisitInstructionBottomUp(Instruction *Inst, BasicBlock *BB, MapVector<Value *, RRInfo> &Retains, BBState &MyStates) argument 1989 Instruction *Inst = llvm::prior(I); local 2018 VisitInstructionTopDown(Instruction *Inst, DenseMap<Value *, RRInfo> &Releases, BBState &MyStates) argument 2199 Instruction *Inst = I; local 2649 Instruction *Inst = &*I++; local 2757 Instruction *Inst = &*I++; local 2984 Instruction *Inst = &*I++; local [all...] |
/freebsd-10.0-release/contrib/llvm/tools/clang/lib/CodeGen/ |
H A D | CGCall.cpp | 2011 CodeGenFunction::AddObjCARCExceptionMetadata(llvm::Instruction *Inst) { argument 2105 llvm::Instruction *Inst; local
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H A D | CodeGenFunction.h | 1013 llvm::Instruction *Inst; member in class:clang::CodeGen::PeepholeProtection
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