Lines Matching defs:Inst
154 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
156 static DecodeStatus DecodeGPRnopcRegisterClass(MCInst &Inst,
159 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo,
161 static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo,
163 static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo,
165 static DecodeStatus DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo,
167 static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo,
169 static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo,
171 static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst &Inst,
175 static DecodeStatus DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo,
177 static DecodeStatus DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo,
179 static DecodeStatus DecodeDPairSpacedRegisterClass(MCInst &Inst,
183 static DecodeStatus DecodePredicateOperand(MCInst &Inst, unsigned Val,
185 static DecodeStatus DecodeCCOutOperand(MCInst &Inst, unsigned Val,
187 static DecodeStatus DecodeSOImmOperand(MCInst &Inst, unsigned Val,
189 static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Val,
191 static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val,
193 static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val,
196 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
198 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
200 static DecodeStatus DecodeAddrMode2IdxInstruction(MCInst &Inst,
204 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
206 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst,unsigned Insn,
208 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
210 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
213 static DecodeStatus DecodeMemMultipleWritebackInstruction(MCInst & Inst,
217 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
219 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
221 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
223 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
225 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
227 static DecodeStatus DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val,
229 static DecodeStatus DecodeAddrMode5Operand(MCInst &Inst, unsigned Val,
231 static DecodeStatus DecodeAddrMode7Operand(MCInst &Inst, unsigned Val,
233 static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
235 static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst,unsigned Insn,
237 static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val,
239 static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Val,
241 static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Val,
243 static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Val,
245 static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Val,
247 static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Val,
249 static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Val,
251 static DecodeStatus DecodeNEONModImmInstruction(MCInst &Inst,unsigned Val,
253 static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Val,
255 static DecodeStatus DecodeShiftRight8Imm(MCInst &Inst, unsigned Val,
257 static DecodeStatus DecodeShiftRight16Imm(MCInst &Inst, unsigned Val,
259 static DecodeStatus DecodeShiftRight32Imm(MCInst &Inst, unsigned Val,
261 static DecodeStatus DecodeShiftRight64Imm(MCInst &Inst, unsigned Val,
263 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
265 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
267 static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Insn,
269 static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Insn,
271 static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Insn,
273 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
275 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
277 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
279 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
281 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
283 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
285 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn,
287 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn,
289 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn,
291 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn,
293 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn,
295 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn,
297 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn,
299 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn,
301 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn,
303 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn,
305 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn,
307 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn,
309 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn,
311 static DecodeStatus DecodeImm0_4(MCInst &Inst, unsigned Insn, uint64_t Address,
315 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
317 static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val,
319 static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val,
321 static DecodeStatus DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val,
323 static DecodeStatus DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val,
325 static DecodeStatus DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val,
327 static DecodeStatus DecodeThumbAddrModePC(MCInst &Inst, unsigned Val,
329 static DecodeStatus DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val,
331 static DecodeStatus DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val,
333 static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Val,
335 static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val,
337 static DecodeStatus DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val,
339 static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst,unsigned Val,
341 static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val,
343 static DecodeStatus DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val,
345 static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Val,
347 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
349 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
351 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Insn,
353 static DecodeStatus DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val,
355 static DecodeStatus DecodeThumbTableBranch(MCInst &Inst, unsigned Val,
357 static DecodeStatus DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Val,
359 static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val,
361 static DecodeStatus DecodeThumbBCCTargetOperand(MCInst &Inst,unsigned Val,
363 static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val,
365 static DecodeStatus DecodeIT(MCInst &Inst, unsigned Val,
367 static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst,unsigned Insn,
369 static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst,unsigned Insn,
371 static DecodeStatus DecodeT2Adr(MCInst &Inst, unsigned Val,
373 static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Val,
375 static DecodeStatus DecodeT2ShifterImmOperand(MCInst &Inst, unsigned Val,
378 static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val,
380 static DecodeStatus DecodeMRRC2(llvm::MCInst &Inst, unsigned Val,
900 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
906 Inst.addOperand(MCOperand::CreateReg(Register));
911 DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo,
918 Check(S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder));
923 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo,
927 return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder);
930 static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo,
956 Inst.addOperand(MCOperand::CreateReg(Register));
960 static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo,
963 return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder);
977 static DecodeStatus DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo,
983 Inst.addOperand(MCOperand::CreateReg(Register));
998 static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo,
1004 Inst.addOperand(MCOperand::CreateReg(Register));
1008 static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo,
1012 return DecodeDPRRegisterClass(Inst, RegNo, Address, Decoder);
1016 DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo,
1020 return DecodeDPRRegisterClass(Inst, RegNo, Address, Decoder);
1031 static DecodeStatus DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo,
1038 Inst.addOperand(MCOperand::CreateReg(Register));
1051 static DecodeStatus DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo,
1057 Inst.addOperand(MCOperand::CreateReg(Register));
1072 static DecodeStatus DecodeDPairSpacedRegisterClass(MCInst &Inst,
1080 Inst.addOperand(MCOperand::CreateReg(Register));
1084 static DecodeStatus DecodePredicateOperand(MCInst &Inst, unsigned Val,
1088 if (Inst.getOpcode() == ARM::tBcc && Val == 0xE)
1090 Inst.addOperand(MCOperand::CreateImm(Val));
1092 Inst.addOperand(MCOperand::CreateReg(0));
1094 Inst.addOperand(MCOperand::CreateReg(ARM::CPSR));
1098 static DecodeStatus DecodeCCOutOperand(MCInst &Inst, unsigned Val,
1101 Inst.addOperand(MCOperand::CreateReg(ARM::CPSR));
1103 Inst.addOperand(MCOperand::CreateReg(0));
1107 static DecodeStatus DecodeSOImmOperand(MCInst &Inst, unsigned Val,
1112 Inst.addOperand(MCOperand::CreateImm(rot_imm));
1116 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Val,
1125 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
1148 Inst.addOperand(MCOperand::CreateImm(Op));
1153 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Val,
1162 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder)))
1164 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rs, Address, Decoder)))
1183 Inst.addOperand(MCOperand::CreateImm(Shift));
1188 static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Val,
1194 switch (Inst.getOpcode()) {
1204 writebackReg = Inst.getOperand(0).getReg();
1212 if (!Check(S, DecodeGPRRegisterClass(Inst, i, Address, Decoder)))
1215 if (writebackLoad && writebackReg == Inst.end()[-1].getReg())
1223 static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val,
1230 if (!Check(S, DecodeSPRRegisterClass(Inst, Vd, Address, Decoder)))
1233 if (!Check(S, DecodeSPRRegisterClass(Inst, ++Vd, Address, Decoder)))
1240 static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val,
1249 if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder)))
1252 if (!Check(S, DecodeDPRRegisterClass(Inst, ++Vd, Address, Decoder)))
1259 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Val,
1282 Inst.addOperand(MCOperand::CreateImm(~(msb_mask ^ lsb_mask)));
1286 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
1297 switch (Inst.getOpcode()) {
1337 Inst.addOperand(MCOperand::CreateImm(coproc));
1338 Inst.addOperand(MCOperand::CreateImm(CRd));
1339 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
1342 switch (Inst.getOpcode()) {
1376 Inst.addOperand(MCOperand::CreateImm(imm));
1399 Inst.addOperand(MCOperand::CreateImm(imm));
1403 switch (Inst.getOpcode()) {
1420 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
1431 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn,
1445 switch (Inst.getOpcode()) {
1454 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
1461 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
1465 switch (Inst.getOpcode()) {
1474 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
1481 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
1499 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder)))
1523 Inst.addOperand(MCOperand::CreateImm(imm));
1525 Inst.addOperand(MCOperand::CreateReg(0));
1527 Inst.addOperand(MCOperand::CreateImm(tmp));
1530 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
1536 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Val,
1565 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
1567 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
1574 Inst.addOperand(MCOperand::CreateImm(shift));
1580 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn,
1598 switch (Inst.getOpcode()) {
1610 switch (Inst.getOpcode()) {
1697 switch (Inst.getOpcode()) {
1704 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
1712 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
1714 switch (Inst.getOpcode()) {
1721 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt+1, Address, Decoder)))
1730 switch (Inst.getOpcode()) {
1745 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
1753 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
1757 Inst.addOperand(MCOperand::CreateReg(0));
1758 Inst.addOperand(MCOperand::CreateImm(U | (imm << 4) | Rm));
1760 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
1762 Inst.addOperand(MCOperand::CreateImm(U));
1765 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
1771 static DecodeStatus DecodeRFEInstruction(MCInst &Inst, unsigned Insn,
1793 Inst.addOperand(MCOperand::CreateImm(mode));
1794 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
1800 static DecodeStatus DecodeMemMultipleWritebackInstruction(MCInst &Inst,
1810 switch (Inst.getOpcode()) {
1812 Inst.setOpcode(ARM::RFEDA);
1815 Inst.setOpcode(ARM::RFEDA_UPD);
1818 Inst.setOpcode(ARM::RFEDB);
1821 Inst.setOpcode(ARM::RFEDB_UPD);
1824 Inst.setOpcode(ARM::RFEIA);
1827 Inst.setOpcode(ARM::RFEIA_UPD);
1830 Inst.setOpcode(ARM::RFEIB);
1833 Inst.setOpcode(ARM::RFEIB_UPD);
1836 Inst.setOpcode(ARM::SRSDA);
1839 Inst.setOpcode(ARM::SRSDA_UPD);
1842 Inst.setOpcode(ARM::SRSDB);
1845 Inst.setOpcode(ARM::SRSDB_UPD);
1848 Inst.setOpcode(ARM::SRSIA);
1851 Inst.setOpcode(ARM::SRSIA_UPD);
1854 Inst.setOpcode(ARM::SRSIB);
1857 Inst.setOpcode(ARM::SRSIB_UPD);
1865 Inst.addOperand(
1870 return DecodeRFEInstruction(Inst, Insn, Address, Decoder);
1873 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
1875 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
1877 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
1879 if (!Check(S, DecodeRegListOperand(Inst, reglist, Address, Decoder)))
1885 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
1902 Inst.setOpcode(ARM::CPS3p);
1903 Inst.addOperand(MCOperand::CreateImm(imod));
1904 Inst.addOperand(MCOperand::CreateImm(iflags));
1905 Inst.addOperand(MCOperand::CreateImm(mode));
1907 Inst.setOpcode(ARM::CPS2p);
1908 Inst.addOperand(MCOperand::CreateImm(imod));
1909 Inst.addOperand(MCOperand::CreateImm(iflags));
1912 Inst.setOpcode(ARM::CPS1p);
1913 Inst.addOperand(MCOperand::CreateImm(mode));
1917 Inst.setOpcode(ARM::CPS1p);
1918 Inst.addOperand(MCOperand::CreateImm(mode));
1925 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
1942 Inst.setOpcode(ARM::t2CPS3p);
1943 Inst.addOperand(MCOperand::CreateImm(imod));
1944 Inst.addOperand(MCOperand::CreateImm(iflags));
1945 Inst.addOperand(MCOperand::CreateImm(mode));
1947 Inst.setOpcode(ARM::t2CPS2p);
1948 Inst.addOperand(MCOperand::CreateImm(imod));
1949 Inst.addOperand(MCOperand::CreateImm(iflags));
1952 Inst.setOpcode(ARM::t2CPS1p);
1953 Inst.addOperand(MCOperand::CreateImm(mode));
1960 Inst.setOpcode(ARM::t2HINT);
1961 Inst.addOperand(MCOperand::CreateImm(imm));
1967 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
1979 if (Inst.getOpcode() == ARM::t2MOVTi16)
1980 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
1982 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
1985 if (!tryAddingSymbolicOperand(Address, imm, false, 4, Inst, Decoder))
1986 Inst.addOperand(MCOperand::CreateImm(imm));
1991 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
2002 if (Inst.getOpcode() == ARM::MOVTi16)
2003 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder)))
2006 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder)))
2009 if (!tryAddingSymbolicOperand(Address, imm, false, 4, Inst, Decoder))
2010 Inst.addOperand(MCOperand::CreateImm(imm));
2012 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
2018 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
2029 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
2031 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder)))
2033 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))
2035 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder)))
2037 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Ra, Address, Decoder)))
2040 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
2046 static DecodeStatus DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val,
2054 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
2059 Inst.addOperand(MCOperand::CreateImm(imm));
2066 static DecodeStatus DecodeAddrMode5Operand(MCInst &Inst, unsigned Val,
2074 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
2078 Inst.addOperand(MCOperand::CreateImm(ARM_AM::getAM5Opc(ARM_AM::add, imm)));
2080 Inst.addOperand(MCOperand::CreateImm(ARM_AM::getAM5Opc(ARM_AM::sub, imm)));
2085 static DecodeStatus DecodeAddrMode7Operand(MCInst &Inst, unsigned Val,
2087 return DecodeGPRRegisterClass(Inst, Val, Address, Decoder);
2091 DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
2111 true, 4, Inst, Decoder))
2112 Inst.addOperand(MCOperand::CreateImm(imm32));
2118 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn,
2126 Inst.setOpcode(ARM::BLXi);
2129 true, 4, Inst, Decoder))
2130 Inst.addOperand(MCOperand::CreateImm(SignExtend32<26>(imm)));
2135 true, 4, Inst, Decoder))
2136 Inst.addOperand(MCOperand::CreateImm(SignExtend32<26>(imm)));
2137 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
2144 static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val,
2151 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
2154 Inst.addOperand(MCOperand::CreateImm(0));
2156 Inst.addOperand(MCOperand::CreateImm(4 << align));
2161 static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn,
2173 switch (Inst.getOpcode()) {
2183 if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder)))
2195 if (!Check(S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder)))
2199 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2204 switch (Inst.getOpcode()) {
2217 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder)))
2232 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))
2239 switch(Inst.getOpcode()) {
2252 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))
2267 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+4)%32, Address, Decoder)))
2275 switch (Inst.getOpcode()) {
2282 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3)%32, Address, Decoder)))
2291 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+6)%32, Address, Decoder)))
2299 switch (Inst.getOpcode()) {
2350 Inst.addOperand(MCOperand::CreateImm(0));
2364 if (!Check(S, DecodeGPRRegisterClass(Inst, wb, Address, Decoder)))
2372 if (!Check(S, DecodeAddrMode6Operand(Inst, Rn, Address, Decoder)))
2376 switch (Inst.getOpcode()) {
2385 Inst.addOperand(MCOperand::CreateReg(0));
2417 !Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
2435 static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Insn,
2447 switch (Inst.getOpcode()) {
2500 Inst.addOperand(MCOperand::CreateImm(0));
2514 if (!Check(S, DecodeGPRRegisterClass(Inst, wb, Address, Decoder)))
2522 if (!Check(S, DecodeAddrMode6Operand(Inst, Rn, Address, Decoder)))
2526 switch (Inst.getOpcode()) {
2529 Inst.addOperand(MCOperand::CreateReg(0));
2531 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
2565 switch (Inst.getOpcode()) {
2587 if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder)))
2599 if (!Check(S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder)))
2603 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2608 switch (Inst.getOpcode()) {
2621 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder)))
2636 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))
2644 switch (Inst.getOpcode()) {
2657 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))
2672 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+4)%32, Address, Decoder)))
2680 switch (Inst.getOpcode()) {
2687 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3)%32, Address, Decoder)))
2696 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+6)%32, Address, Decoder)))
2706 static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn,
2721 switch (Inst.getOpcode()) {
2726 if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder)))
2730 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2735 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
2739 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
2741 Inst.addOperand(MCOperand::CreateImm(align));
2747 !Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
2753 static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn,
2765 switch (Inst.getOpcode()) {
2770 if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder)))
2777 if (!Check(S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder)))
2781 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2787 Inst.addOperand(MCOperand::CreateImm(0));
2789 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
2791 Inst.addOperand(MCOperand::CreateImm(align));
2794 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
2801 static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn,
2811 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2813 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)))
2815 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder)))
2818 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
2822 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
2824 Inst.addOperand(MCOperand::CreateImm(0));
2827 Inst.addOperand(MCOperand::CreateReg(0));
2829 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
2836 static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn,
2863 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2865 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)))
2867 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder)))
2869 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3*inc)%32, Address, Decoder)))
2872 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
2876 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
2878 Inst.addOperand(MCOperand::CreateImm(align));
2881 Inst.addOperand(MCOperand::CreateReg(0));
2883 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
2891 DecodeNEONModImmInstruction(MCInst &Inst, unsigned Insn,
2905 if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder)))
2908 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2912 Inst.addOperand(MCOperand::CreateImm(imm));
2914 switch (Inst.getOpcode()) {
2919 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2926 if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder)))
2936 static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn,
2946 if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder)))
2948 if (!Check(S, DecodeDPRRegisterClass(Inst, Rm, Address, Decoder)))
2950 Inst.addOperand(MCOperand::CreateImm(8 << size));
2955 static DecodeStatus DecodeShiftRight8Imm(MCInst &Inst, unsigned Val,
2957 Inst.addOperand(MCOperand::CreateImm(8 - Val));
2961 static DecodeStatus DecodeShiftRight16Imm(MCInst &Inst, unsigned Val,
2963 Inst.addOperand(MCOperand::CreateImm(16 - Val));
2967 static DecodeStatus DecodeShiftRight32Imm(MCInst &Inst, unsigned Val,
2969 Inst.addOperand(MCOperand::CreateImm(32 - Val));
2973 static DecodeStatus DecodeShiftRight64Imm(MCInst &Inst, unsigned Val,
2975 Inst.addOperand(MCOperand::CreateImm(64 - Val));
2979 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
2991 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2994 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2998 switch (Inst.getOpcode()) {
3001 if (!Check(S, DecodeDPairRegisterClass(Inst, Rn, Address, Decoder)))
3005 if (!Check(S, DecodeDPRRegisterClass(Inst, Rn, Address, Decoder)))
3009 if (!Check(S, DecodeDPRRegisterClass(Inst, Rm, Address, Decoder)))
3015 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
3022 if (!Check(S, DecodetGPRRegisterClass(Inst, dst, Address, Decoder)))
3025 switch(Inst.getOpcode()) {
3031 Inst.addOperand(MCOperand::CreateReg(ARM::SP));
3035 Inst.addOperand(MCOperand::CreateImm(imm));
3039 static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val,
3042 true, 2, Inst, Decoder))
3043 Inst.addOperand(MCOperand::CreateImm(SignExtend32<12>(Val << 1)));
3047 static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val,
3050 true, 4, Inst, Decoder))
3051 Inst.addOperand(MCOperand::CreateImm(SignExtend32<21>(Val)));
3055 static DecodeStatus DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val,
3058 true, 2, Inst, Decoder))
3059 Inst.addOperand(MCOperand::CreateImm(Val << 1));
3063 static DecodeStatus DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val,
3070 if (!Check(S, DecodetGPRRegisterClass(Inst, Rn, Address, Decoder)))
3072 if (!Check(S, DecodetGPRRegisterClass(Inst, Rm, Address, Decoder)))
3078 static DecodeStatus DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val,
3085 if (!Check(S, DecodetGPRRegisterClass(Inst, Rn, Address, Decoder)))
3087 Inst.addOperand(MCOperand::CreateImm(imm));
3092 static DecodeStatus DecodeThumbAddrModePC(MCInst &Inst, unsigned Val,
3096 Inst.addOperand(MCOperand::CreateImm(imm));
3102 static DecodeStatus DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val,
3104 Inst.addOperand(MCOperand::CreateReg(ARM::SP));
3105 Inst.addOperand(MCOperand::CreateImm(Val));
3110 static DecodeStatus DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val,
3118 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3120 if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder)))
3122 Inst.addOperand(MCOperand::CreateImm(imm));
3127 static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Insn,
3131 switch (Inst.getOpcode()) {
3138 if (!Check(S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder)))
3145 switch (Inst.getOpcode()) {
3147 Inst.setOpcode(ARM::t2LDRBpci);
3150 Inst.setOpcode(ARM::t2LDRHpci);
3153 Inst.setOpcode(ARM::t2LDRSHpci);
3156 Inst.setOpcode(ARM::t2LDRSBpci);
3159 Inst.setOpcode(ARM::t2PLDi12);
3160 Inst.addOperand(MCOperand::CreateReg(ARM::PC));
3168 Inst.addOperand(MCOperand::CreateImm(imm));
3176 if (!Check(S, DecodeT2AddrModeSOReg(Inst, addrmode, Address, Decoder)))
3182 static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val,
3185 Inst.addOperand(MCOperand::CreateImm(INT32_MIN));
3190 Inst.addOperand(MCOperand::CreateImm(imm * 4));
3196 static DecodeStatus DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val,
3203 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3205 if (!Check(S, DecodeT2Imm8S4(Inst, imm, Address, Decoder)))
3211 static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst,unsigned Val,
3218 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))
3221 Inst.addOperand(MCOperand::CreateImm(imm));
3226 static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val,
3233 Inst.addOperand(MCOperand::CreateImm(imm));
3239 static DecodeStatus DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val,
3247 switch (Inst.getOpcode()) {
3262 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3264 if (!Check(S, DecodeT2Imm8(Inst, imm, Address, Decoder)))
3270 static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Insn,
3282 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3286 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
3290 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3294 if (!Check(S, DecodeT2AddrModeImm8(Inst, addr, Address, Decoder)))
3300 static DecodeStatus DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val,
3307 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3309 Inst.addOperand(MCOperand::CreateImm(imm));
3315 static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn,
3319 Inst.addOperand(MCOperand::CreateReg(ARM::SP));
3320 Inst.addOperand(MCOperand::CreateReg(ARM::SP));
3321 Inst.addOperand(MCOperand::CreateImm(imm));
3326 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
3330 if (Inst.getOpcode() == ARM::tADDrSP) {
3334 if (!Check(S, DecodeGPRRegisterClass(Inst, Rdm, Address, Decoder)))
3336 Inst.addOperand(MCOperand::CreateReg(ARM::SP));
3337 if (!Check(S, DecodeGPRRegisterClass(Inst, Rdm, Address, Decoder)))
3339 } else if (Inst.getOpcode() == ARM::tADDspr) {
3342 Inst.addOperand(MCOperand::CreateReg(ARM::SP));
3343 Inst.addOperand(MCOperand::CreateReg(ARM::SP));
3344 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
3351 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
3356 Inst.addOperand(MCOperand::CreateImm(imod));
3357 Inst.addOperand(MCOperand::CreateImm(flags));
3362 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
3368 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder)))
3370 Inst.addOperand(MCOperand::CreateImm(add));
3375 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Val,
3394 true, 4, Inst, Decoder))
3395 Inst.addOperand(MCOperand::CreateImm(imm32));
3399 static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Val,
3404 Inst.addOperand(MCOperand::CreateImm(Val));
3409 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn,
3417 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3419 if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder)))
3425 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn,
3436 Inst.setOpcode(ARM::t2DSB);
3439 Inst.setOpcode(ARM::t2DMB);
3442 Inst.setOpcode(ARM::t2ISB);
3447 return DecodeMemBarrierOption(Inst, imm, Address, Decoder);
3456 if (!Check(S, DecodeT2BROperand(Inst, brtarget, Address, Decoder)))
3458 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
3467 static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val,
3475 Inst.addOperand(MCOperand::CreateImm(imm));
3478 Inst.addOperand(MCOperand::CreateImm((imm << 16) | imm));
3481 Inst.addOperand(MCOperand::CreateImm((imm << 24) | (imm << 8)));
3484 Inst.addOperand(MCOperand::CreateImm((imm << 24) | (imm << 16) |
3492 Inst.addOperand(MCOperand::CreateImm(imm));
3499 DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val,
3502 true, 2, Inst, Decoder))
3503 Inst.addOperand(MCOperand::CreateImm(SignExtend32<9>(Val << 1)));
3507 static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val,
3525 true, 4, Inst, Decoder))
3526 Inst.addOperand(MCOperand::CreateImm(imm32));
3530 static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Val,
3535 Inst.addOperand(MCOperand::CreateImm(Val));
3539 static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Val,
3542 Inst.addOperand(MCOperand::CreateImm(Val));
3546 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
3556 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
3558 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt+1, Address, Decoder)))
3560 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3562 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
3569 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
3578 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder)))
3584 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
3586 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt+1, Address, Decoder)))
3588 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3590 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
3596 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
3609 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
3611 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3613 if (!Check(S, DecodeAddrModeImm12Operand(Inst, imm, Address, Decoder)))
3615 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
3621 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
3636 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
3638 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3640 if (!Check(S, DecodeSORegMemOperand(Inst, imm, Address, Decoder)))
3642 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
3649 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
3662 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3664 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
3666 if (!Check(S, DecodeAddrModeImm12Operand(Inst, imm, Address, Decoder)))
3668 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
3674 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
3687 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3689 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
3691 if (!Check(S, DecodeSORegMemOperand(Inst, imm, Address, Decoder)))
3693 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
3699 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn,
3742 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3745 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3748 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3750 Inst.addOperand(MCOperand::CreateImm(align));
3753 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
3756 Inst.addOperand(MCOperand::CreateReg(0));
3759 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3761 Inst.addOperand(MCOperand::CreateImm(index));
3766 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn,
3810 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3813 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3815 Inst.addOperand(MCOperand::CreateImm(align));
3818 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
3821 Inst.addOperand(MCOperand::CreateReg(0));
3824 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3826 Inst.addOperand(MCOperand::CreateImm(index));
3832 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn,
3871 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3873 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3876 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3879 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3881 Inst.addOperand(MCOperand::CreateImm(align));
3884 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
3887 Inst.addOperand(MCOperand::CreateReg(0));
3890 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3892 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3894 Inst.addOperand(MCOperand::CreateImm(index));
3899 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn,
3939 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3942 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3944 Inst.addOperand(MCOperand::CreateImm(align));
3947 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
3950 Inst.addOperand(MCOperand::CreateReg(0));
3953 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3955 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3957 Inst.addOperand(MCOperand::CreateImm(index));
3963 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn,
4000 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
4002 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
4004 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
4008 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
4011 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
4013 Inst.addOperand(MCOperand::CreateImm(align));
4016 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
4019 Inst.addOperand(MCOperand::CreateReg(0));
4022 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
4024 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
4026 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
4028 Inst.addOperand(MCOperand::CreateImm(index));
4033 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn,
4071 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
4074 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
4076 Inst.addOperand(MCOperand::CreateImm(align));
4079 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
4082 Inst.addOperand(MCOperand::CreateReg(0));
4085 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
4087 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
4089 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
4091 Inst.addOperand(MCOperand::CreateImm(index));
4097 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn,
4141 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
4143 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
4145 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
4147 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder)))
4151 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
4154 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
4156 Inst.addOperand(MCOperand::CreateImm(align));
4159 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
4162 Inst.addOperand(MCOperand::CreateReg(0));
4165 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
4167 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
4169 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
4171 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder)))
4173 Inst.addOperand(MCOperand::CreateImm(index));
4178 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn,
4223 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
4226 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
4228 Inst.addOperand(MCOperand::CreateImm(align));
4231 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))
4234 Inst.addOperand(MCOperand::CreateReg(0));
4237 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
4239 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
4241 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
4243 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder)))
4245 Inst.addOperand(MCOperand::CreateImm(index));
4250 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn,
4262 if (!Check(S, DecodeSPRRegisterClass(Inst, Rm , Address, Decoder)))
4264 if (!Check(S, DecodeSPRRegisterClass(Inst, Rm+1, Address, Decoder)))
4266 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt , Address, Decoder)))
4268 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt2 , Address, Decoder)))
4270 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
4276 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn,
4288 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt , Address, Decoder)))
4290 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt2 , Address, Decoder)))
4292 if (!Check(S, DecodeSPRRegisterClass(Inst, Rm , Address, Decoder)))
4294 if (!Check(S, DecodeSPRRegisterClass(Inst, Rm+1, Address, Decoder)))
4296 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
4302 static DecodeStatus DecodeIT(MCInst &Inst, unsigned Insn,
4318 Inst.addOperand(MCOperand::CreateImm(pred));
4319 Inst.addOperand(MCOperand::CreateImm(mask));
4324 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn,
4345 if (!Check(S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder)))
4348 if (!Check(S, DecoderGPRRegisterClass(Inst, Rt2, Address, Decoder)))
4351 if (!Check(S, DecoderGPRRegisterClass(Inst, Rn, Address, Decoder)))
4354 if (!Check(S, DecodeT2AddrModeImm8s4(Inst, addr, Address, Decoder)))
4361 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn,
4380 if (!Check(S, DecoderGPRRegisterClass(Inst, Rn, Address, Decoder)))
4383 if (!Check(S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder)))
4386 if (!Check(S, DecoderGPRRegisterClass(Inst, Rt2, Address, Decoder)))
4389 if (!Check(S, DecodeT2AddrModeImm8s4(Inst, addr, Address, Decoder)))
4395 static DecodeStatus DecodeT2Adr(MCInst &Inst, uint32_t Insn,
4405 Inst.addOperand(MCOperand::CreateImm(SignExtend32<13>(Val)));
4410 static DecodeStatus DecodeT2ShifterImmOperand(MCInst &Inst, uint32_t Val,
4417 Inst.addOperand(MCOperand::CreateImm(Val));
4421 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn,
4429 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
4436 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder)))
4438 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt2, Address, Decoder)))
4440 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))
4442 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
4448 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn,
4461 Inst.setOpcode(ARM::VMOVv2f32);
4462 return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder);
4467 if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder)))
4469 if (!Check(S, DecodeDPRRegisterClass(Inst, Vm, Address, Decoder)))
4471 Inst.addOperand(MCOperand::CreateImm(64 - imm));
4476 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn,
4489 Inst.setOpcode(ARM::VMOVv4f32);
4490 return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder);
4495 if (!Check(S, DecodeQPRRegisterClass(Inst, Vd, Address, Decoder)))
4497 if (!Check(S, DecodeQPRRegisterClass(Inst, Vm, Address, Decoder)))
4499 Inst.addOperand(MCOperand::CreateImm(64 - imm));
4504 static DecodeStatus DecodeImm0_4(MCInst &Inst, unsigned Insn, uint64_t Address,
4509 Inst.addOperand(MCOperand::CreateImm(Imm));
4513 static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val,
4526 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder)))
4528 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))
4530 if (!Check(S, DecodeAddrMode7Operand(Inst, Rn, Address, Decoder)))
4532 if (!Check(S, DecodePostIdxReg(Inst, Rm, Address, Decoder)))
4534 if (!Check(S, DecodePredicateOperand(Inst, Cond, Address, Decoder)))
4540 static DecodeStatus DecodeMRRC2(llvm::MCInst &Inst, unsigned Val,
4557 Inst.addOperand(MCOperand::CreateImm(cop));
4558 Inst.addOperand(MCOperand::CreateImm(opc1));
4559 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder)))
4561 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt2, Address, Decoder)))
4563 Inst.addOperand(MCOperand::CreateImm(CRm));