Searched defs:Imm (Results 1 - 25 of 42) sorted by relevance

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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.h78 inline SDValue getI32Imm(unsigned Imm) { argument
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/
H A DMipsAnalyzeImmediate.cpp29 void MipsAnalyzeImmediate::GetInstSeqLsADDiu(uint64_t Imm, unsigned RemSize, argument
35 void MipsAnalyzeImmediate::GetInstSeqLsORi(uint64_t Imm, unsigned RemSize, argument
41 void MipsAnalyzeImmediate::GetInstSeqLsSLL(uint64_t Imm, unsigned RemSize, argument
48 void MipsAnalyzeImmediate::GetInstSeqLs(uint64_t Imm, unsigne argument
125 Analyze(uint64_t Imm, unsigned Size, bool LastInstrIsADDiu) argument
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H A DMipsSEInstrInfo.cpp272 MipsSEInstrInfo::loadImmediate(int64_t Imm, MachineBasicBlock &MBB, argument
H A DMipsISelDAGToDAG.cpp98 inline SDValue getImm(const SDNode *Node, unsigned Imm) { argument
510 int64_t Imm = CN->getSExtValue(); local
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/Utils/
H A DX86ShuffleDecode.cpp23 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { argument
67 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { argument
83 void DecodePSHUFHWMask(MVT VT, unsigned Imm, argument
99 void DecodePSHUFLWMask(MVT VT, unsigned Imm, argument
118 DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) argument
177 DecodeVPERM2X128Mask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) argument
193 DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) argument
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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MBlaze/
H A DMBlazeISelDAGToDAG.cpp89 inline SDValue getI32Imm(unsigned Imm) { argument
100 static bool isIntS32Immediate(SDNode *N, int32_t &Imm) { argument
112 static bool isIntS32Immediate(SDValue Op, int32_t &Imm) { argument
166 uint32_t Imm = CN->getZExtValue(); local
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H A DMBlazeISelLowering.cpp1152 bool MBlazeTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const { argument
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/
H A DX86FrameLowering.cpp58 static unsigned getSUBriOpcode(unsigned is64Bit, int64_t Imm) { argument
70 static unsigned getADDriOpcode(unsigned is64Bit, int64_t Imm) { argument
H A DX86RegisterInfo.cpp443 static unsigned getSUBriOpcode(unsigned is64Bit, int64_t Imm) { argument
455 static unsigned getADDriOpcode(unsigned is64Bit, int64_t Imm) { argument
588 int Imm = (int)(MI.getOperand(i + 3).getImm()); local
/macosx-10.9.5/llvmCore-3425.0.33/lib/VMCore/
H A DAutoUpgrade.cpp236 unsigned Imm; local
272 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); local
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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/MCTargetDesc/
H A DARMAddressingModes.h137 static inline unsigned getSOImmValRotate(unsigned Imm) { argument
218 getThumbImmValShift(unsigned Imm) argument
237 getThumbImm16ValShift(unsigned Imm) argument
271 unsigned u, Vs, Imm; local
335 isT2SOImmTwoPartVal(unsigned Imm) argument
362 getT2SOImmTwoPartFirst(unsigned Imm) argument
379 getT2SOImmTwoPartSecond(unsigned Imm) argument
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H A DARMMCCodeEmitter.cpp979 unsigned Imm = MO1.getImm(); local
1013 unsigned Imm = MO1.getImm(); local
434 EncodeAddrModeOpValues(const MCInst &MI, unsigned OpIdx, unsigned &Reg, unsigned &Imm, SmallVectorImpl<MCFixup> &Fixups) const argument
1048 unsigned Imm = MO2.getImm(); local
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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/
H A DThumb1RegisterInfo.cpp342 emitThumbConstant(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, unsigned DestReg, int Imm, const TargetInstrInfo &TII, const Thumb1RegisterInfo& MRI, DebugLoc dl) argument
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H A DThumb2SizeReduction.cpp502 unsigned Imm = MI->getOperand(2).getImm(); local
631 unsigned Imm = MI->getOperand(2).getImm(); local
H A DARMExpandPseudoInsts.cpp662 unsigned Imm = MO.getImm(); local
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/XCore/
H A DXCoreISelDAGToDAG.cpp54 inline SDValue getI32Imm(unsigned Imm) { argument
/macosx-10.9.5/llvmCore-3425.0.33/utils/TableGen/
H A DPseudoLoweringEmitter.cpp27 enum MapKind { Operand, Imm, Reg }; enumerator in enum:__anon10834::PseudoLoweringEmitter::OpData::MapKind
31 uint64_t Imm; // Integer immedate value. member in union:__anon10834::PseudoLoweringEmitter::OpData::__anon10835
H A DCodeGenInstruction.h299 int64_t Imm; member in struct:llvm::CodeGenInstAlias::ResultOperand
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.cpp485 unsigned Imm = MO.getImm(); local
501 unsigned Imm = MO.getImm(); local
594 unsigned Imm = MI->getOperand(OpNum).getImm(); local
598 O << ", lsl #" << Imm; local
603 unsigned Imm = MI->getOperand(OpNum).getImm(); local
608 O << ", asr #" << Imm; local
805 unsigned Imm = MI->getOperand(OpNum).getImm(); local
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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MBlaze/AsmParser/
H A DMBlazeAsmParser.cpp96 } Imm; member in union:__anon10398::MBlazeOperand::__anon10399
/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp389 uint64_t Imm = CI->getZExtValue(); local
1124 FastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType) argument
1237 FastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm) argument
1302 FastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
1350 FastEmitInst_i(unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm) argument
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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/
H A DSPUISelDAGToDAG.cpp78 isIntS16Immediate(ConstantSDNode *CN, short &Imm) argument
95 isFPS16Immediate(ConstantFPSDNode *FPN, short &Imm) argument
166 inline SDValue getI32Imm(uint32_t Imm) { argument
171 inline SDValue getSmallIPtrImm(unsigned Imm) { argument
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp144 } Imm; member in union:__anon10425::MipsOperand::__anon10426
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp62 inline SDValue getI32Imm(unsigned Imm) { argument
68 inline SDValue getI64Imm(uint64_t Imm) { argument
73 inline SDValue getSmallIPtrImm(unsigned Imm) { argument
275 static bool isIntS16Immediate(SDNode *N, short &Imm) { argument
286 isIntS16Immediate(SDValue Op, short &Imm) argument
293 isInt32Immediate(SDNode *N, unsigned &Imm) argument
303 isInt64Immediate(SDNode *N, uint64_t &Imm) argument
313 isInt32Immediate(SDValue N, unsigned &Imm) argument
321 isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) argument
468 unsigned Imm; local
509 uint64_t Imm; local
626 unsigned Imm; local
762 int64_t Imm = cast<ConstantSDNode>(N)->getZExtValue(); local
867 unsigned Imm; local
977 unsigned Imm, Imm2, SH, MB, ME; local
1036 unsigned Imm, SH, MB, ME; local
1048 unsigned Imm, SH, MB, ME; local
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/macosx-10.9.5/cctools-845/as/
H A Di386.h242 #define Imm (Imm8|Imm8S|Imm16|Imm32S|Imm32|Imm64) /* gen'l immediate */ macro

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