| /macosx-10.9.5/llvmCore-3425.0.33/include/llvm/Transforms/Utils/ |
| H A D | AddrModeMatcher.h | 37 Value *BaseReg; member in struct:llvm::ExtAddrMode
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/InstPrinter/ |
| H A D | X86ATTInstPrinter.cpp | 145 const MCOperand &BaseReg = MI->getOperand(Op); local
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| H A D | X86IntelInstPrinter.cpp | 136 const MCOperand &BaseReg = MI->getOperand(Op); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | Thumb2InstrInfo.cpp | 177 emitT2RegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, ARMCC::CondCodes Pred, unsigned PredReg, const ARMBaseInstrInfo &TII, unsigned MIFlags) argument
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| H A D | Thumb1RegisterInfo.cpp | 90 emitThumbRegPlusImmInReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, bool CanChangeCC, const TargetInstrInfo &TII, const ARMBaseRegisterInfo& MRI, unsigned MIFlags = MachineInstr::NoFlags) argument
167 emitThumbRegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, const TargetInstrInfo &TII, const ARMBaseRegisterInfo& MRI, unsigned MIFlags) argument
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| H A D | Thumb2SizeReduction.cpp | 380 unsigned BaseReg = MI->getOperand(0).getReg(); local
402 unsigned BaseReg = MI->getOperand(1).getReg(); local
416 unsigned BaseReg = MI->getOperand(1).getReg(); local
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| H A D | ARMBaseRegisterInfo.cpp | 941 materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const argument
966 resolveFrameIndex(MachineBasicBlock::iterator I, unsigned BaseReg, int64_t Offset) const argument
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| H A D | ARMConstantIslandPass.cpp | 1879 unsigned BaseReg = MI->getOperand(0).getReg(); local
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| H A D | ARMISelDAGToDAG.cpp | 1151 bool ARMDAGToDAGISel::SelectT2ShifterOperandReg(SDValue N, SDValue &BaseReg, argument
387 SelectImmShifterOperand(SDValue N, SDValue &BaseReg, SDValue &Opc, bool CheckProfitability) argument
410 SelectRegShifterOperand(SDValue N, SDValue &BaseReg, SDValue &ShReg, SDValue &Opc, bool CheckProfitability) argument
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| H A D | ARMLoadStoreOptimizer.cpp | 1103 unsigned BaseReg = BaseOp.getReg(); local
1072 InsertLDR_STR(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int Offset, bool isDef, DebugLoc dl, unsigned NewOpc, unsigned Reg, bool RegDeadKill, bool RegUndef, unsigned BaseReg, bool BaseKill, bool BaseUndef, bool OffKill, bool OffUndef, ARMCC::CondCodes Pred, unsigned PredReg, const TargetInstrInfo *TII, bool isT2) argument
1560 CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, DebugLoc &dl, unsigned &NewOpc, unsigned &EvenReg, unsigned &OddReg, unsigned &BaseReg, int &Offset, unsigned &PredReg, ARMCC::CondCodes &Pred, bool &isT2) argument
1725 unsigned BaseReg = 0, PredReg = 0; local
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| H A D | ARMBaseInstrInfo.cpp | 159 unsigned BaseReg = Base.getReg(); local
1747 emitARMRegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, ARMCC::CondCodes Pred, unsigned PredReg, const ARMBaseInstrInfo &TII, unsigned MIFlags) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/ |
| H A D | LocalStackSlotAllocation.cpp | 290 unsigned BaseReg = 0; local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
| H A D | X86AsmPrinter.cpp | 312 const MachineOperand &BaseReg = MI->getOperand(Op); local
371 const MachineOperand &BaseReg = MI->getOperand(Op); local
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| H A D | X86InstrInfo.cpp | 1514 static bool regIsPICBase(unsigned BaseReg, const MachineRegisterInfo &MRI) { argument
1567 unsigned BaseReg = MI->getOperand(1).getReg(); local
1588 unsigned BaseReg = MI->getOperand(1).getReg(); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/InstPrinter/ |
| H A D | ARMInstPrinter.cpp | 208 unsigned BaseReg = MI->getOperand(0).getReg(); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 306 unsigned BaseReg local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 190 unsigned BaseReg; member in struct:__anon10469::X86Operand::__anon10470::__anon10474
678 unsigned BaseReg local
504 CreateMem(unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, unsigned Scale, SMLoc StartLoc, SMLoc EndLoc, unsigned Size = 0, bool NeedSizeDir = false) argument
1112 unsigned BaseReg = 0, IndexReg = 0, Scale = 1; local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Transforms/Scalar/ |
| H A D | LoopStrengthReduce.cpp | 911 const SCEV *BaseReg = *I; local
3089 const SCEV *BaseReg = Base.BaseRegs[i]; local
3174 const SCEV *BaseReg local
3582 const SCEV *BaseReg = F.BaseRegs[N]; local
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