Lines Matching refs:rq
20 static int emit_gsc_heci_pkt(struct i915_request *rq, struct gsc_heci_pkt *pkt)
24 cs = intel_ring_begin(rq, 8);
37 intel_ring_advance(rq, cs);
47 struct i915_request *rq;
59 rq = i915_request_create(ce);
60 if (IS_ERR(rq))
61 return PTR_ERR(rq);
64 err = ce->engine->emit_init_breadcrumb(rq);
69 err = emit_gsc_heci_pkt(rq, &pkt);
74 err = ce->engine->emit_flush(rq, 0);
77 i915_request_get(rq);
80 i915_request_set_error_once(rq, err);
82 i915_request_add(rq);
89 if (wait_for(i915_request_started(rq), GSC_HECI_REPLY_LATENCY_MS))
92 if (i915_request_wait(rq, 0, msecs_to_jiffies(GSC_HECI_REPLY_LATENCY_MS)) < 0)
96 i915_request_put(rq);
143 struct i915_request *rq;
158 rq = i915_request_create(ce);
159 if (IS_ERR(rq)) {
160 err = PTR_ERR(rq);
166 err = i915_vma_move_to_active(pkt->bb_vma, rq, 0);
169 err = i915_vma_move_to_active(pkt->heci_pkt_vma, rq, EXEC_OBJECT_WRITE);
173 engine = rq->context->engine;
175 err = engine->emit_init_breadcrumb(rq);
180 err = engine->emit_bb_start(rq, i915_vma_offset(pkt->bb_vma), PAGE_SIZE, 0);
184 err = ce->engine->emit_flush(rq, 0);
190 i915_request_get(rq);
193 i915_request_set_error_once(rq, err);
195 i915_request_add(rq);
202 if (wait_for(i915_request_started(rq), GSC_HECI_REPLY_LATENCY_MS))
205 if (i915_request_wait(rq, I915_WAIT_INTERRUPTIBLE,
210 i915_request_put(rq);