History log of /u-boot/board/gateworks/venice/venice.c
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# 8d22015d 17-Apr-2024 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: fix dt adjustment for gw73xx baseboard for imx8mp

The GW73xx baseboard needs a PCI dt adjustment for revC/D based on a
change of the PCIe switch. Make sure we are only doing this for a pci
based ethernet to avoid causing a boot hang when the ethernet1 alias
points to eqos or fec. To know this is a pcie device ensure the alias
begins with the pcie controller.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 86b79cf1 12-Mar-2024 Tim Harvey <tharvey@gateworks.com>

imx8m*_venice: move venice to OF_UPSTREAM

Move to imx8m{m,n,p}-venice to OF_UPSTREAM:
- replace the non-upstream generic imx8m{m,n,p}-venice dt with one of the
dt's from the OF_LIST
- handle the fact that dtbs now have a 'freescale/' prefix
- imply OF_UPSTREAM
- remove rudundant files from arch/arm/dts leaving only the
*-u-boot.dtsi files

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>

# ad3a4f91 18-Oct-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add fixup for GW73xx-F+

GW73xx-F board revision switched back to the original PCIe switch due to
part availability.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 3d634b0b 23-Jun-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: switch to 2-bank dram config

Switch to a 2-bank dram config to properly support 4GiB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

# a59b3cd0 09-Jun-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: assume emmc device for USB boot

When booting from USB (SDP) setup firmware-update environment
for emmc device.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 7b39e5b5 02-May-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: dynamically update the update_firmware script

The update_firmware script is intended to update the boot firmware but
the details including the offset and hardware partition are dependent
on the boot device.

Specifically:
- IMX8MM/IMX8MP (BOOTROM v2) the offset is 32KiB for SD and eMMC user
hardware partition and 0KiB for eMMC boot partitions.
- IMX8MM the offset is 33KiB for SD and eMMC regardless of hardware
partition.

Dynamically set soc, dev, bootpart, and bootblk env vars at runtime
and use these in the update_firmware script. Remove the splblk env var
from config files as its no longer needed.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 2c2cc1ea 02-May-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: dynamically determine U-Boot env partition

Determine the U-Boot env hardware partition depending on the boot
device.

This allows the same boot firmware image to be placed on user, boot0,
or boot1 without changing CONFIG_SYS_MMC_ENV_PART.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 59947412 06-Mar-2023 Marek Vasut <marex@denx.de>

arm64: imx8mp: Drop EQoS GPR[1] board workaround

The EQoS interface mode is now configured in common board_interface_eth_init()
and called by EQoS MAC driver when appropriate. Drop the board side duplicates
if the same functionality.

Signed-off-by: Marek Vasut <marex@denx.de>

# 7e32871c 07-Feb-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: enable XWAY PHY support

Enable XWAY PHY driver and remove board specific config from
board_phy_config weak override.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 9c097f81 22-Feb-2023 Simon Glass <sjg@chromium.org>

venice: Simplify conditions for network init

The conditions in this code do not align when doing an SPL build with
split config. Use __maybe_unused to avoid needing to be so explicit.

Of course a better solution would be to refactor all of this to avoid
using #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 630abef2 04-Nov-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: remove redundance adjustment of thermal trip points

commit 0543a1ed2787 ("imx8m: fixup thermal trips") moved updating the
thermal trip points to all IMX8M so we can remove it from our board
specific dt config.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 37d5bf42 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: rename eeprom_init

rename eeprom_init to avoid build failure when using CMD_EEPROM.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 77f6dabc 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add fixup for GW73xx-C+

The GW73xx-C revision and onward replaced the 5-port PCIe switch with a
4-port (dropping PCIe to one of the miniPCIe sockets) due to part
availability. This moved the PCI bus of the GbE eth1 device. Use a fixup
to adjust the dt accordingly so that local-mac-address assigned from dt
works on new revision boards.

While we are at it, rename 'blob' to 'fdt' for clarity.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 69245e40 22-Apr-2022 Marek Vasut <marex@denx.de>

led: Drop led_default_state()

This function is empty, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

# 23956252 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mp-venice-gw740x support

The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)

Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# fb9ec338 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: use common GSC driver

Use the common GSC driver.

This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 8f40e7d2 08-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks venice: add support for GPY111 phy

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.

Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

# 52ae8d6c 30-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 86b79cf1 12-Mar-2024 Tim Harvey <tharvey@gateworks.com>

imx8m*_venice: move venice to OF_UPSTREAM

Move to imx8m{m,n,p}-venice to OF_UPSTREAM:
- replace the non-upstream generic imx8m{m,n,p}-venice dt with one of the
dt's from the OF_LIST
- handle the fact that dtbs now have a 'freescale/' prefix
- imply OF_UPSTREAM
- remove rudundant files from arch/arm/dts leaving only the
*-u-boot.dtsi files

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>

# ad3a4f91 18-Oct-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add fixup for GW73xx-F+

GW73xx-F board revision switched back to the original PCIe switch due to
part availability.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 3d634b0b 23-Jun-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: switch to 2-bank dram config

Switch to a 2-bank dram config to properly support 4GiB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

# a59b3cd0 09-Jun-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: assume emmc device for USB boot

When booting from USB (SDP) setup firmware-update environment
for emmc device.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 7b39e5b5 02-May-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: dynamically update the update_firmware script

The update_firmware script is intended to update the boot firmware but
the details including the offset and hardware partition are dependent
on the boot device.

Specifically:
- IMX8MM/IMX8MP (BOOTROM v2) the offset is 32KiB for SD and eMMC user
hardware partition and 0KiB for eMMC boot partitions.
- IMX8MM the offset is 33KiB for SD and eMMC regardless of hardware
partition.

Dynamically set soc, dev, bootpart, and bootblk env vars at runtime
and use these in the update_firmware script. Remove the splblk env var
from config files as its no longer needed.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 2c2cc1ea 02-May-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: dynamically determine U-Boot env partition

Determine the U-Boot env hardware partition depending on the boot
device.

This allows the same boot firmware image to be placed on user, boot0,
or boot1 without changing CONFIG_SYS_MMC_ENV_PART.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 59947412 06-Mar-2023 Marek Vasut <marex@denx.de>

arm64: imx8mp: Drop EQoS GPR[1] board workaround

The EQoS interface mode is now configured in common board_interface_eth_init()
and called by EQoS MAC driver when appropriate. Drop the board side duplicates
if the same functionality.

Signed-off-by: Marek Vasut <marex@denx.de>

# 7e32871c 07-Feb-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: enable XWAY PHY support

Enable XWAY PHY driver and remove board specific config from
board_phy_config weak override.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 9c097f81 22-Feb-2023 Simon Glass <sjg@chromium.org>

venice: Simplify conditions for network init

The conditions in this code do not align when doing an SPL build with
split config. Use __maybe_unused to avoid needing to be so explicit.

Of course a better solution would be to refactor all of this to avoid
using #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 630abef2 04-Nov-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: remove redundance adjustment of thermal trip points

commit 0543a1ed2787 ("imx8m: fixup thermal trips") moved updating the
thermal trip points to all IMX8M so we can remove it from our board
specific dt config.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 37d5bf42 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: rename eeprom_init

rename eeprom_init to avoid build failure when using CMD_EEPROM.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 77f6dabc 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add fixup for GW73xx-C+

The GW73xx-C revision and onward replaced the 5-port PCIe switch with a
4-port (dropping PCIe to one of the miniPCIe sockets) due to part
availability. This moved the PCI bus of the GbE eth1 device. Use a fixup
to adjust the dt accordingly so that local-mac-address assigned from dt
works on new revision boards.

While we are at it, rename 'blob' to 'fdt' for clarity.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 69245e40 22-Apr-2022 Marek Vasut <marex@denx.de>

led: Drop led_default_state()

This function is empty, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

# 23956252 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mp-venice-gw740x support

The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)

Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# fb9ec338 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: use common GSC driver

Use the common GSC driver.

This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 8f40e7d2 08-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks venice: add support for GPY111 phy

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.

Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

# 52ae8d6c 30-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# ad3a4f91 18-Oct-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add fixup for GW73xx-F+

GW73xx-F board revision switched back to the original PCIe switch due to
part availability.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 3d634b0b 23-Jun-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: switch to 2-bank dram config

Switch to a 2-bank dram config to properly support 4GiB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

# a59b3cd0 09-Jun-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: assume emmc device for USB boot

When booting from USB (SDP) setup firmware-update environment
for emmc device.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 7b39e5b5 02-May-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: dynamically update the update_firmware script

The update_firmware script is intended to update the boot firmware but
the details including the offset and hardware partition are dependent
on the boot device.

Specifically:
- IMX8MM/IMX8MP (BOOTROM v2) the offset is 32KiB for SD and eMMC user
hardware partition and 0KiB for eMMC boot partitions.
- IMX8MM the offset is 33KiB for SD and eMMC regardless of hardware
partition.

Dynamically set soc, dev, bootpart, and bootblk env vars at runtime
and use these in the update_firmware script. Remove the splblk env var
from config files as its no longer needed.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 2c2cc1ea 02-May-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: dynamically determine U-Boot env partition

Determine the U-Boot env hardware partition depending on the boot
device.

This allows the same boot firmware image to be placed on user, boot0,
or boot1 without changing CONFIG_SYS_MMC_ENV_PART.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 59947412 06-Mar-2023 Marek Vasut <marex@denx.de>

arm64: imx8mp: Drop EQoS GPR[1] board workaround

The EQoS interface mode is now configured in common board_interface_eth_init()
and called by EQoS MAC driver when appropriate. Drop the board side duplicates
if the same functionality.

Signed-off-by: Marek Vasut <marex@denx.de>

# 7e32871c 07-Feb-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: enable XWAY PHY support

Enable XWAY PHY driver and remove board specific config from
board_phy_config weak override.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 9c097f81 22-Feb-2023 Simon Glass <sjg@chromium.org>

venice: Simplify conditions for network init

The conditions in this code do not align when doing an SPL build with
split config. Use __maybe_unused to avoid needing to be so explicit.

Of course a better solution would be to refactor all of this to avoid
using #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 630abef2 04-Nov-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: remove redundance adjustment of thermal trip points

commit 0543a1ed2787 ("imx8m: fixup thermal trips") moved updating the
thermal trip points to all IMX8M so we can remove it from our board
specific dt config.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 37d5bf42 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: rename eeprom_init

rename eeprom_init to avoid build failure when using CMD_EEPROM.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 77f6dabc 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add fixup for GW73xx-C+

The GW73xx-C revision and onward replaced the 5-port PCIe switch with a
4-port (dropping PCIe to one of the miniPCIe sockets) due to part
availability. This moved the PCI bus of the GbE eth1 device. Use a fixup
to adjust the dt accordingly so that local-mac-address assigned from dt
works on new revision boards.

While we are at it, rename 'blob' to 'fdt' for clarity.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 69245e40 22-Apr-2022 Marek Vasut <marex@denx.de>

led: Drop led_default_state()

This function is empty, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

# 23956252 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mp-venice-gw740x support

The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)

Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# fb9ec338 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: use common GSC driver

Use the common GSC driver.

This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 8f40e7d2 08-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks venice: add support for GPY111 phy

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.

Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

# 52ae8d6c 30-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 3d634b0b 23-Jun-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: switch to 2-bank dram config

Switch to a 2-bank dram config to properly support 4GiB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

# a59b3cd0 09-Jun-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: assume emmc device for USB boot

When booting from USB (SDP) setup firmware-update environment
for emmc device.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 7b39e5b5 02-May-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: dynamically update the update_firmware script

The update_firmware script is intended to update the boot firmware but
the details including the offset and hardware partition are dependent
on the boot device.

Specifically:
- IMX8MM/IMX8MP (BOOTROM v2) the offset is 32KiB for SD and eMMC user
hardware partition and 0KiB for eMMC boot partitions.
- IMX8MM the offset is 33KiB for SD and eMMC regardless of hardware
partition.

Dynamically set soc, dev, bootpart, and bootblk env vars at runtime
and use these in the update_firmware script. Remove the splblk env var
from config files as its no longer needed.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 2c2cc1ea 02-May-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: dynamically determine U-Boot env partition

Determine the U-Boot env hardware partition depending on the boot
device.

This allows the same boot firmware image to be placed on user, boot0,
or boot1 without changing CONFIG_SYS_MMC_ENV_PART.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 59947412 06-Mar-2023 Marek Vasut <marex@denx.de>

arm64: imx8mp: Drop EQoS GPR[1] board workaround

The EQoS interface mode is now configured in common board_interface_eth_init()
and called by EQoS MAC driver when appropriate. Drop the board side duplicates
if the same functionality.

Signed-off-by: Marek Vasut <marex@denx.de>

# 7e32871c 07-Feb-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: enable XWAY PHY support

Enable XWAY PHY driver and remove board specific config from
board_phy_config weak override.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 9c097f81 22-Feb-2023 Simon Glass <sjg@chromium.org>

venice: Simplify conditions for network init

The conditions in this code do not align when doing an SPL build with
split config. Use __maybe_unused to avoid needing to be so explicit.

Of course a better solution would be to refactor all of this to avoid
using #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 630abef2 04-Nov-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: remove redundance adjustment of thermal trip points

commit 0543a1ed2787 ("imx8m: fixup thermal trips") moved updating the
thermal trip points to all IMX8M so we can remove it from our board
specific dt config.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 37d5bf42 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: rename eeprom_init

rename eeprom_init to avoid build failure when using CMD_EEPROM.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 77f6dabc 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add fixup for GW73xx-C+

The GW73xx-C revision and onward replaced the 5-port PCIe switch with a
4-port (dropping PCIe to one of the miniPCIe sockets) due to part
availability. This moved the PCI bus of the GbE eth1 device. Use a fixup
to adjust the dt accordingly so that local-mac-address assigned from dt
works on new revision boards.

While we are at it, rename 'blob' to 'fdt' for clarity.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 69245e40 22-Apr-2022 Marek Vasut <marex@denx.de>

led: Drop led_default_state()

This function is empty, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

# 23956252 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mp-venice-gw740x support

The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)

Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# fb9ec338 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: use common GSC driver

Use the common GSC driver.

This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 8f40e7d2 08-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks venice: add support for GPY111 phy

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.

Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

# 52ae8d6c 30-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 59947412 06-Mar-2023 Marek Vasut <marex@denx.de>

arm64: imx8mp: Drop EQoS GPR[1] board workaround

The EQoS interface mode is now configured in common board_interface_eth_init()
and called by EQoS MAC driver when appropriate. Drop the board side duplicates
if the same functionality.

Signed-off-by: Marek Vasut <marex@denx.de>

# 7e32871c 07-Feb-2023 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: enable XWAY PHY support

Enable XWAY PHY driver and remove board specific config from
board_phy_config weak override.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 9c097f81 22-Feb-2023 Simon Glass <sjg@chromium.org>

venice: Simplify conditions for network init

The conditions in this code do not align when doing an SPL build with
split config. Use __maybe_unused to avoid needing to be so explicit.

Of course a better solution would be to refactor all of this to avoid
using #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 630abef2 04-Nov-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: remove redundance adjustment of thermal trip points

commit 0543a1ed2787 ("imx8m: fixup thermal trips") moved updating the
thermal trip points to all IMX8M so we can remove it from our board
specific dt config.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 37d5bf42 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: rename eeprom_init

rename eeprom_init to avoid build failure when using CMD_EEPROM.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 77f6dabc 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add fixup for GW73xx-C+

The GW73xx-C revision and onward replaced the 5-port PCIe switch with a
4-port (dropping PCIe to one of the miniPCIe sockets) due to part
availability. This moved the PCI bus of the GbE eth1 device. Use a fixup
to adjust the dt accordingly so that local-mac-address assigned from dt
works on new revision boards.

While we are at it, rename 'blob' to 'fdt' for clarity.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 69245e40 22-Apr-2022 Marek Vasut <marex@denx.de>

led: Drop led_default_state()

This function is empty, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

# 23956252 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mp-venice-gw740x support

The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)

Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# fb9ec338 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: use common GSC driver

Use the common GSC driver.

This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 8f40e7d2 08-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks venice: add support for GPY111 phy

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.

Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

# 52ae8d6c 30-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 630abef2 04-Nov-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: remove redundance adjustment of thermal trip points

commit 0543a1ed2787 ("imx8m: fixup thermal trips") moved updating the
thermal trip points to all IMX8M so we can remove it from our board
specific dt config.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 37d5bf42 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: rename eeprom_init

rename eeprom_init to avoid build failure when using CMD_EEPROM.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 77f6dabc 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add fixup for GW73xx-C+

The GW73xx-C revision and onward replaced the 5-port PCIe switch with a
4-port (dropping PCIe to one of the miniPCIe sockets) due to part
availability. This moved the PCI bus of the GbE eth1 device. Use a fixup
to adjust the dt accordingly so that local-mac-address assigned from dt
works on new revision boards.

While we are at it, rename 'blob' to 'fdt' for clarity.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 69245e40 22-Apr-2022 Marek Vasut <marex@denx.de>

led: Drop led_default_state()

This function is empty, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

# 23956252 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mp-venice-gw740x support

The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)

Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# fb9ec338 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: use common GSC driver

Use the common GSC driver.

This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 8f40e7d2 08-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks venice: add support for GPY111 phy

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.

Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

# 52ae8d6c 30-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 37d5bf42 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: rename eeprom_init

rename eeprom_init to avoid build failure when using CMD_EEPROM.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 77f6dabc 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add fixup for GW73xx-C+

The GW73xx-C revision and onward replaced the 5-port PCIe switch with a
4-port (dropping PCIe to one of the miniPCIe sockets) due to part
availability. This moved the PCI bus of the GbE eth1 device. Use a fixup
to adjust the dt accordingly so that local-mac-address assigned from dt
works on new revision boards.

While we are at it, rename 'blob' to 'fdt' for clarity.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 69245e40 22-Apr-2022 Marek Vasut <marex@denx.de>

led: Drop led_default_state()

This function is empty, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

# 23956252 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mp-venice-gw740x support

The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)

Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# fb9ec338 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: use common GSC driver

Use the common GSC driver.

This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 8f40e7d2 08-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks venice: add support for GPY111 phy

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.

Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

# 52ae8d6c 30-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 77f6dabc 11-Aug-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add fixup for GW73xx-C+

The GW73xx-C revision and onward replaced the 5-port PCIe switch with a
4-port (dropping PCIe to one of the miniPCIe sockets) due to part
availability. This moved the PCI bus of the GbE eth1 device. Use a fixup
to adjust the dt accordingly so that local-mac-address assigned from dt
works on new revision boards.

While we are at it, rename 'blob' to 'fdt' for clarity.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 69245e40 22-Apr-2022 Marek Vasut <marex@denx.de>

led: Drop led_default_state()

This function is empty, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

# 23956252 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mp-venice-gw740x support

The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)

Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# fb9ec338 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: use common GSC driver

Use the common GSC driver.

This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 8f40e7d2 08-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks venice: add support for GPY111 phy

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.

Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

# 52ae8d6c 30-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 69245e40 22-Apr-2022 Marek Vasut <marex@denx.de>

led: Drop led_default_state()

This function is empty, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

# 23956252 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mp-venice-gw740x support

The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)

Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# fb9ec338 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: use common GSC driver

Use the common GSC driver.

This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 8f40e7d2 08-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks venice: add support for GPY111 phy

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.

Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

# 52ae8d6c 30-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 23956252 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mp-venice-gw740x support

The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)

Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# fb9ec338 13-Apr-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: use common GSC driver

Use the common GSC driver.

This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

# 8f40e7d2 08-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks venice: add support for GPY111 phy

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.

Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

# 52ae8d6c 30-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 8f40e7d2 08-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks venice: add support for GPY111 phy

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.

Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

# 52ae8d6c 30-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 52ae8d6c 30-Mar-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 2cb156e1 11-Feb-2022 Tim Harvey <tharvey@gateworks.com>

board: gateworks: venice: add imx8mn-gw7902 support

The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>