#
d678a59d |
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18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b8d59ba0 |
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30-Apr-2024 |
Tom Rini <trini@konsulko.com> |
board: freescale: Remove <common.h> and add needed includes Remove <common.h> from this board vendor directory and when needed add missing include files directly. Acked-by: Jason Liu <jason.hui.liu@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
487fa1aa |
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23-Aug-2023 |
Laurentiu Tudor <laurentiu.tudor@nxp.com> |
fsl-layerscape: drop obsolete PPA secure firmware support PPA was a secure firmware developed in-house which is no longer supported and replaced by TF-A quite some years ago. Drop support for it. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
aa6e94de |
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16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
8976556a |
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24-Mar-2022 |
Gaurav Jain <gaurav.jain@nxp.com> |
Layerscape: Enable Job ring driver model. LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162 platforms are enabled with JR driver model. removed sec_init() call from board files. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Michael Walle <michael@walle.cc> |
#
b2633482 |
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22-Oct-2021 |
Marek BehĂșn <kabel@kernel.org> |
board: freescale: various boards: Let env subsystem set gd->env_addr Various freescale boards set gd->env_addr to default_environment in board_init(), conditional on CONFIG_ENV_IS_NOWHERE, but this is redundant, since it is done by env_init() before board_init() is called. Let the env subsystem handle this. Signed-off-by: Marek BehĂșn <marek.behun@nic.cz> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
864c3dbc |
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13-Apr-2021 |
Mian Yousaf Kaukab <ykaukab@suse.de> |
ls1012a: net: pfe: remove pfe stop from bootcmd When using bootefi to boot a EFI binary, u-boot is supposed to provide networking service for EFI application. Currently, 'pfe stop' command is called from bootcmd before running bootefi. As a result network stops working for EFI applications and console is flooded with "Rx pkt not on expected port" messages. Implement board_quiesce_devices() for ls1012a boards and call pfe_command_stop() from it instead of calling 'pfe stop' from *_bootcmd and bootcmd. Tested-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com> Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> [Fixed checkpatch space error] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b75d8dc5 |
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26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a0affb36 |
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31-Dec-2019 |
Biwen Li <biwen.li@nxp.com> |
dm: arm64: ls1012a: add i2c DM support This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
db41d65a |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
807765b0 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f3998fdc |
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02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
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05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
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12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
|
08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
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11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
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08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4a47bf8a |
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08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
481fb01f |
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08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
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10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
#
11d14bfb |
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23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
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06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
#
36cc0de0 |
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06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
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30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
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30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
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16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
1fdcc8df |
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26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
|
26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
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02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
|
03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b8d59ba0 |
|
30-Apr-2024 |
Tom Rini <trini@konsulko.com> |
board: freescale: Remove <common.h> and add needed includes Remove <common.h> from this board vendor directory and when needed add missing include files directly. Acked-by: Jason Liu <jason.hui.liu@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
487fa1aa |
|
23-Aug-2023 |
Laurentiu Tudor <laurentiu.tudor@nxp.com> |
fsl-layerscape: drop obsolete PPA secure firmware support PPA was a secure firmware developed in-house which is no longer supported and replaced by TF-A quite some years ago. Drop support for it. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
aa6e94de |
|
16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
8976556a |
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24-Mar-2022 |
Gaurav Jain <gaurav.jain@nxp.com> |
Layerscape: Enable Job ring driver model. LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162 platforms are enabled with JR driver model. removed sec_init() call from board files. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Michael Walle <michael@walle.cc> |
#
b2633482 |
|
22-Oct-2021 |
Marek BehĂșn <kabel@kernel.org> |
board: freescale: various boards: Let env subsystem set gd->env_addr Various freescale boards set gd->env_addr to default_environment in board_init(), conditional on CONFIG_ENV_IS_NOWHERE, but this is redundant, since it is done by env_init() before board_init() is called. Let the env subsystem handle this. Signed-off-by: Marek BehĂșn <marek.behun@nic.cz> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
864c3dbc |
|
13-Apr-2021 |
Mian Yousaf Kaukab <ykaukab@suse.de> |
ls1012a: net: pfe: remove pfe stop from bootcmd When using bootefi to boot a EFI binary, u-boot is supposed to provide networking service for EFI application. Currently, 'pfe stop' command is called from bootcmd before running bootefi. As a result network stops working for EFI applications and console is flooded with "Rx pkt not on expected port" messages. Implement board_quiesce_devices() for ls1012a boards and call pfe_command_stop() from it instead of calling 'pfe stop' from *_bootcmd and bootcmd. Tested-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com> Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> [Fixed checkpatch space error] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2147a169 |
|
09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b75d8dc5 |
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26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a0affb36 |
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31-Dec-2019 |
Biwen Li <biwen.li@nxp.com> |
dm: arm64: ls1012a: add i2c DM support This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
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db41d65a |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
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807765b0 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f3998fdc |
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02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
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05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
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12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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7ab16479 |
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08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
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11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
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08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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4a47bf8a |
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08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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481fb01f |
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08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
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10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
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11d14bfb |
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23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
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06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
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36cc0de0 |
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06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
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30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
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30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
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16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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1fdcc8df |
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26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
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26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
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02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
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02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
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03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
487fa1aa |
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23-Aug-2023 |
Laurentiu Tudor <laurentiu.tudor@nxp.com> |
fsl-layerscape: drop obsolete PPA secure firmware support PPA was a secure firmware developed in-house which is no longer supported and replaced by TF-A quite some years ago. Drop support for it. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
aa6e94de |
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16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
8976556a |
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24-Mar-2022 |
Gaurav Jain <gaurav.jain@nxp.com> |
Layerscape: Enable Job ring driver model. LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162 platforms are enabled with JR driver model. removed sec_init() call from board files. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Michael Walle <michael@walle.cc> |
#
b2633482 |
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22-Oct-2021 |
Marek BehĂșn <kabel@kernel.org> |
board: freescale: various boards: Let env subsystem set gd->env_addr Various freescale boards set gd->env_addr to default_environment in board_init(), conditional on CONFIG_ENV_IS_NOWHERE, but this is redundant, since it is done by env_init() before board_init() is called. Let the env subsystem handle this. Signed-off-by: Marek BehĂșn <marek.behun@nic.cz> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
864c3dbc |
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13-Apr-2021 |
Mian Yousaf Kaukab <ykaukab@suse.de> |
ls1012a: net: pfe: remove pfe stop from bootcmd When using bootefi to boot a EFI binary, u-boot is supposed to provide networking service for EFI application. Currently, 'pfe stop' command is called from bootcmd before running bootefi. As a result network stops working for EFI applications and console is flooded with "Rx pkt not on expected port" messages. Implement board_quiesce_devices() for ls1012a boards and call pfe_command_stop() from it instead of calling 'pfe stop' from *_bootcmd and bootcmd. Tested-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com> Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> [Fixed checkpatch space error] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2147a169 |
|
09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a0affb36 |
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31-Dec-2019 |
Biwen Li <biwen.li@nxp.com> |
dm: arm64: ls1012a: add i2c DM support This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
db41d65a |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
807765b0 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f3998fdc |
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02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
|
05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
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12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
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08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
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11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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6aaa539f |
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08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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4a47bf8a |
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08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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481fb01f |
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08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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63b2316c |
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10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
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11d14bfb |
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23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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4961eafc |
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06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
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36cc0de0 |
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06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
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5b404be6 |
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30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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7d559604 |
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30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
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16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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1fdcc8df |
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26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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b9e745bb |
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26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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b392a6d4 |
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02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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341238fd |
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02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
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03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
aa6e94de |
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16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
8976556a |
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24-Mar-2022 |
Gaurav Jain <gaurav.jain@nxp.com> |
Layerscape: Enable Job ring driver model. LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162 platforms are enabled with JR driver model. removed sec_init() call from board files. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Michael Walle <michael@walle.cc> |
#
b2633482 |
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22-Oct-2021 |
Marek BehĂșn <kabel@kernel.org> |
board: freescale: various boards: Let env subsystem set gd->env_addr Various freescale boards set gd->env_addr to default_environment in board_init(), conditional on CONFIG_ENV_IS_NOWHERE, but this is redundant, since it is done by env_init() before board_init() is called. Let the env subsystem handle this. Signed-off-by: Marek BehĂșn <marek.behun@nic.cz> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
864c3dbc |
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13-Apr-2021 |
Mian Yousaf Kaukab <ykaukab@suse.de> |
ls1012a: net: pfe: remove pfe stop from bootcmd When using bootefi to boot a EFI binary, u-boot is supposed to provide networking service for EFI application. Currently, 'pfe stop' command is called from bootcmd before running bootefi. As a result network stops working for EFI applications and console is flooded with "Rx pkt not on expected port" messages. Implement board_quiesce_devices() for ls1012a boards and call pfe_command_stop() from it instead of calling 'pfe stop' from *_bootcmd and bootcmd. Tested-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com> Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> [Fixed checkpatch space error] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b75d8dc5 |
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26-Jun-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a0affb36 |
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31-Dec-2019 |
Biwen Li <biwen.li@nxp.com> |
dm: arm64: ls1012a: add i2c DM support This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
db41d65a |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
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807765b0 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f3998fdc |
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02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
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05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
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12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
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08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
|
11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4a47bf8a |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
481fb01f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
|
10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
#
11d14bfb |
|
23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
#
36cc0de0 |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
|
16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
1fdcc8df |
|
26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
|
26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
|
03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
8976556a |
|
24-Mar-2022 |
Gaurav Jain <gaurav.jain@nxp.com> |
Layerscape: Enable Job ring driver model. LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162 platforms are enabled with JR driver model. removed sec_init() call from board files. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Michael Walle <michael@walle.cc> |
#
b2633482 |
|
22-Oct-2021 |
Marek BehĂșn <marek.behun@nic.cz> |
board: freescale: various boards: Let env subsystem set gd->env_addr Various freescale boards set gd->env_addr to default_environment in board_init(), conditional on CONFIG_ENV_IS_NOWHERE, but this is redundant, since it is done by env_init() before board_init() is called. Let the env subsystem handle this. Signed-off-by: Marek BehĂșn <marek.behun@nic.cz> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
864c3dbc |
|
13-Apr-2021 |
Mian Yousaf Kaukab <ykaukab@suse.de> |
ls1012a: net: pfe: remove pfe stop from bootcmd When using bootefi to boot a EFI binary, u-boot is supposed to provide networking service for EFI application. Currently, 'pfe stop' command is called from bootcmd before running bootefi. As a result network stops working for EFI applications and console is flooded with "Rx pkt not on expected port" messages. Implement board_quiesce_devices() for ls1012a boards and call pfe_command_stop() from it instead of calling 'pfe stop' from *_bootcmd and bootcmd. Tested-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com> Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> [Fixed checkpatch space error] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2147a169 |
|
09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a0affb36 |
|
31-Dec-2019 |
Biwen Li <biwen.li@nxp.com> |
dm: arm64: ls1012a: add i2c DM support This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
db41d65a |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
807765b0 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f3998fdc |
|
02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
|
05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
|
12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
|
08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
|
11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4a47bf8a |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
481fb01f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
|
10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
#
11d14bfb |
|
23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
#
36cc0de0 |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
|
16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
1fdcc8df |
|
26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
|
26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
|
03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b2633482 |
|
22-Oct-2021 |
Marek BehĂșn <marek.behun@nic.cz> |
board: freescale: various boards: Let env subsystem set gd->env_addr Various freescale boards set gd->env_addr to default_environment in board_init(), conditional on CONFIG_ENV_IS_NOWHERE, but this is redundant, since it is done by env_init() before board_init() is called. Let the env subsystem handle this. Signed-off-by: Marek BehĂșn <marek.behun@nic.cz> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
864c3dbc |
|
13-Apr-2021 |
Mian Yousaf Kaukab <ykaukab@suse.de> |
ls1012a: net: pfe: remove pfe stop from bootcmd When using bootefi to boot a EFI binary, u-boot is supposed to provide networking service for EFI application. Currently, 'pfe stop' command is called from bootcmd before running bootefi. As a result network stops working for EFI applications and console is flooded with "Rx pkt not on expected port" messages. Implement board_quiesce_devices() for ls1012a boards and call pfe_command_stop() from it instead of calling 'pfe stop' from *_bootcmd and bootcmd. Tested-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com> Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> [Fixed checkpatch space error] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2147a169 |
|
09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a0affb36 |
|
31-Dec-2019 |
Biwen Li <biwen.li@nxp.com> |
dm: arm64: ls1012a: add i2c DM support This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
db41d65a |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
807765b0 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f3998fdc |
|
02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
|
05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
|
12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
|
08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
|
11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4a47bf8a |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
481fb01f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
|
10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
#
11d14bfb |
|
23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
#
36cc0de0 |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
|
16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
1fdcc8df |
|
26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
|
26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
|
03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
864c3dbc |
|
13-Apr-2021 |
Mian Yousaf Kaukab <ykaukab@suse.de> |
ls1012a: net: pfe: remove pfe stop from bootcmd When using bootefi to boot a EFI binary, u-boot is supposed to provide networking service for EFI application. Currently, 'pfe stop' command is called from bootcmd before running bootefi. As a result network stops working for EFI applications and console is flooded with "Rx pkt not on expected port" messages. Implement board_quiesce_devices() for ls1012a boards and call pfe_command_stop() from it instead of calling 'pfe stop' from *_bootcmd and bootcmd. Tested-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com> Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> [Fixed checkpatch space error] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2147a169 |
|
09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b75d8dc5 |
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26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a0affb36 |
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31-Dec-2019 |
Biwen Li <biwen.li@nxp.com> |
dm: arm64: ls1012a: add i2c DM support This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
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db41d65a |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
807765b0 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f3998fdc |
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02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
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05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
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12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
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08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
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11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
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08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4a47bf8a |
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08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
481fb01f |
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08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
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10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
#
11d14bfb |
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23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
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06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
#
36cc0de0 |
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06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
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30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
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30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
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16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
1fdcc8df |
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26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
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26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
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02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
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02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
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03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
2147a169 |
|
09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a0affb36 |
|
31-Dec-2019 |
Biwen Li <biwen.li@nxp.com> |
dm: arm64: ls1012a: add i2c DM support This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
db41d65a |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
807765b0 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f3998fdc |
|
02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
|
05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
|
12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
|
08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
|
11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4a47bf8a |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
481fb01f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
|
10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
#
11d14bfb |
|
23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
#
36cc0de0 |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
|
16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
1fdcc8df |
|
26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
|
26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
|
03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a0affb36 |
|
31-Dec-2019 |
Biwen Li <biwen.li@nxp.com> |
dm: arm64: ls1012a: add i2c DM support This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
db41d65a |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
807765b0 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f3998fdc |
|
02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
|
05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
|
12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
|
08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
|
11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4a47bf8a |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
481fb01f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
|
10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
#
11d14bfb |
|
23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
#
36cc0de0 |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
|
16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
1fdcc8df |
|
26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
|
26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
|
03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a0affb36 |
|
31-Dec-2019 |
Biwen Li <biwen.li@nxp.com> |
dm: arm64: ls1012a: add i2c DM support This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
db41d65a |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
807765b0 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f3998fdc |
|
02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
|
05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
|
12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
|
08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
|
11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4a47bf8a |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
481fb01f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
|
10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
#
11d14bfb |
|
23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
#
36cc0de0 |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
|
16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
1fdcc8df |
|
26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
|
26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
|
03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a0affb36 |
|
31-Dec-2019 |
Biwen Li <biwen.li@nxp.com> |
dm: arm64: ls1012a: add i2c DM support This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
db41d65a |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
807765b0 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f3998fdc |
|
02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
|
05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
|
12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
|
08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
|
11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4a47bf8a |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
481fb01f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
|
10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
#
11d14bfb |
|
23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
#
36cc0de0 |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
|
16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
1fdcc8df |
|
26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
|
26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
|
03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
a0affb36 |
|
31-Dec-2019 |
Biwen Li <biwen.li@nxp.com> |
dm: arm64: ls1012a: add i2c DM support This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
db41d65a |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
807765b0 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f3998fdc |
|
02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
|
05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
|
12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
|
08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
|
11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4a47bf8a |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
481fb01f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
|
10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
#
11d14bfb |
|
23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
#
36cc0de0 |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
|
16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
1fdcc8df |
|
26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
|
26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
|
03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
db41d65a |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move hang() to the same header as panic() At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
807765b0 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move device-tree setup functions to fdt_support.h These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f3998fdc |
|
02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
|
05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
|
12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
|
08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
|
11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4a47bf8a |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
481fb01f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
|
10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
#
11d14bfb |
|
23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
#
36cc0de0 |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
|
16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
1fdcc8df |
|
26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
|
26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
|
03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
f3998fdc |
|
02-Aug-2019 |
Simon Glass <sjg@chromium.org> |
env: Rename environment.h to env_internal.h This file contains lots of internal details about the environment. Most code can include env.h instead, calling the functions there as needed. Rename this file and add a comment at the top to indicate its internal nature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Fixup apalis-tk1.c] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1f6180df |
|
05-Nov-2018 |
Rajesh Bhagat <rajesh.bhagat@nxp.com> |
armv8: ls1012ardb: Add TFABOOT support TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
|
12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7ab16479 |
|
08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
b0ce187b |
|
11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
6aaa539f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4a47bf8a |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
481fb01f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
63b2316c |
|
10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com> |
#
11d14bfb |
|
23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
4961eafc |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com> |
#
36cc0de0 |
|
06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com> |
#
5b404be6 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
7d559604 |
|
30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
5e4a6db8 |
|
16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
1fdcc8df |
|
26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
b9e745bb |
|
26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
b392a6d4 |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
341238fd |
|
02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3b6e3898 |
|
03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
3fa48f0a |
|
12-Apr-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
board: freescale: ls1012ardb: Add command to switch QSPI bank Add command "boot_bank X" to switch the boot bank to either 1 or 2. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
|
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
7ab16479 |
|
08-Mar-2018 |
Calvin Johnson <calvin.johnson@nxp.com> |
board: freescale: ls1012ardb: enable network support on ls1012ardb This patch enables ethernet support for ls1012ardb. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
|
#
b0ce187b |
|
11-Jan-2018 |
Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> |
board: ls1012a: LS1012A-2G5RDB board support LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
|
#
6aaa539f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: support hwconfig for eSDHC1 enabling I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
|
#
4a47bf8a |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: add more board version information Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
|
#
481fb01f |
|
08-Dec-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012ardb: clean up definitions for I2C IO expanders This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
|
#
63b2316c |
|
10-Aug-2017 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
fsl-layerscape: Consolidate registers space defination for CCI-400 bus CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com>
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11d14bfb |
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23-Mar-2017 |
Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> |
armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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4961eafc |
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06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Update early MMU for DDR after initialization In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com>
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36cc0de0 |
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06-Mar-2017 |
York Sun <york.sun@nxp.com> |
armv8: layerscape: Rewrite memory reservation For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com>
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5b404be6 |
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30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of PPA The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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7d559604 |
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30-Jan-2017 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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5e4a6db8 |
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16-Jan-2017 |
Yangbo Lu <yangbo.lu@nxp.com> |
armv8: ls1012a: define esdhc_status_fixup for RDB board On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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1fdcc8df |
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26-Sep-2016 |
York Sun <york.sun@nxp.com> |
driver: ddr: fsl_mmdc: Pass board parameters through data structure Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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b9e745bb |
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26-Aug-2016 |
Shengzhou Liu <Shengzhou.Liu@nxp.com> |
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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b392a6d4 |
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02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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341238fd |
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02-Aug-2016 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
arm: fsl-layerscape: move forward the non-secure access permission setup Move forward the basic non-secure access enable operation, so the subsequent individual device access permission can override it. And collect the dispersed callers in board level, and then move them to SoC level. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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3b6e3898 |
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03-Jun-2016 |
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
armv8: ls1012a: Add support of ls1012ardb board QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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