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d678a59d |
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18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
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c501db75 |
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30-Apr-2024 |
Tom Rini <trini@konsulko.com> |
arm: rockchip: Remove <common.h> and add needed includes Remove <common.h> from all mach-rockchip and include/asm/arch-rockchip files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
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a597a77b |
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22-Mar-2024 |
Jonas Karlman <jonas@kwiboo.se> |
rockchip: spl: Add SPI NOR flash to boot_devices array Add missing boot source id <-> device tree node path mapping for SPI NOR flash on PX30, RK3288, RK3308, RK3368 and RV1126. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Dragan Simic <dsimic@manjaro.org> |
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9f5df9a3 |
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11-Mar-2024 |
Quentin Schulz <quentin.schulz@theobroma-systems.com> |
rockchip: include asm/io.h directly in asm/arch-rockchip/hardware.h The different macros use writel which is defined in asm/io.h, so let's include the header so users of hardware.h do not need to include asm/io.h as well. While at it, remove asm/io.h includes wherever asm/arch-rockchip/hardware.h is included already. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> |
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c6154677 |
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14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
arm: rockchip: rv1126: Set dram area unsecure for SPL Unsecure the dram area so that MMC, USB, and SFC controllers can able to read data from dram. Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
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ffb191e4 |
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14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
arm: rockchip: Add RV1126 arch core support Rockchip RV1126 is a high-performance vision processor SoC for IPC/CVR, especially for AI related application. Add arch core support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Change-Id: I22fde40ec375e3c6aba39808abf252edc45d4b04 |
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c501db75 |
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30-Apr-2024 |
Tom Rini <trini@konsulko.com> |
arm: rockchip: Remove <common.h> and add needed includes Remove <common.h> from all mach-rockchip and include/asm/arch-rockchip files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
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a597a77b |
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22-Mar-2024 |
Jonas Karlman <jonas@kwiboo.se> |
rockchip: spl: Add SPI NOR flash to boot_devices array Add missing boot source id <-> device tree node path mapping for SPI NOR flash on PX30, RK3288, RK3308, RK3368 and RV1126. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Dragan Simic <dsimic@manjaro.org> |
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9f5df9a3 |
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11-Mar-2024 |
Quentin Schulz <quentin.schulz@theobroma-systems.com> |
rockchip: include asm/io.h directly in asm/arch-rockchip/hardware.h The different macros use writel which is defined in asm/io.h, so let's include the header so users of hardware.h do not need to include asm/io.h as well. While at it, remove asm/io.h includes wherever asm/arch-rockchip/hardware.h is included already. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> |
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c6154677 |
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14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
arm: rockchip: rv1126: Set dram area unsecure for SPL Unsecure the dram area so that MMC, USB, and SFC controllers can able to read data from dram. Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
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ffb191e4 |
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14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
arm: rockchip: Add RV1126 arch core support Rockchip RV1126 is a high-performance vision processor SoC for IPC/CVR, especially for AI related application. Add arch core support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Change-Id: I22fde40ec375e3c6aba39808abf252edc45d4b04 |
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a597a77b |
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22-Mar-2024 |
Jonas Karlman <jonas@kwiboo.se> |
rockchip: spl: Add SPI NOR flash to boot_devices array Add missing boot source id <-> device tree node path mapping for SPI NOR flash on PX30, RK3288, RK3308, RK3368 and RV1126. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Dragan Simic <dsimic@manjaro.org> |
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9f5df9a3 |
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11-Mar-2024 |
Quentin Schulz <quentin.schulz@theobroma-systems.com> |
rockchip: include asm/io.h directly in asm/arch-rockchip/hardware.h The different macros use writel which is defined in asm/io.h, so let's include the header so users of hardware.h do not need to include asm/io.h as well. While at it, remove asm/io.h includes wherever asm/arch-rockchip/hardware.h is included already. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> |
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c6154677 |
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14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
arm: rockchip: rv1126: Set dram area unsecure for SPL Unsecure the dram area so that MMC, USB, and SFC controllers can able to read data from dram. Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
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ffb191e4 |
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14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
arm: rockchip: Add RV1126 arch core support Rockchip RV1126 is a high-performance vision processor SoC for IPC/CVR, especially for AI related application. Add arch core support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Change-Id: I22fde40ec375e3c6aba39808abf252edc45d4b04 |
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9f5df9a3 |
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11-Mar-2024 |
Quentin Schulz <quentin.schulz@theobroma-systems.com> |
rockchip: include asm/io.h directly in asm/arch-rockchip/hardware.h The different macros use writel which is defined in asm/io.h, so let's include the header so users of hardware.h do not need to include asm/io.h as well. While at it, remove asm/io.h includes wherever asm/arch-rockchip/hardware.h is included already. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> |
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c6154677 |
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14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
arm: rockchip: rv1126: Set dram area unsecure for SPL Unsecure the dram area so that MMC, USB, and SFC controllers can able to read data from dram. Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
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ffb191e4 |
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14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
arm: rockchip: Add RV1126 arch core support Rockchip RV1126 is a high-performance vision processor SoC for IPC/CVR, especially for AI related application. Add arch core support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Change-Id: I22fde40ec375e3c6aba39808abf252edc45d4b04 |
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c6154677 |
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14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
arm: rockchip: rv1126: Set dram area unsecure for SPL Unsecure the dram area so that MMC, USB, and SFC controllers can able to read data from dram. Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
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ffb191e4 |
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14-Dec-2022 |
Jagan Teki <jagan@edgeble.ai> |
arm: rockchip: Add RV1126 arch core support Rockchip RV1126 is a high-performance vision processor SoC for IPC/CVR, especially for AI related application. Add arch core support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Change-Id: I22fde40ec375e3c6aba39808abf252edc45d4b04 |