History log of /u-boot/arch/arm/mach-rockchip/px30/Kconfig
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# ed4b0ce2 23-May-2024 Quentin Schulz <quentin.schulz@cherry.de>

rockchip: Use common bss and stack addresses on PX30

See commit 008ba0d56d00 ("rockchip: Add common default bss and stack
addresses") for memory layout. This migrates PX30 to use the new layout,
except for TPL. Indeed, PX30 is extremely limited in SRAM, so we need to
be extra careful about what goes into the TPL and how much we can
allocate there, so let's keep the current value for
TPL_SYS_MALLOC_F_LEN (already present in the PX30-specific Kconfig, from
an earlier commit).

This will allow us to use the same memory layout on one more Rockchip
SoC, which is always a nice thing. Additionally, this will make it
easier to fix U-Boot proper pre-reloc running out of memory on PX30 in a
subsequent commit.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>

# 78d1f04f 23-May-2024 Quentin Schulz <quentin.schulz@cherry.de>

rockchip: px30: default TPL_SYS_MALLOC_F_LEN to 0x600 on PX30 Kconfig level

This is the kind of setting that typically doesn't need to be changed
between boards based on the same SoC, so let's make it the default in
PX30 Kconfig so we don't have to care about it in the defconfig if we
don't want to.

Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>

# 5a6cf7c5 16-Apr-2024 Michal Simek <michal.simek@amd.com>

Kconfig: Make all Kconfig encoding ascii

Some of Kconfigs are using utf-8 encoding because of used chars. Convert
all of them to ascii enconging. Based on discussion ASCII should be used in
general with the exception of names.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# c925be73 09-Jan-2023 Quentin Schulz <quentin.schulz@cherry.de>

rockchip: add support for PX30 Ringneck SoM on Haikou Devkit

The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip
PX30 in a micro Qseven-compatible form-factor.

PX30-µQ7 features:
* CPU: quad-core Cortex-A35
* DRAM: 2GB dual-channel
* eMMC: onboard eMMC
* SD/MMC
* TI DP83825I 10/100Mbps PHY
* USB:
* USB2.0 dual role port
* 3x USB2.0 host via onboard USB2.0 hub
* Display: MIPI-DSI
* Camera: MIPI-CSI
* onboard 2.4GHz WiFi + Bluetooth module
* Companion Controller: on-board additional microcontroller
(STM32 Cortex-M0 or ATtiny):
* RTC
* fan controller
* CAN (only STM32)

The non-U-Boot DTS files are imported from Linux v6.2-rc2.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>

# ca8a329a 16-May-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SPL_PAD_TO et al to Kconfig

This converts the following to Kconfig:
CONFIG_SPL_PAD_TO
CONFIG_SPL_MAX_SIZE
CONFIG_TPL_PAD_TO
CONFIG_TPL_MAX_SIZE

Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the
existing places.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 54562045 09-Apr-2022 Johan Jonker <jbx6244@gmail.com>

rockchip: move ROCKCHIP_STIMER_BASE to Kconfig

Move ROCKCHIP_STIMER_BASE to Kconfig.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 0ade0252 15-Nov-2021 Jagan Teki <jagan@amarulasolutions.com>

engicam: px30: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.

PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@cherry.de>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@cherry.de>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 5a6cf7c5 16-Apr-2024 Michal Simek <michal.simek@amd.com>

Kconfig: Make all Kconfig encoding ascii

Some of Kconfigs are using utf-8 encoding because of used chars. Convert
all of them to ascii enconging. Based on discussion ASCII should be used in
general with the exception of names.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# c925be73 09-Jan-2023 Quentin Schulz <quentin.schulz@theobroma-systems.com>

rockchip: add support for PX30 Ringneck SoM on Haikou Devkit

The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip
PX30 in a micro Qseven-compatible form-factor.

PX30-µQ7 features:
* CPU: quad-core Cortex-A35
* DRAM: 2GB dual-channel
* eMMC: onboard eMMC
* SD/MMC
* TI DP83825I 10/100Mbps PHY
* USB:
* USB2.0 dual role port
* 3x USB2.0 host via onboard USB2.0 hub
* Display: MIPI-DSI
* Camera: MIPI-CSI
* onboard 2.4GHz WiFi + Bluetooth module
* Companion Controller: on-board additional microcontroller
(STM32 Cortex-M0 or ATtiny):
* RTC
* fan controller
* CAN (only STM32)

The non-U-Boot DTS files are imported from Linux v6.2-rc2.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>

# ca8a329a 16-May-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SPL_PAD_TO et al to Kconfig

This converts the following to Kconfig:
CONFIG_SPL_PAD_TO
CONFIG_SPL_MAX_SIZE
CONFIG_TPL_PAD_TO
CONFIG_TPL_MAX_SIZE

Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the
existing places.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 54562045 09-Apr-2022 Johan Jonker <jbx6244@gmail.com>

rockchip: move ROCKCHIP_STIMER_BASE to Kconfig

Move ROCKCHIP_STIMER_BASE to Kconfig.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 0ade0252 15-Nov-2021 Jagan Teki <jagan@amarulasolutions.com>

engicam: px30: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.

PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# c925be73 09-Jan-2023 Quentin Schulz <quentin.schulz@theobroma-systems.com>

rockchip: add support for PX30 Ringneck SoM on Haikou Devkit

The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip
PX30 in a micro Qseven-compatible form-factor.

PX30-µQ7 features:
* CPU: quad-core Cortex-A35
* DRAM: 2GB dual-channel
* eMMC: onboard eMMC
* SD/MMC
* TI DP83825I 10/100Mbps PHY
* USB:
* USB2.0 dual role port
* 3x USB2.0 host via onboard USB2.0 hub
* Display: MIPI-DSI
* Camera: MIPI-CSI
* onboard 2.4GHz WiFi + Bluetooth module
* Companion Controller: on-board additional microcontroller
(STM32 Cortex-M0 or ATtiny):
* RTC
* fan controller
* CAN (only STM32)

The non-U-Boot DTS files are imported from Linux v6.2-rc2.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>

# ca8a329a 16-May-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SPL_PAD_TO et al to Kconfig

This converts the following to Kconfig:
CONFIG_SPL_PAD_TO
CONFIG_SPL_MAX_SIZE
CONFIG_TPL_PAD_TO
CONFIG_TPL_MAX_SIZE

Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the
existing places.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 54562045 09-Apr-2022 Johan Jonker <jbx6244@gmail.com>

rockchip: move ROCKCHIP_STIMER_BASE to Kconfig

Move ROCKCHIP_STIMER_BASE to Kconfig.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 0ade0252 15-Nov-2021 Jagan Teki <jagan@amarulasolutions.com>

engicam: px30: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.

PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# ca8a329a 16-May-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SPL_PAD_TO et al to Kconfig

This converts the following to Kconfig:
CONFIG_SPL_PAD_TO
CONFIG_SPL_MAX_SIZE
CONFIG_TPL_PAD_TO
CONFIG_TPL_MAX_SIZE

Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the
existing places.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 54562045 09-Apr-2022 Johan Jonker <jbx6244@gmail.com>

rockchip: move ROCKCHIP_STIMER_BASE to Kconfig

Move ROCKCHIP_STIMER_BASE to Kconfig.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 0ade0252 15-Nov-2021 Jagan Teki <jagan@amarulasolutions.com>

engicam: px30: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.

PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 54562045 09-Apr-2022 Johan Jonker <jbx6244@gmail.com>

rockchip: move ROCKCHIP_STIMER_BASE to Kconfig

Move ROCKCHIP_STIMER_BASE to Kconfig.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 0ade0252 15-Nov-2021 Jagan Teki <jagan@amarulasolutions.com>

engicam: px30: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.

PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 0ade0252 15-Nov-2021 Jagan Teki <jagan@amarulasolutions.com>

engicam: px30: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.

PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>

# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 51656ae1 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# 39c8b2c7 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>


# cf1b86a3 28-Oct-2020 Jagan Teki <jagan@amarulasolutions.com>

rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# 02ce99ec 01-Jul-2020 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# ec4fafdf 28-Nov-2019 Paul Kocialkowski <paul.kocialkowski@bootlin.com>

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>


# e9ccb2f5 16-Jul-2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>