- Almost all ppbreg.h's definitions are also in pcireg.h. Remove duplicated
definitions from ppbreg.h and move some definitions from ppbreg.h to
pcireg.h.
- Change fast back-to-back "capable" to "enable" in pci_subr.c.
- Print Primary Discard Timer, Secondary Discard Timer, Discard Timer Status
and Discard Timer SERR# Enable bit in pci_subr.c.
- PCI_BRIDGE_PREFETCHBASE32_REG and PCI_BRIDGE_PREFETCHLIMIT32_REG are
"upper" 32bit registers, rename to *UP32_REG to avoid confusion.
- Use macro.

VGA 16 bit decode bit is not bit 3 but bit 4.

branches: 1.8.2;
Add VGA 16bit decode bit into the PCI bridge control register. This bit is
defined in PCI-to-PCI Bridge Architecture Specification Revision 1.2. This
bit has meaning if the VGA enable bit or the VGA Palette Snoop Enable bit is
set.

NOTE: sys/arch/x86/pci/pci_ranges.c::mmio_range_extend_by_vga_enable() and/or
some other functions should be modified.

branches: 1.7.2;
Fix typos.

branches: 1.6.120; 1.6.140; 1.6.154;
merge ktrace-lwp.

nuke trailing whitespace

branches: 1.4.16; 1.4.24; 1.4.26;
Fix the Bridge Control Register bit definitions, add ones that
appeared in PCI 2.2.

branches: 1.3.2; 1.3.6;
added bridge secondary bus reset macros.

branches: 1.2.42;
(1) provide #defines for cf_loc[] entries for devices that attach to
pcibus and pci.
(2) remove the #ifdef i386 from pci.c, and provide a machine-dependent
hook (pci_md_attach_hook()) to do any machine-dependent attachment
gunk, e.g. on the i386 printing out the configuration mode (if bus 0)
(3) don't pass max device number for a given bus in, use
PCI_MAX_DEVICE_NUMBER, which can be defined on a per-machine basis.
(defaults to 32. on i386, it's 32 if pci conf mode == 1, 16 if 2.)

Preliminary support for PCI-PCI bridges. Recognize a PCI-PCI bridge
and attach the secondary pci bus as a 'pci' device. Note that this support
is incomplete and will not yet work for ports other than that i386. (The
i386 can rely on the PCI interrupt 'line' information to determine
interrupt mapping, which is not necessarily possible on other systems.)

Add VGA 16bit decode bit into the PCI bridge control register. This bit is
defined in PCI-to-PCI Bridge Architecture Specification Revision 1.2. This
bit has meaning if the VGA enable bit or the VGA Palette Snoop Enable bit is
set.

NOTE: sys/arch/x86/pci/pci_ranges.c::mmio_range_extend_by_vga_enable() and/or
some other functions should be modified.

Fix typos.

branches: 1.6.120; 1.6.140; 1.6.154;
merge ktrace-lwp.

nuke trailing whitespace

branches: 1.4.16; 1.4.24; 1.4.26;
Fix the Bridge Control Register bit definitions, add ones that
appeared in PCI 2.2.

branches: 1.3.2; 1.3.6;
added bridge secondary bus reset macros.

branches: 1.2.42;
(1) provide #defines for cf_loc[] entries for devices that attach to
pcibus and pci.
(2) remove the #ifdef i386 from pci.c, and provide a machine-dependent
hook (pci_md_attach_hook()) to do any machine-dependent attachment
gunk, e.g. on the i386 printing out the configuration mode (if bus 0)
(3) don't pass max device number for a given bus in, use
PCI_MAX_DEVICE_NUMBER, which can be defined on a per-machine basis.
(defaults to 32. on i386, it's 32 if pci conf mode == 1, 16 if 2.)

Preliminary support for PCI-PCI bridges. Recognize a PCI-PCI bridge
and attach the secondary pci bus as a 'pci' device. Note that this support
is incomplete and will not yet work for ports other than that i386. (The
i386 can rely on the PCI interrupt 'line' information to determine
interrupt mapping, which is not necessarily possible on other systems.)