Restrict dwcmmc to 32bit DMA (<4GB) regardless of attachment

Fix a typo in a comment

dwcmmc: Add support for card detect using SDMMC_CDETECT register

Merge thorpej-cfargs2.

branches: 1.27.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.26.6;
Disable thrctrl or now and note why

Remember / use sc_verid

Trailing whitespace

Release the sc_intr_lock on error

More SDIO stability and performance fixes

dwc_mmc fixes:
- Rockchip uses a different SDIO int bit, so take this into consideration
- Avoid unnecessary resets and always wait for resets to complete
- kpause instead of delay while holding spinlock
- Do not attempt autostop for SD_IO_RW_EXTENDED commands
- Allow for sub-blklen byte counts for single block transfers

branches: 1.20.2;
Fix performance regression with previous

dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs

Add support for SDIO interrupts.

branches: 1.17.2;
Fix infinite loop in dwc_mmc_exec_command error path

Simplify card detect

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

branches: 1.13.2;
dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

dwcmmc: Add support for card detect using SDMMC_CDETECT register

Merge thorpej-cfargs2.

branches: 1.27.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.26.6;
Disable thrctrl or now and note why

Remember / use sc_verid

Trailing whitespace

Release the sc_intr_lock on error

More SDIO stability and performance fixes

dwc_mmc fixes:
- Rockchip uses a different SDIO int bit, so take this into consideration
- Avoid unnecessary resets and always wait for resets to complete
- kpause instead of delay while holding spinlock
- Do not attempt autostop for SD_IO_RW_EXTENDED commands
- Allow for sub-blklen byte counts for single block transfers

branches: 1.20.2;
Fix performance regression with previous

dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs

Add support for SDIO interrupts.

branches: 1.17.2;
Fix infinite loop in dwc_mmc_exec_command error path

Simplify card detect

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

branches: 1.13.2;
dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

Merge thorpej-cfargs2.

branches: 1.27.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.26.6;
Disable thrctrl or now and note why

Remember / use sc_verid

Trailing whitespace

Release the sc_intr_lock on error

More SDIO stability and performance fixes

dwc_mmc fixes:
- Rockchip uses a different SDIO int bit, so take this into consideration
- Avoid unnecessary resets and always wait for resets to complete
- kpause instead of delay while holding spinlock
- Do not attempt autostop for SD_IO_RW_EXTENDED commands
- Allow for sub-blklen byte counts for single block transfers

branches: 1.20.2;
Fix performance regression with previous

dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs

Add support for SDIO interrupts.

branches: 1.17.2;
Fix infinite loop in dwc_mmc_exec_command error path

Simplify card detect

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

branches: 1.13.2;
dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.26.6;
Disable thrctrl or now and note why

Remember / use sc_verid

Trailing whitespace

Release the sc_intr_lock on error

More SDIO stability and performance fixes

dwc_mmc fixes:
- Rockchip uses a different SDIO int bit, so take this into consideration
- Avoid unnecessary resets and always wait for resets to complete
- kpause instead of delay while holding spinlock
- Do not attempt autostop for SD_IO_RW_EXTENDED commands
- Allow for sub-blklen byte counts for single block transfers

branches: 1.20.2;
Fix performance regression with previous

dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs

Add support for SDIO interrupts.

branches: 1.17.2;
Fix infinite loop in dwc_mmc_exec_command error path

Simplify card detect

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

branches: 1.13.2;
dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

Disable thrctrl or now and note why

Remember / use sc_verid

Trailing whitespace

Release the sc_intr_lock on error

More SDIO stability and performance fixes

dwc_mmc fixes:
- Rockchip uses a different SDIO int bit, so take this into consideration
- Avoid unnecessary resets and always wait for resets to complete
- kpause instead of delay while holding spinlock
- Do not attempt autostop for SD_IO_RW_EXTENDED commands
- Allow for sub-blklen byte counts for single block transfers

branches: 1.20.2;
Fix performance regression with previous

dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs

Add support for SDIO interrupts.

branches: 1.17.2;
Fix infinite loop in dwc_mmc_exec_command error path

Simplify card detect

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

branches: 1.13.2;
dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

Trailing whitespace

Release the sc_intr_lock on error

More SDIO stability and performance fixes

dwc_mmc fixes:
- Rockchip uses a different SDIO int bit, so take this into consideration
- Avoid unnecessary resets and always wait for resets to complete
- kpause instead of delay while holding spinlock
- Do not attempt autostop for SD_IO_RW_EXTENDED commands
- Allow for sub-blklen byte counts for single block transfers

branches: 1.20.2;
Fix performance regression with previous

dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs

Add support for SDIO interrupts.

branches: 1.17.2;
Fix infinite loop in dwc_mmc_exec_command error path

Simplify card detect

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

branches: 1.13.2;
dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

More SDIO stability and performance fixes

dwc_mmc fixes:
- Rockchip uses a different SDIO int bit, so take this into consideration
- Avoid unnecessary resets and always wait for resets to complete
- kpause instead of delay while holding spinlock
- Do not attempt autostop for SD_IO_RW_EXTENDED commands
- Allow for sub-blklen byte counts for single block transfers

Fix performance regression with previous

dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs

Add support for SDIO interrupts.

branches: 1.17.2;
Fix infinite loop in dwc_mmc_exec_command error path

Simplify card detect

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

branches: 1.13.2;
dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

dwc_mmc fixes:
- Rockchip uses a different SDIO int bit, so take this into consideration
- Avoid unnecessary resets and always wait for resets to complete
- kpause instead of delay while holding spinlock
- Do not attempt autostop for SD_IO_RW_EXTENDED commands
- Allow for sub-blklen byte counts for single block transfers

Fix performance regression with previous

dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs

Add support for SDIO interrupts.

branches: 1.17.2;
Fix infinite loop in dwc_mmc_exec_command error path

Simplify card detect

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

branches: 1.13.2;
dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

Fix performance regression with previous

dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs

Add support for SDIO interrupts.

Fix infinite loop in dwc_mmc_exec_command error path

Simplify card detect

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

branches: 1.13.2;
dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

Add support for SDIO interrupts.

Fix infinite loop in dwc_mmc_exec_command error path

Simplify card detect

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

branches: 1.13.2;
dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

Fix infinite loop in dwc_mmc_exec_command error path

Simplify card detect

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

branches: 1.13.2;
dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

Simplify card detect

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Reduce 10 second timeouts to 2 seconds.

dwcmmc: set ciu clock rate rather than assuming fixed input rate

If the bus glue does not provide values for fifo reg offset and
fifo depth, try to auto detect based on the chip version and
value already programmed into FIFOTH.

branches: 1.11.4; 1.11.6;
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

branches: 1.10.10;
remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.

remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver

remove DWC_MMC_DEBUG

reduce timeouts, fix clk div calculation

Dump registers on timeout and allow bus glue to override card detect func

wait for command done status before doing pio transfer

branches: 1.6.2;
when resetting controller, dont preserve DWC_MMC_CTRL_REG state. makes this work on my radxa lite

improve intr reg debugging

Fix inverted logic of card_detect_n bit, from FUKAUMI Naoki <fun@naobsd.org>.

- Simplify clock setup
- Add DWC_MMC_F_FORCE_CLK flag, which forces updating clock for each
command (apparently required by Rockchip)
- Let bus glue limit the max clk speed used

- Explicitly initialize CLKSRC register.
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
Requires bus glue to implement sc_set_clkdiv callback.

add DesignWare SD/MMC controller driver