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arm: rockchip: Add support for RK3288 SoC.

The Rockchip RK3288 is a quad core Cortex-A17 SoC.

Handle RGMII variants.

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.

Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

use fdtbus_intr_establish_xname

branches: 1.15.8;
rk_gmac: clean up code for setting up clock delay lines a bit

- break long lines
- move toggle to enable it under a single #ifdef notyet

I've tested it and it works, but I'm keeping the #ifdef notyet for now
because it didn't solve the original problem I was debugging.

move DWCGMAC_MPSAFE into dwc_gmac_var.h and introduce an
additional define that is 0 or FDT_INTR_MPSAFE that the
frontends can use when passing to fdtbus_intr_establish().

with NET_MPSAFE enabled, this avoids hangs seen on rock64,
as well as finishing the MPSAFE port for this driver.

XXX: still don't know why the existing hangs occur.

Add rnd(9) support.

RK3399: Skip setting RGMII TX/RX clock delayline parameters for now and
rely on the settings configured by firmware.

Set RGMII delay for MAC side correctly on RK3399.

Fix RGMII clock 25MHz setting (for 100Mbps).

Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.

Add support for Rockchip RK3399 SoC.

Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'

Rock64 needs more time for the PHY to reset. Add a delay.

Use syscon API

Only install interrupt handler if dwc_gmac_attach succeeds.

branches: 1.3.2; 1.3.4;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.

Enable gpio reset logic

Add initial support for Rockchip RK3328 SoC.

arm: rockchip: Add support for RK3288 SoC.

The Rockchip RK3288 is a quad core Cortex-A17 SoC.

Handle RGMII variants.

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.

Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

use fdtbus_intr_establish_xname

branches: 1.15.8;
rk_gmac: clean up code for setting up clock delay lines a bit

- break long lines
- move toggle to enable it under a single #ifdef notyet

I've tested it and it works, but I'm keeping the #ifdef notyet for now
because it didn't solve the original problem I was debugging.

move DWCGMAC_MPSAFE into dwc_gmac_var.h and introduce an
additional define that is 0 or FDT_INTR_MPSAFE that the
frontends can use when passing to fdtbus_intr_establish().

with NET_MPSAFE enabled, this avoids hangs seen on rock64,
as well as finishing the MPSAFE port for this driver.

XXX: still don't know why the existing hangs occur.

Add rnd(9) support.

RK3399: Skip setting RGMII TX/RX clock delayline parameters for now and
rely on the settings configured by firmware.

Set RGMII delay for MAC side correctly on RK3399.

Fix RGMII clock 25MHz setting (for 100Mbps).

Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.

Add support for Rockchip RK3399 SoC.

Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'

Rock64 needs more time for the PHY to reset. Add a delay.

Use syscon API

Only install interrupt handler if dwc_gmac_attach succeeds.

branches: 1.3.2; 1.3.4;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.

Enable gpio reset logic

Add initial support for Rockchip RK3328 SoC.

Handle RGMII variants.

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.

Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

use fdtbus_intr_establish_xname

branches: 1.15.8;
rk_gmac: clean up code for setting up clock delay lines a bit

- break long lines
- move toggle to enable it under a single #ifdef notyet

I've tested it and it works, but I'm keeping the #ifdef notyet for now
because it didn't solve the original problem I was debugging.

move DWCGMAC_MPSAFE into dwc_gmac_var.h and introduce an
additional define that is 0 or FDT_INTR_MPSAFE that the
frontends can use when passing to fdtbus_intr_establish().

with NET_MPSAFE enabled, this avoids hangs seen on rock64,
as well as finishing the MPSAFE port for this driver.

XXX: still don't know why the existing hangs occur.

Add rnd(9) support.

RK3399: Skip setting RGMII TX/RX clock delayline parameters for now and
rely on the settings configured by firmware.

Set RGMII delay for MAC side correctly on RK3399.

Fix RGMII clock 25MHz setting (for 100Mbps).

Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.

Add support for Rockchip RK3399 SoC.

Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'

Rock64 needs more time for the PHY to reset. Add a delay.

Use syscon API

Only install interrupt handler if dwc_gmac_attach succeeds.

branches: 1.3.2; 1.3.4;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.

Enable gpio reset logic

Add initial support for Rockchip RK3328 SoC.

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.

Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

use fdtbus_intr_establish_xname

rk_gmac: clean up code for setting up clock delay lines a bit

- break long lines
- move toggle to enable it under a single #ifdef notyet

I've tested it and it works, but I'm keeping the #ifdef notyet for now
because it didn't solve the original problem I was debugging.

move DWCGMAC_MPSAFE into dwc_gmac_var.h and introduce an
additional define that is 0 or FDT_INTR_MPSAFE that the
frontends can use when passing to fdtbus_intr_establish().

with NET_MPSAFE enabled, this avoids hangs seen on rock64,
as well as finishing the MPSAFE port for this driver.

XXX: still don't know why the existing hangs occur.

Add rnd(9) support.

RK3399: Skip setting RGMII TX/RX clock delayline parameters for now and
rely on the settings configured by firmware.

Set RGMII delay for MAC side correctly on RK3399.

Fix RGMII clock 25MHz setting (for 100Mbps).

Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.

Add support for Rockchip RK3399 SoC.

Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'

Rock64 needs more time for the PHY to reset. Add a delay.

Use syscon API

Only install interrupt handler if dwc_gmac_attach succeeds.

branches: 1.3.2; 1.3.4;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.

Enable gpio reset logic

Add initial support for Rockchip RK3328 SoC.

Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.

Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

use fdtbus_intr_establish_xname

rk_gmac: clean up code for setting up clock delay lines a bit

- break long lines
- move toggle to enable it under a single #ifdef notyet

I've tested it and it works, but I'm keeping the #ifdef notyet for now
because it didn't solve the original problem I was debugging.

move DWCGMAC_MPSAFE into dwc_gmac_var.h and introduce an
additional define that is 0 or FDT_INTR_MPSAFE that the
frontends can use when passing to fdtbus_intr_establish().

with NET_MPSAFE enabled, this avoids hangs seen on rock64,
as well as finishing the MPSAFE port for this driver.

XXX: still don't know why the existing hangs occur.

Add rnd(9) support.

RK3399: Skip setting RGMII TX/RX clock delayline parameters for now and
rely on the settings configured by firmware.

Set RGMII delay for MAC side correctly on RK3399.

Fix RGMII clock 25MHz setting (for 100Mbps).

Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.

Add support for Rockchip RK3399 SoC.

Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'

Rock64 needs more time for the PHY to reset. Add a delay.

Use syscon API

Only install interrupt handler if dwc_gmac_attach succeeds.

branches: 1.3.2; 1.3.4;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.

Enable gpio reset logic

Add initial support for Rockchip RK3328 SoC.

Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

use fdtbus_intr_establish_xname

rk_gmac: clean up code for setting up clock delay lines a bit

- break long lines
- move toggle to enable it under a single #ifdef notyet

I've tested it and it works, but I'm keeping the #ifdef notyet for now
because it didn't solve the original problem I was debugging.

move DWCGMAC_MPSAFE into dwc_gmac_var.h and introduce an
additional define that is 0 or FDT_INTR_MPSAFE that the
frontends can use when passing to fdtbus_intr_establish().

with NET_MPSAFE enabled, this avoids hangs seen on rock64,
as well as finishing the MPSAFE port for this driver.

XXX: still don't know why the existing hangs occur.

Add rnd(9) support.

RK3399: Skip setting RGMII TX/RX clock delayline parameters for now and
rely on the settings configured by firmware.

Set RGMII delay for MAC side correctly on RK3399.

Fix RGMII clock 25MHz setting (for 100Mbps).

Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.

Add support for Rockchip RK3399 SoC.

Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'

Rock64 needs more time for the PHY to reset. Add a delay.

Use syscon API

Only install interrupt handler if dwc_gmac_attach succeeds.

branches: 1.3.2; 1.3.4;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.

Enable gpio reset logic

Add initial support for Rockchip RK3328 SoC.

use fdtbus_intr_establish_xname

rk_gmac: clean up code for setting up clock delay lines a bit

- break long lines
- move toggle to enable it under a single #ifdef notyet

I've tested it and it works, but I'm keeping the #ifdef notyet for now
because it didn't solve the original problem I was debugging.

move DWCGMAC_MPSAFE into dwc_gmac_var.h and introduce an
additional define that is 0 or FDT_INTR_MPSAFE that the
frontends can use when passing to fdtbus_intr_establish().

with NET_MPSAFE enabled, this avoids hangs seen on rock64,
as well as finishing the MPSAFE port for this driver.

XXX: still don't know why the existing hangs occur.

Add rnd(9) support.

RK3399: Skip setting RGMII TX/RX clock delayline parameters for now and
rely on the settings configured by firmware.

Set RGMII delay for MAC side correctly on RK3399.

Fix RGMII clock 25MHz setting (for 100Mbps).

Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.

Add support for Rockchip RK3399 SoC.

Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'

Rock64 needs more time for the PHY to reset. Add a delay.

Use syscon API

Only install interrupt handler if dwc_gmac_attach succeeds.

branches: 1.3.2; 1.3.4;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.

Enable gpio reset logic

Add initial support for Rockchip RK3328 SoC.

rk_gmac: clean up code for setting up clock delay lines a bit

- break long lines
- move toggle to enable it under a single #ifdef notyet

I've tested it and it works, but I'm keeping the #ifdef notyet for now
because it didn't solve the original problem I was debugging.

move DWCGMAC_MPSAFE into dwc_gmac_var.h and introduce an
additional define that is 0 or FDT_INTR_MPSAFE that the
frontends can use when passing to fdtbus_intr_establish().

with NET_MPSAFE enabled, this avoids hangs seen on rock64,
as well as finishing the MPSAFE port for this driver.

XXX: still don't know why the existing hangs occur.

Add rnd(9) support.

RK3399: Skip setting RGMII TX/RX clock delayline parameters for now and
rely on the settings configured by firmware.

Set RGMII delay for MAC side correctly on RK3399.

Fix RGMII clock 25MHz setting (for 100Mbps).

Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.

Add support for Rockchip RK3399 SoC.

Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'

Rock64 needs more time for the PHY to reset. Add a delay.

Use syscon API

Only install interrupt handler if dwc_gmac_attach succeeds.

branches: 1.3.2; 1.3.4;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.

Enable gpio reset logic

Add initial support for Rockchip RK3328 SoC.

move DWCGMAC_MPSAFE into dwc_gmac_var.h and introduce an
additional define that is 0 or FDT_INTR_MPSAFE that the
frontends can use when passing to fdtbus_intr_establish().

with NET_MPSAFE enabled, this avoids hangs seen on rock64,
as well as finishing the MPSAFE port for this driver.

XXX: still don't know why the existing hangs occur.

Add rnd(9) support.

RK3399: Skip setting RGMII TX/RX clock delayline parameters for now and
rely on the settings configured by firmware.

Set RGMII delay for MAC side correctly on RK3399.

Fix RGMII clock 25MHz setting (for 100Mbps).

Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.

Add support for Rockchip RK3399 SoC.

Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'

Rock64 needs more time for the PHY to reset. Add a delay.

Use syscon API

Only install interrupt handler if dwc_gmac_attach succeeds.

branches: 1.3.2; 1.3.4;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.

Enable gpio reset logic

Add initial support for Rockchip RK3328 SoC.

Add rnd(9) support.

RK3399: Skip setting RGMII TX/RX clock delayline parameters for now and
rely on the settings configured by firmware.

Set RGMII delay for MAC side correctly on RK3399.

Fix RGMII clock 25MHz setting (for 100Mbps).

Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.

Add support for Rockchip RK3399 SoC.

Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'

Rock64 needs more time for the PHY to reset. Add a delay.

Use syscon API

Only install interrupt handler if dwc_gmac_attach succeeds.

branches: 1.3.2; 1.3.4;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.

Enable gpio reset logic

Add initial support for Rockchip RK3328 SoC.

RK3399: Skip setting RGMII TX/RX clock delayline parameters for now and
rely on the settings configured by firmware.

Set RGMII delay for MAC side correctly on RK3399.

Fix RGMII clock 25MHz setting (for 100Mbps).

Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.

Add support for Rockchip RK3399 SoC.

Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'

Rock64 needs more time for the PHY to reset. Add a delay.

Use syscon API

Only install interrupt handler if dwc_gmac_attach succeeds.

branches: 1.3.2;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.

Enable gpio reset logic

Add initial support for Rockchip RK3328 SoC.

Set RGMII delay for MAC side correctly on RK3399.

Fix RGMII clock 25MHz setting (for 100Mbps).

Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.

Add support for Rockchip RK3399 SoC.

Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'

Rock64 needs more time for the PHY to reset. Add a delay.

Use syscon API

Only install interrupt handler if dwc_gmac_attach succeeds.

branches: 1.3.2;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.

Enable gpio reset logic

Add initial support for Rockchip RK3328 SoC.