Don't use V8 atomic instruction for AA32 mode.

Fix the barrier confusion. From Riastradh - thanks!.

Change #ifdef FOO to #if defined(FOO). NFCI.

branches: 1.36.2;
Fix ARMv8 instructions

G/C

Nix mb_* on arm.

branches: 1.33.4; 1.33.8;
more const.

branches: 1.32.10;
Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
userland

Indentation.

Don't use plain inline in that might end up compiled with -ansi.

add constcond.

branches: 1.28.2; 1.28.4;
Correct _ARM_ARCH_8 instructions

Fix non-armv6 case.

Rather than having long complicated asm statements, use inlines for
ldrex/strex and let the compiler arrange the code how it wants.

Support thumb1 indirectly and thumb2 directly

branches: 1.24.2;
Use uint32_t for __asm to appease clang.

Shut up clang but returning the result to a uint32_t variable.

For consistency, define the _KERNEL version of __swp() using a non-volatile
type, similar to how it is defined in non-KERNEL

Fixes the 'build.sh release' for evbarm-{eb,el}

branches: 1.21.2;
The arm11 barriers are mcr (write), not mrc (read)

Add required dsb/dmb instructions (or placeholders for them) required for
the weak memory ordering of the ARMV7-A architecture.

Change cmpeq to cmp and add "cc" to clobber in the ldrex/strex asm.

Use ldrexb/strexb for ARMv6 and above platforms since
"swp{b} use is deprecated" for them.

branches: 1.17.18; 1.17.34; 1.17.42;
Remove clause 3 and 4 from TNF licenses

Merge kernel changes in matt-armv6 to HEAD.

branches: 1.15.16; 1.15.18; 1.15.20;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Merge nick-csl-alignment.

branches: 1.13.2; 1.13.10; 1.13.14; 1.13.16; 1.13.18; 1.13.20; 1.13.22;
Make __cpu_simple_lock_t an unsigned char if _KERNEL, and operate on it
using SWPB.

Approved by Matt Thomas.

Protect MB_* and <arm/cpufunc.h> by _KERNEL

Since drain_writebuf() is #defined in <arm/cpufunc.h>, we need to
include it here.

+ mb_memory()

Equate mb_write and mb_read to drain_writebuf (from cpu.h)

Add <arm/mutex.h> and <arm/rwlock.h>
Add atomic_cas to <arm/atomic.h> for use by <rwlock.h>

branches: 1.7.26;
inline -> __inline

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.4.16;
Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h
so that they can be used in a namespace-friendly way.

branches: 1.3.8;
Minor tidy-up, mostly to improve readability. The SWP instruction is now
in its own little inline function, and this allows us to get rid of all the
automatic variables elsewhere. This subtly changes the semantics of
__cpu_simple_lock() such that the loop ends up one instruction longer, but
I'm not sure that's a particularly bad thing.

Implement __cpu_simple_lock*() primitives using the SWP insn. Note
this insn is available only on ARM arch v3 and later (and 2a). We
don't expect to be using these ops in the kernel on processors too
old to have SWP, and for userland uses (in e.g. a pthread library),
the kernel will simply have to trap and emulate the insn (it needs
to be "atomic", so a kernel trap of some sort will be necessary on
such platforms anyway).

branches: 1.1.2; 1.1.6; 1.1.10;
Header files which don't differ between arm32 and arm26 and can thus be
shared.

Fix the barrier confusion. From Riastradh - thanks!.

Change #ifdef FOO to #if defined(FOO). NFCI.

Fix ARMv8 instructions

G/C

Nix mb_* on arm.

branches: 1.33.4; 1.33.8;
more const.

branches: 1.32.10;
Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
userland

Indentation.

Don't use plain inline in that might end up compiled with -ansi.

add constcond.

branches: 1.28.2; 1.28.4;
Correct _ARM_ARCH_8 instructions

Fix non-armv6 case.

Rather than having long complicated asm statements, use inlines for
ldrex/strex and let the compiler arrange the code how it wants.

Support thumb1 indirectly and thumb2 directly

branches: 1.24.2;
Use uint32_t for __asm to appease clang.

Shut up clang but returning the result to a uint32_t variable.

For consistency, define the _KERNEL version of __swp() using a non-volatile
type, similar to how it is defined in non-KERNEL

Fixes the 'build.sh release' for evbarm-{eb,el}

branches: 1.21.2;
The arm11 barriers are mcr (write), not mrc (read)

Add required dsb/dmb instructions (or placeholders for them) required for
the weak memory ordering of the ARMV7-A architecture.

Change cmpeq to cmp and add "cc" to clobber in the ldrex/strex asm.

Use ldrexb/strexb for ARMv6 and above platforms since
"swp{b} use is deprecated" for them.

branches: 1.17.18; 1.17.34; 1.17.42;
Remove clause 3 and 4 from TNF licenses

Merge kernel changes in matt-armv6 to HEAD.

branches: 1.15.16; 1.15.18; 1.15.20;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Merge nick-csl-alignment.

branches: 1.13.2; 1.13.10; 1.13.14; 1.13.16; 1.13.18; 1.13.20; 1.13.22;
Make __cpu_simple_lock_t an unsigned char if _KERNEL, and operate on it
using SWPB.

Approved by Matt Thomas.

Protect MB_* and <arm/cpufunc.h> by _KERNEL

Since drain_writebuf() is #defined in <arm/cpufunc.h>, we need to
include it here.

+ mb_memory()

Equate mb_write and mb_read to drain_writebuf (from cpu.h)

Add <arm/mutex.h> and <arm/rwlock.h>
Add atomic_cas to <arm/atomic.h> for use by <rwlock.h>

branches: 1.7.26;
inline -> __inline

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.4.16;
Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h
so that they can be used in a namespace-friendly way.

branches: 1.3.8;
Minor tidy-up, mostly to improve readability. The SWP instruction is now
in its own little inline function, and this allows us to get rid of all the
automatic variables elsewhere. This subtly changes the semantics of
__cpu_simple_lock() such that the loop ends up one instruction longer, but
I'm not sure that's a particularly bad thing.

Implement __cpu_simple_lock*() primitives using the SWP insn. Note
this insn is available only on ARM arch v3 and later (and 2a). We
don't expect to be using these ops in the kernel on processors too
old to have SWP, and for userland uses (in e.g. a pthread library),
the kernel will simply have to trap and emulate the insn (it needs
to be "atomic", so a kernel trap of some sort will be necessary on
such platforms anyway).

branches: 1.1.2; 1.1.6; 1.1.10;
Header files which don't differ between arm32 and arm26 and can thus be
shared.

Fix ARMv8 instructions

G/C

Nix mb_* on arm.

branches: 1.33.4;
more const.

Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
userland

Indentation.

Don't use plain inline in that might end up compiled with -ansi.

add constcond.

branches: 1.28.2; 1.28.4;
Correct _ARM_ARCH_8 instructions

Fix non-armv6 case.

Rather than having long complicated asm statements, use inlines for
ldrex/strex and let the compiler arrange the code how it wants.

Support thumb1 indirectly and thumb2 directly

branches: 1.24.2;
Use uint32_t for __asm to appease clang.

Shut up clang but returning the result to a uint32_t variable.

For consistency, define the _KERNEL version of __swp() using a non-volatile
type, similar to how it is defined in non-KERNEL

Fixes the 'build.sh release' for evbarm-{eb,el}

branches: 1.21.2;
The arm11 barriers are mcr (write), not mrc (read)

Add required dsb/dmb instructions (or placeholders for them) required for
the weak memory ordering of the ARMV7-A architecture.

Change cmpeq to cmp and add "cc" to clobber in the ldrex/strex asm.

Use ldrexb/strexb for ARMv6 and above platforms since
"swp{b} use is deprecated" for them.

branches: 1.17.18; 1.17.34; 1.17.42;
Remove clause 3 and 4 from TNF licenses

Merge kernel changes in matt-armv6 to HEAD.

branches: 1.15.16; 1.15.18; 1.15.20;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Merge nick-csl-alignment.

branches: 1.13.2; 1.13.10; 1.13.14; 1.13.16; 1.13.18; 1.13.20; 1.13.22;
Make __cpu_simple_lock_t an unsigned char if _KERNEL, and operate on it
using SWPB.

Approved by Matt Thomas.

Protect MB_* and <arm/cpufunc.h> by _KERNEL

Since drain_writebuf() is #defined in <arm/cpufunc.h>, we need to
include it here.

+ mb_memory()

Equate mb_write and mb_read to drain_writebuf (from cpu.h)

Add <arm/mutex.h> and <arm/rwlock.h>
Add atomic_cas to <arm/atomic.h> for use by <rwlock.h>

branches: 1.7.26;
inline -> __inline

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.4.16;
Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h
so that they can be used in a namespace-friendly way.

branches: 1.3.8;
Minor tidy-up, mostly to improve readability. The SWP instruction is now
in its own little inline function, and this allows us to get rid of all the
automatic variables elsewhere. This subtly changes the semantics of
__cpu_simple_lock() such that the loop ends up one instruction longer, but
I'm not sure that's a particularly bad thing.

Implement __cpu_simple_lock*() primitives using the SWP insn. Note
this insn is available only on ARM arch v3 and later (and 2a). We
don't expect to be using these ops in the kernel on processors too
old to have SWP, and for userland uses (in e.g. a pthread library),
the kernel will simply have to trap and emulate the insn (it needs
to be "atomic", so a kernel trap of some sort will be necessary on
such platforms anyway).

branches: 1.1.2; 1.1.6; 1.1.10;
Header files which don't differ between arm32 and arm26 and can thus be
shared.

Nix mb_* on arm.

more const.

Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
userland

Indentation.

Don't use plain inline in that might end up compiled with -ansi.

add constcond.

branches: 1.28.2; 1.28.4;
Correct _ARM_ARCH_8 instructions

Fix non-armv6 case.

Rather than having long complicated asm statements, use inlines for
ldrex/strex and let the compiler arrange the code how it wants.

Support thumb1 indirectly and thumb2 directly

branches: 1.24.2;
Use uint32_t for __asm to appease clang.

Shut up clang but returning the result to a uint32_t variable.

For consistency, define the _KERNEL version of __swp() using a non-volatile
type, similar to how it is defined in non-KERNEL

Fixes the 'build.sh release' for evbarm-{eb,el}

branches: 1.21.2;
The arm11 barriers are mcr (write), not mrc (read)

Add required dsb/dmb instructions (or placeholders for them) required for
the weak memory ordering of the ARMV7-A architecture.

Change cmpeq to cmp and add "cc" to clobber in the ldrex/strex asm.

Use ldrexb/strexb for ARMv6 and above platforms since
"swp{b} use is deprecated" for them.

branches: 1.17.18; 1.17.34; 1.17.42;
Remove clause 3 and 4 from TNF licenses

Merge kernel changes in matt-armv6 to HEAD.

branches: 1.15.16; 1.15.18; 1.15.20;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Merge nick-csl-alignment.

branches: 1.13.2; 1.13.10; 1.13.14; 1.13.16; 1.13.18; 1.13.20; 1.13.22;
Make __cpu_simple_lock_t an unsigned char if _KERNEL, and operate on it
using SWPB.

Approved by Matt Thomas.

Protect MB_* and <arm/cpufunc.h> by _KERNEL

Since drain_writebuf() is #defined in <arm/cpufunc.h>, we need to
include it here.

+ mb_memory()

Equate mb_write and mb_read to drain_writebuf (from cpu.h)

Add <arm/mutex.h> and <arm/rwlock.h>
Add atomic_cas to <arm/atomic.h> for use by <rwlock.h>

branches: 1.7.26;
inline -> __inline

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.4.16;
Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h
so that they can be used in a namespace-friendly way.

branches: 1.3.8;
Minor tidy-up, mostly to improve readability. The SWP instruction is now
in its own little inline function, and this allows us to get rid of all the
automatic variables elsewhere. This subtly changes the semantics of
__cpu_simple_lock() such that the loop ends up one instruction longer, but
I'm not sure that's a particularly bad thing.

Implement __cpu_simple_lock*() primitives using the SWP insn. Note
this insn is available only on ARM arch v3 and later (and 2a). We
don't expect to be using these ops in the kernel on processors too
old to have SWP, and for userland uses (in e.g. a pthread library),
the kernel will simply have to trap and emulate the insn (it needs
to be "atomic", so a kernel trap of some sort will be necessary on
such platforms anyway).

branches: 1.1.2; 1.1.6; 1.1.10;
Header files which don't differ between arm32 and arm26 and can thus be
shared.

more const.

Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
userland

Indentation.

Don't use plain inline in that might end up compiled with -ansi.

add constcond.

branches: 1.28.2; 1.28.4;
Correct _ARM_ARCH_8 instructions

Fix non-armv6 case.

Rather than having long complicated asm statements, use inlines for
ldrex/strex and let the compiler arrange the code how it wants.

Support thumb1 indirectly and thumb2 directly

branches: 1.24.2;
Use uint32_t for __asm to appease clang.

Shut up clang but returning the result to a uint32_t variable.

For consistency, define the _KERNEL version of __swp() using a non-volatile
type, similar to how it is defined in non-KERNEL

Fixes the 'build.sh release' for evbarm-{eb,el}

branches: 1.21.2;
The arm11 barriers are mcr (write), not mrc (read)

Add required dsb/dmb instructions (or placeholders for them) required for
the weak memory ordering of the ARMV7-A architecture.

Change cmpeq to cmp and add "cc" to clobber in the ldrex/strex asm.

Use ldrexb/strexb for ARMv6 and above platforms since
"swp{b} use is deprecated" for them.

branches: 1.17.18; 1.17.34; 1.17.42;
Remove clause 3 and 4 from TNF licenses

Merge kernel changes in matt-armv6 to HEAD.

branches: 1.15.16; 1.15.18; 1.15.20;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Merge nick-csl-alignment.

branches: 1.13.2; 1.13.10; 1.13.14; 1.13.16; 1.13.18; 1.13.20; 1.13.22;
Make __cpu_simple_lock_t an unsigned char if _KERNEL, and operate on it
using SWPB.

Approved by Matt Thomas.

Protect MB_* and <arm/cpufunc.h> by _KERNEL

Since drain_writebuf() is #defined in <arm/cpufunc.h>, we need to
include it here.

+ mb_memory()

Equate mb_write and mb_read to drain_writebuf (from cpu.h)

Add <arm/mutex.h> and <arm/rwlock.h>
Add atomic_cas to <arm/atomic.h> for use by <rwlock.h>

branches: 1.7.26;
inline -> __inline

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.4.16;
Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h
so that they can be used in a namespace-friendly way.

branches: 1.3.8;
Minor tidy-up, mostly to improve readability. The SWP instruction is now
in its own little inline function, and this allows us to get rid of all the
automatic variables elsewhere. This subtly changes the semantics of
__cpu_simple_lock() such that the loop ends up one instruction longer, but
I'm not sure that's a particularly bad thing.

Implement __cpu_simple_lock*() primitives using the SWP insn. Note
this insn is available only on ARM arch v3 and later (and 2a). We
don't expect to be using these ops in the kernel on processors too
old to have SWP, and for userland uses (in e.g. a pthread library),
the kernel will simply have to trap and emulate the insn (it needs
to be "atomic", so a kernel trap of some sort will be necessary on
such platforms anyway).

branches: 1.1.2; 1.1.6; 1.1.10;
Header files which don't differ between arm32 and arm26 and can thus be
shared.