Rework Arm (32bit and 64bit) AP startup so that cpu_hatch doesn't sleep.

The AP initialisation code in cpu_init_secondary_processor will read and
initialise the required system registers and state for the BP to attach
and report.

Rework the interrupt handler code for this new sequence. Thankfully,
this removes a bunch of code for bcm2836mp.

The VFP detection handler on <= armv7 relies on the global undefined
handler being in place until the BP attaches vfp. That is, after the
APs have been spun up.

gicv3_its.c has a serialisation issue which is protected against in
the gicv3_its_cpu_init, which is called from cpu_hatch, with a spin
lock. The serialisation issue needs addressing more completely.

Tested on RPI3, Apple M1, QEMU, and lx2k

Fixes PR port-arm/56264:
diagnostic assertion "l->l_stat == LSONPROC" failed on RPI3

Remove MAXCPUS dependency.

branches: 1.6.10;
Allow set_affinity calls before PEs are brought online. We store the
desired target PE if set_affinity is called early and restore the routes
when the PE comes alive.

Fail gracefully if gicv3_its_set_affinity is called before a cpu is
brought online.

branches: 1.4.4;
Allow non-power of 2 counts, and support alloc/release/alloc patterns for a device as long as the ITT size is sufficient

branches: 1.3.2;
include dev/pci/pcivar.h, we use pci_attach_args directly

Implement pic_get_affinity/pic_set_affinity for LPIs via ITS

Add support for GICv3 Locality-specific Periphal Interrupts (LPIs) and the
Interrupt Translation Service (ITS).

Remove MAXCPUS dependency.

Allow set_affinity calls before PEs are brought online. We store the
desired target PE if set_affinity is called early and restore the routes
when the PE comes alive.

Fail gracefully if gicv3_its_set_affinity is called before a cpu is
brought online.

branches: 1.4.4;
Allow non-power of 2 counts, and support alloc/release/alloc patterns for a device as long as the ITT size is sufficient

branches: 1.3.2;
include dev/pci/pcivar.h, we use pci_attach_args directly

Implement pic_get_affinity/pic_set_affinity for LPIs via ITS

Add support for GICv3 Locality-specific Periphal Interrupts (LPIs) and the
Interrupt Translation Service (ITS).

Allow set_affinity calls before PEs are brought online. We store the
desired target PE if set_affinity is called early and restore the routes
when the PE comes alive.

Fail gracefully if gicv3_its_set_affinity is called before a cpu is
brought online.

branches: 1.4.4;
Allow non-power of 2 counts, and support alloc/release/alloc patterns for a device as long as the ITT size is sufficient

branches: 1.3.2;
include dev/pci/pcivar.h, we use pci_attach_args directly

Implement pic_get_affinity/pic_set_affinity for LPIs via ITS

Add support for GICv3 Locality-specific Periphal Interrupts (LPIs) and the
Interrupt Translation Service (ITS).

Fail gracefully if gicv3_its_set_affinity is called before a cpu is
brought online.

branches: 1.4.4;
Allow non-power of 2 counts, and support alloc/release/alloc patterns for a device as long as the ITT size is sufficient

branches: 1.3.2;
include dev/pci/pcivar.h, we use pci_attach_args directly

Implement pic_get_affinity/pic_set_affinity for LPIs via ITS

Add support for GICv3 Locality-specific Periphal Interrupts (LPIs) and the
Interrupt Translation Service (ITS).

Allow non-power of 2 counts, and support alloc/release/alloc patterns for a device as long as the ITT size is sufficient

branches: 1.3.2;
include dev/pci/pcivar.h, we use pci_attach_args directly

Implement pic_get_affinity/pic_set_affinity for LPIs via ITS

Add support for GICv3 Locality-specific Periphal Interrupts (LPIs) and the
Interrupt Translation Service (ITS).