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7af42228 |
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14-Feb-2023 |
Steffen Aschbacher <steffen.aschbacher@stihl.de> |
ASoC: tlv320adcx140: extend list of supported samplerates The 'tlv320adcx140' driver currently supports 3 devices: TLV320ADC3140, TLV320ADC5140 and TLV320ADC6140. All 3 devices, support higher samplerates, up to 768-kHz according to their datasheets. In our applications, we only tested (and worked) with 96 kHz and 192 kHz. This change extends the list of supported sample-rates for these devices with 96 & 192 kHz. References: https://www.ti.com/product/TLV320ADC3140 https://www.ti.com/product/TLV320ADC5140 https://www.ti.com/product/TLV320ADC6140 Signed-off-by: Steffen Aschbacher <steffen.aschbacher@stihl.de> Signed-off-by: Alexandru Ardelean <alex@shruggie.ro> Link: https://lore.kernel.org/r/20230214091051.16323-1-alex@shruggie.ro Signed-off-by: Mark Brown <broonie@kernel.org>
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4e82971f |
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15-Aug-2022 |
Kevin Lu <luminlong@139.com> |
ASoC: tlv320adcx140: Add a new kcontrol Add a new kcontrol for phase calib Signed-off-by: Kevin Lu <luminlong@139.com> Link: https://lore.kernel.org/r/20220815112715.21617-1-luminlong@139.com Signed-off-by: Mark Brown <broonie@kernel.org>
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98c17a01 |
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06-Aug-2022 |
Christophe JAILLET <christophe.jaillet@wanadoo.fr> |
ASoC: tlv320adcx140: Fix a typo in a comment s/TLV320ADCX104/TLV320ADCX140/ Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/63efe8fe4e25a8ac386762d2d7cfe9bb9482333f.1659814389.git.christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown <broonie@kernel.org>
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d5214321 |
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18-Sep-2020 |
Camel Guo <camelg@axis.com> |
ASoC: tlv320adcx140: Add support for configuring GPIO pin Add support to configure the GPIO pin to the specific configuration. The GPIO pin can be configured as GPO, IRQ, SDOUT2, PDMCLK, MICBASE_EN, GPI, MCLK, SDIN, PDMDIN1, PDMDIN2, PDMDIN3 or PDMDIN4 and the output drive can be configured with various configuration. Signed-off-by: Camel Guo <camelg@axis.com> Link: https://lore.kernel.org/r/20200918114025.18205-2-camel.guo@axis.com Signed-off-by: Mark Brown <broonie@kernel.org>
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42d5031d |
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15-Sep-2020 |
Dan Murphy <dmurphy@ti.com> |
ASoC: tlv320adcx140: Add the config to configure Tx ASI output Add code to allow the ASI Tx output to be placed into High-z mode during unused ASI cycles. This allows for other devices that may be on the bus to drive the ASI out. By default the 320adcx140 sends 0's for unused cycles. Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200915190606.1744-4-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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df16e221 |
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15-Sep-2020 |
Dan Murphy <dmurphy@ti.com> |
ASoC: tlv320adcx140: Idle the device while writing registers It was observed that if the device was active and register writes were performed there were some unwanted behaviors particularly when writing the word length and some filter options. So when writing to the device the device should be placed in sleep mode and then exit sleep mode once the register update is complete. Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200915190606.1744-1-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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6617cff6 |
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28-Jul-2020 |
Dan Murphy <dmurphy@ti.com> |
ASoC: tlv320adcx140: Add GPO configuration and drive output config Add General Purpose Output (GPO) configuration and driver output configuration. The GPOs can be configured as a GPO, IRQ, SDOUT or a PDMCLK output. In addition the output drive can be configured with various configurations. Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200728160833.24130-2-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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5856d8bd |
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19-Jul-2020 |
Alexander A. Klimov <grandmaster@al2klimov.de> |
ASoC: Replace HTTP links with HTTPS ones Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200719153822.59788-1-grandmaster@al2klimov.de Signed-off-by: Mark Brown <broonie@kernel.org>
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3c35e79c |
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26-May-2020 |
Dan Murphy <dmurphy@ti.com> |
ASoC: tlv320adcx140: Add support for configuring GPI pins Add support to configure the GPI pins to the specific configuration. The pins can be disabled or be configured as data input for any of the digital mic channels. In addition the GPI can be used a a general purpose input, a Master clock input or an ASI input for daisy chaining devices. Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200526200917.10385-2-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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79fc48e4 |
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14-May-2020 |
Dan Murphy <dmurphy@ti.com> |
ASoC: tlv320adcx140: Configure PDM sampling edge Configure the PDM sampling edges based on the values from the firmware. Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200514123338.20392-3-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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0e36f32f |
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13-May-2020 |
Dan Murphy <dmurphy@ti.com> |
ASoC: tlv320adcx140: Fix bias config values The device tree binding declares the ti,mic-bias-source and the ti,vref-source properties as u32. The code reads them as u8 which is incorrect. Since the device tree binding indicates them as u32 the conde needs to be updated to read u32. In addition the bias source needs to be shifted 4 bits to correctly write the register. driver family") Fixes: 37bde5acf040 ("ASoC: tlv320adcx140: Add the tlv320adcx140 codec Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200513142807.11802-1-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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8a329dbd |
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20-Feb-2020 |
Dan Murphy <dmurphy@ti.com> |
ASoC: tlv320adcx140: Add DRE and AGC support The TLV320ADCx140 parts support Dynamic Range Enhancer (DRE) as defined in Section 8.3.2 of the data sheets. The DRE achieves a complete-channel dynamic range as high as 120 dB. At a system level, the DRE scheme enables far-field, high-fidelity recording of audio signals in very quiet environments and low-distortion recording in loud environments. There are 2 enables for DRE. The first is a global setting that enables the DRE engine in the device and the other enable is per channel. If the DRE is enabled globally then either DRE or AGC can be used per each configured channel. If global DRE is disabled then even setting the DRE enable bit in the channel config register will have no effect. Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200221181358.22526-1-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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689c7655 |
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20-Feb-2020 |
Dan Murphy <dmurphy@ti.com> |
ASoC: tlv320adcx140: Add the tlv320adcx140 codec driver family Add the tlv320adcx140 codec driver family. The TLV320ADCx140 is a Burr-Brown™ highperformance, audio analog-to-digital converter (ADC) that supports simultaneous sampling of up to four analog channels or eight digital channels for the pulse density modulation (PDM) microphone input. The device supports line and microphone inputs, and allows for both single-ended and differential input configurations. Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200220210759.31466-3-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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