drm/nouveau/gr/gf100-: switch to newer style interrupt handler

Ampere.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/fifo: use explicit intr interfaces

More control, and shallower call-chain to get to the point.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mc: move NV_PMC_ENABLE bashing to chipset-specific code

Ampere needs different handling here, most of what we touch has moved.

We probably want to refactor these interfaces in general, but I'm not
yet sure how they should look, this will get the job done for now.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mc: implement intr handling on top of nvkm_intr

- new-style handlers can now be used here too
- decent clean-up

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/privring: rename from ibus

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mc: lookup subdev interrupt handlers with split type+inst

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mc: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mc/gf100: add pmu to reset mask

An upcoming commit will replace direct NV_PMC register bashing from PMU
with a call to the proper function.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gf100-: support for masking interrupts

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: s/intr_mask/intr_stat/

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gf100: define reset masks + intr cleanup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: rename struct nvkm_mc_intr to nvkm_mc_map

This will also be used to define NV_PMC_ENABLE <-> subdev mappings in an
upcoming commit.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: move device irq handling to platform-specific code

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gf100-: handle second interrupt tree

Doesn't fix any known issue, but best be safe in case control is handed
to us from firmware with these left enabled.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: abstract interface to master intr registers

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: remove the remainder of the previous style

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: switch to device pri macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: cosmetic changes

This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: namespace + nvidia gpu names (no binary change)

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>