#
e34b9430 |
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24-Feb-2024 |
Praveen Teja Kundanala <praveen.teja.kundanala@amd.com> |
firmware: xilinx: Add ZynqMP efuse access API Add zynqmp_pm_efuse_access API in the ZynqMP firmware for read/write access of efuse memory. Signed-off-by: Praveen Teja Kundanala <praveen.teja.kundanala@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20240224114516.86365-6-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
0c4b2255 |
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18-Dec-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
firmware: xilinx: Export function to use in other module Export zynqmp_pm_get_family_info() to access and find family information in other module. Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Link: https://lore.kernel.org/r/20231219055025.27570-2-jay.buddhabhatti@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
408201eb |
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27-Dec-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
firmware: zynqmp: Convert to platform remove callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new(), which already returns void. Eventually after all drivers are converted, .remove_new() will be renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b5a82472a6d61608c2cd7728ca364f6c88a821c3.1703693980.git.u.kleine-koenig@pengutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
b9ae9962 |
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14-Dec-2023 |
Michal Simek <michal.simek@amd.com> |
firmware: xilinx: Remove zynqmp_pm_pinctrl_get_function() There is no user for this interface that's why remove it. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e52a415a004e28a43e6d08e9e22d9e8fef3737df.1702565618.git.michal.simek@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
8d6608e4 |
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14-Dec-2023 |
Michal Simek <michal.simek@amd.com> |
firmware: xilinx: Remove clock_setrate and clock_getrate api As per the current code base, PM_CLOCK_SETRATE and PM_CLOCK_GETRATE APIs are not supported for the runtime operations. In the case of ZynqMP returning an error from TF-A when there is any request to access these APIs and for Versal also it is returning an error like NO_ACCESS from the firmware. So, just removing the unused code to avoid the confusion around these APIs. Also, there is no issue with the backward compatibility as these APIs were never used since implemented. Hence no need to bump up the version of the feature check API as well. Signed-off-by: Ronak Jain <ronak.jain@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/6ccbffbafd1f0f48f6574d5a3bf2db6a5603fdb0.1702565618.git.michal.simek@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
5dac2a98 |
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29-Nov-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
firmware: zynqmp: Add support to handle IPI CRC failure Added new PM error code XST_PM_INVALID_CRC to handle CRC validation failure during IPI communication. Co-developed-by: Naman Trivedi Manojbhai <naman.trivedimanojbhai@amd.com> Signed-off-by: Naman Trivedi Manojbhai <naman.trivedimanojbhai@amd.com> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Link: https://lore.kernel.org/r/20231129112713.22718-6-jay.buddhabhatti@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
8c016c80 |
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29-Nov-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
drivers: soc: xilinx: Fix error message on SGI registration failure Failure to register SGI for firmware event notification is non-fatal error when feature is not supported by other modules such as Xen and TF-A. Add _info level log message for such special case. Also add XST_PM_INVALID_VERSION error code and map it to -EOPNOSUPP Linux kernel error code. If feature is not supported or EEMI API version is mismatch, firmware can return XST_PM_INVALID_VERSION = 4 or XST_PM_NO_FEATURE = 19 error code. Co-developed-by: Tanmay Shah <tanmay.shah@amd.com> Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Link: https://lore.kernel.org/r/20231129112713.22718-5-jay.buddhabhatti@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
a9d06184 |
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29-Nov-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
firmware: xilinx: Register event manager driver Use family code in order to register event manager driver for Versal and Versal NET platforms, instead of using compatible string. Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Link: https://lore.kernel.org/r/20231129112713.22718-4-jay.buddhabhatti@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
f689a0ca |
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29-Nov-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
firmware: xilinx: Expand feature check to support all PLM modules To support feature check for all modules, append the module id of the API that is being checked to the feature check API so it could be routed to the target module for processing. There is no need to check compatible string because the board information is taken via firmware interface. Co-developed-by: Saeed Nowshadi <saeed.nowshadi@amd.com> Signed-off-by: Saeed Nowshadi <saeed.nowshadi@amd.com> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Link: https://lore.kernel.org/r/20231129112713.22718-3-jay.buddhabhatti@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
f922b16a |
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29-Nov-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
firmware: xilinx: Update firmware call interface to support additional args System-level platform management layer (do_fw_call()) has support for maximum of 5 arguments as of now (1 EEMI API ID + 4 command arguments). In order to support new EEMI PM_IOCTL IDs (Secure Read/Write), this support must be extended to support one additional argument, which results in a configuration of - 1 EEMI API ID + 5 command arguments. Update zynqmp_pm_invoke_fn() and do_fw_call() with this new definition containing variable arguments. As a result, update all the references to pm invoke function with the updated definition. Co-developed-by: Izhar Ameer Shaikh <izhar.ameer.shaikh@amd.com> Signed-off-by: Izhar Ameer Shaikh <izhar.ameer.shaikh@amd.com> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Link: https://lore.kernel.org/r/20231129112713.22718-2-jay.buddhabhatti@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
437cd966 |
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29-Oct-2023 |
Michal Simek <michal.simek@amd.com> |
firmware: xilinx: Use proper indentation in kernel-doc Use tab for zynqmp_pm_load_pdi() arguments doc indentation. No functional change. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://lore.kernel.org/r/1698645181-2874487-1-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
79614953 |
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26-Oct-2023 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Move EXPORT_SYMBOL_GPL next to zynqmp_pm_feature definition As mentioned in Documentation/process/coding-style.rst: In source files, separate functions with one blank line. If the function is exported, the **EXPORT** macro for it should follow immediately after the closing function brace line. So inline with guideline move zynqmp_pm_feature export symbol after its definition. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://lore.kernel.org/r/1698348238-2320426-1-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
5b45759c |
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03-Aug-2023 |
Rob Herring <robh@kernel.org> |
firmware: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Acked-by: Dinh Nguyen <dinguyen@kernel.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20230803-dt-header-cleanups-for-soc-v2-17-d8de2cc88bff@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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#
aa5ed7b3 |
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31-Jul-2023 |
Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> |
firmware: xilinx: Add version check for TRISTATE configuration Support for configuring TRISTATE parameter is added in ZYNQMP PMUFW(Xilinx ZynqMP Platform Management Firmware) Configuration Param Set version 2.0. If the requested configuration is TRISTATE and platform is ZYNQMP then check the version before requesting Xilinx firmware to set the configuration. Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Reviewed-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20230731095026.3766675-3-sai.krishna.potthuri@amd.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
03ffa9af |
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31-Jul-2023 |
Dhaval Shah <dhaval.r.shah@amd.com> |
firmware: xilinx: Add support to get platform information Add function to get family code and sub family code from the idcode. This family code and sub family code helps to identify the platform. Family code of any platform is on bits 21 to 27 and Sub family code is on bits 19 and 20. Signed-off-by: Dhaval Shah <dhaval.r.shah@amd.com> Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Reviewed-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20230731095026.3766675-2-sai.krishna.potthuri@amd.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
a5cb804b |
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16-May-2023 |
Michal Simek <michal.simek@amd.com> |
firmware: xilinx: Switch Michal Simek's email to new one @xilinx.com is still working but better to switch to new amd.com after AMD/Xilinx acquisition. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/36d119221aa12369c601cd37160306aeb84fc973.1684244767.git.michal.simek@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
e2ebc05d |
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02-May-2023 |
Nava kishore Manne <nava.kishore.manne@amd.com> |
firmware: xilinx: Update the zynqmp_pm_fpga_load() API Update the zynqmp_pm_fpga_load() API to handle the firmware error’s properly. Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com> Link: https://lore.kernel.org/r/20230503050158.1936467-1-nava.kishore.manne@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
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#
8f118f61 |
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24-Feb-2023 |
Nava kishore Manne <nava.kishore.manne@amd.com> |
firmware: xilinx: Add pm api function for PL config reg readback Adds PM API for performing Programmable Logic(PL) configuration register readback. It provides an interface to the firmware(pmufw) to readback the FPGA configuration register. Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com> Acked-by: Xu Yilun <yilun.xu@intel.com> Link: https://lore.kernel.org/r/20230224120738.329416-2-nava.kishore.manne@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
38ed310c |
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08-Mar-2023 |
Roman Gushchin <roman.gushchin@linux.dev> |
firmware: xilinx: don't make a sleepable memory allocation from an atomic context The following issue was discovered using lockdep: [ 6.691371] BUG: sleeping function called from invalid context at include/linux/sched/mm.h:209 [ 6.694602] in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 1, name: swapper/0 [ 6.702431] 2 locks held by swapper/0/1: [ 6.706300] #0: ffffff8800f6f188 (&dev->mutex){....}-{3:3}, at: __device_driver_lock+0x4c/0x90 [ 6.714900] #1: ffffffc009a2abb8 (enable_lock){....}-{2:2}, at: clk_enable_lock+0x4c/0x140 [ 6.723156] irq event stamp: 304030 [ 6.726596] hardirqs last enabled at (304029): [<ffffffc008d17ee0>] _raw_spin_unlock_irqrestore+0xc0/0xd0 [ 6.736142] hardirqs last disabled at (304030): [<ffffffc00876bc5c>] clk_enable_lock+0xfc/0x140 [ 6.744742] softirqs last enabled at (303958): [<ffffffc0080904f0>] _stext+0x4f0/0x894 [ 6.752655] softirqs last disabled at (303951): [<ffffffc0080e53b8>] irq_exit+0x238/0x280 [ 6.760744] CPU: 1 PID: 1 Comm: swapper/0 Tainted: G U 5.15.36 #2 [ 6.768048] Hardware name: xlnx,zynqmp (DT) [ 6.772179] Call trace: [ 6.774584] dump_backtrace+0x0/0x300 [ 6.778197] show_stack+0x18/0x30 [ 6.781465] dump_stack_lvl+0xb8/0xec [ 6.785077] dump_stack+0x1c/0x38 [ 6.788345] ___might_sleep+0x1a8/0x2a0 [ 6.792129] __might_sleep+0x6c/0xd0 [ 6.795655] kmem_cache_alloc_trace+0x270/0x3d0 [ 6.800127] do_feature_check_call+0x100/0x220 [ 6.804513] zynqmp_pm_invoke_fn+0x8c/0xb0 [ 6.808555] zynqmp_pm_clock_getstate+0x90/0xe0 [ 6.813027] zynqmp_pll_is_enabled+0x8c/0x120 [ 6.817327] zynqmp_pll_enable+0x38/0xc0 [ 6.821197] clk_core_enable+0x144/0x400 [ 6.825067] clk_core_enable+0xd4/0x400 [ 6.828851] clk_core_enable+0xd4/0x400 [ 6.832635] clk_core_enable+0xd4/0x400 [ 6.836419] clk_core_enable+0xd4/0x400 [ 6.840203] clk_core_enable+0xd4/0x400 [ 6.843987] clk_core_enable+0xd4/0x400 [ 6.847771] clk_core_enable+0xd4/0x400 [ 6.851555] clk_core_enable_lock+0x24/0x50 [ 6.855683] clk_enable+0x24/0x40 [ 6.858952] fclk_probe+0x84/0xf0 [ 6.862220] platform_probe+0x8c/0x110 [ 6.865918] really_probe+0x110/0x5f0 [ 6.869530] __driver_probe_device+0xcc/0x210 [ 6.873830] driver_probe_device+0x64/0x140 [ 6.877958] __driver_attach+0x114/0x1f0 [ 6.881828] bus_for_each_dev+0xe8/0x160 [ 6.885698] driver_attach+0x34/0x50 [ 6.889224] bus_add_driver+0x228/0x300 [ 6.893008] driver_register+0xc0/0x1e0 [ 6.896792] __platform_driver_register+0x44/0x60 [ 6.901436] fclk_driver_init+0x1c/0x28 [ 6.905220] do_one_initcall+0x104/0x590 [ 6.909091] kernel_init_freeable+0x254/0x2bc [ 6.913390] kernel_init+0x24/0x130 [ 6.916831] ret_from_fork+0x10/0x20 Fix it by passing the GFP_ATOMIC gfp flag for the corresponding memory allocation. Fixes: acfdd18591ea ("firmware: xilinx: Use hash-table for api feature check") Cc: stable <stable@kernel.org> Signed-off-by: Roman Gushchin <roman.gushchin@linux.dev> Cc: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Link: https://lore.kernel.org/r/20230308222602.123866-1-roman.gushchin@linux.dev Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
a4b2e606 |
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15-Dec-2022 |
Marek Vasut <marex@denx.de> |
firmware: xilinx: Clear IOCTL_SET_SD_TAPDELAY using PM_MMIO_WRITE In case the tap delay required by Arasan SDHCI is set to 0, the current embeddedsw firmware unconditionally writes IOU_SLCR SD_ITAPDLY to 0x100 (SD0_ITAPDLYENA=1, SD0_ITAPDLYSEL=0). Previous behavior was to keep the IOU_SLCR SD_ITAPDLY set to 0x0. There is some sort of difference in the behavior between SD0_ITAPDLYENA=1/0 with the same SD0_ITAPDLYSEL=0, even though the behavior should be identical -- zero delay added to rxclk_in line. The former breaks HS200 training in low temperature conditions. Write IOU_SLCR SD_ITAPDLY register to 0 using PM_MMIO_WRITE which seem to allow unrestricted WRITE access (and PM_MMIO_READ which allows read access) to the entire address space. This way, it is possible to work around the defect in IOCTL_SET_SD_TAPDELAY design which does not permit clearing SDx_ITAPDLYENA bit. Note that the embeddedsw firmware does not permit clearing the SD_ITAPDLY SD0_ITAPDLYENA bit, this bit can only ever be set by the firmware and it is often impossible to update the possibly broken firmware. Signed-off-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20221215152023.8387-1-marex@denx.de Signed-off-by: Michal Simek <michal.simek@amd.com>
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#
a5e56980 |
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14-Nov-2022 |
Ben Levinsky <ben.levinsky@amd.com> |
firmware: xilinx: Add RPU configuration APIs This patch adds APIs to access to configure RPU and its processor-specific memory. That is query the run-time mode of RPU as either split or lockstep as well as API to set this mode. In addition add APIs to access configuration of the RPUs' tightly coupled memory (TCM). Signed-off-by: Ben Levinsky <ben.levinsky@amd.com> Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20221114233940.2096237-6-tanmay.shah@amd.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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#
da22a04f |
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14-Nov-2022 |
Ben Levinsky <ben.levinsky@amd.com> |
firmware: xilinx: Add shutdown/wakeup APIs Add shutdown/wakeup a resource eemi operations to shutdown or bringup a resource. Note alignment of args matches convention of other fn's in this file. The reason being that the long fn name results in aligned args that otherwise go over 80 chars so shift right to avoid this Signed-off-by: Ben Levinsky <ben.levinsky@amd.com> Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20221114233940.2096237-5-tanmay.shah@amd.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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#
1e400cb9 |
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11-Oct-2022 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Add qspi firmware interface Add support for QSPI ioctl functions and enums. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Link: https://lore.kernel.org/r/20221011062040.12116-5-amit.kumar-mahapatra@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
256dea91 |
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14-Sep-2022 |
Ronak Jain <ronak.jain@xilinx.com> |
firmware: xilinx: add support for sd/gem config Add new APIs in firmware to configure SD/GEM registers. Internally it calls PM IOCTL for below SD/GEM register configuration: - SD/EMMC select - SD slot type - SD base clock - SD 8 bit support - SD fixed config - GEM SGMII Mode - GEM fixed config Signed-off-by: Ronak Jain <ronak.jain@xilinx.com> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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#
acd6510d |
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07-Jun-2022 |
Tanmay Shah <tanmay.shah@xilinx.com> |
firmware: xilinx: Add TF_A_PM_REGISTER_SGI SMC call SGI interrupt register and reset is performed by EEMI ioctl IOCTL_REGISTER_SGI. However, this is not correct use of EEMI call. SGI registration functionality does not qualify as energy management activity and so shouldn't be mapped to EEMI call. This new call will replace IOCTL_REGISTER_SGI and will be handled by TF-A specific handler in TF-A. To maintain backward compatibility for a while firmware driver will still use IOCTL_REGISTER_SGI as fallback strategy if new call fails or is not supported by TF-A. This new design also helps to make TF-A as pass through layer for EEMI calls. So we don't have to maintain PM_IOCTL as EEMI API ID in TF-A. Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20220607224253.54919-1-tanmay.shah@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>
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#
e5052bec |
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06-Apr-2022 |
Ronak Jain <ronak.jain@xilinx.com> |
firmware: xilinx: enable feature check for ZynqMP Enable the feature check if the PM_FEATURE_CHECK API returns success with the supported version for the ZynqMP. Currently, it is enabled for Versal only. Move get_set_conduit_method() at the beginning as the Linux is requesting to TF-A for the PM_FEATURE_CHECK API version for which the interface should be enabled with TF-A. Signed-off-by: Ronak Jain <ronak.jain@xilinx.com> Link: https://lore.kernel.org/r/1649242526-17493-5-git-send-email-ronak.jain@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
218f01a8 |
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06-Apr-2022 |
Ronak Jain <ronak.jain@xilinx.com> |
firmware: xilinx: always check API version for IOCTL/QUERY Currently, we are not checking feature check version for PM APIs as the support may or may not there in the firmware. To check the whether the feature check API is supported or not in the firmware, allow checking for its own version. Signed-off-by: Ronak Jain <ronak.jain@xilinx.com> Link: https://lore.kernel.org/r/1649242526-17493-4-git-send-email-ronak.jain@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
94ae7f22 |
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06-Apr-2022 |
Ronak Jain <ronak.jain@xilinx.com> |
firmware: xilinx: add new function for do_feature_check_call Add new function for sending feature check request to firmware and call it from zynqmp_pm_feature(). Signed-off-by: Ronak Jain <ronak.jain@xilinx.com> Link: https://lore.kernel.org/r/1649242526-17493-3-git-send-email-ronak.jain@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
f918cfc0 |
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06-Apr-2022 |
Ronak Jain <ronak.jain@xilinx.com> |
firmware: xilinx: add support for IOCTL and QUERY ID feature check Add support to check if IOCTL ID or QUERY ID is supported in firmware or not. Signed-off-by: Ronak Jain <ronak.jain@xilinx.com> Link: https://lore.kernel.org/r/1649242526-17493-2-git-send-email-ronak.jain@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
2c5d8f7c |
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09-Feb-2022 |
Ronak Jain <ronak.jain@xilinx.com> |
firmware: xilinx: Add sysfs support for feature config Add support for sysfs interface for runtime features configuration. The user can configure the features at runtime. First, the user need to select the config id of the supported features and then the user can configure the parameters of the feature based on the config id. Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ronak Jain <ronak.jain@xilinx.com> Link: https://lore.kernel.org/r/20220209082709.32378-4-ronak.jain@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
f1d0821b |
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09-Feb-2022 |
Ronak Jain <ronak.jain@xilinx.com> |
firmware: xilinx: Add support for runtime features Add support for runtime features by using an IOCTL call. The features can be enabled or disabled from the firmware as well as the features can be configured at runtime by querying IOCTL_SET_FEATURE_CONFIG id. Similarly, the user can get the configured values of features by querying IOCTL_GET_FEATURE_CONFIG id. Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ronak Jain <ronak.jain@xilinx.com> Link: https://lore.kernel.org/r/20220209082709.32378-2-ronak.jain@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
80f940ef |
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23-Feb-2022 |
Harsha <harsha.harsha@xilinx.com> |
firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality This patch adds zynqmp_pm_sha_hash API in the ZynqMP firmware to compute SHA3 hash of given data. Signed-off-by: Harsha <harsha.harsha@xilinx.com> Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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#
a515814e |
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29-Nov-2021 |
Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> |
firmware: xilinx: instantiate xilinx event manager driver Register simple platform device to instantiate Xilinx event manager driver. Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> Link: https://lore.kernel.org/r/20211129070216.30253-3-abhyuday.godhasara@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
f4d77525 |
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25-Oct-2021 |
Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> |
firmware: xilinx: export the feature check of zynqmp firmware Export the zynqmp_pm_feature(), so it can be use by other as to get API version available in firmware. Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> Link: https://lore.kernel.org/r/20211026042525.26612-4-abhyuday.godhasara@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
1881eadb |
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25-Oct-2021 |
Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> |
firmware: xilinx: add register notifier in zynqmp firmware In zynqmp-firmware, register notifier is not supported, add support of register notifier in zynqmp-firmware. Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> Link: https://lore.kernel.org/r/20211026042525.26612-2-abhyuday.godhasara@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
168e05c1 |
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06-Oct-2021 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: check return value of zynqmp_pm_get_api_version() Currently return value of zynqmp_pm_get_api_version() is ignored. Because of that, API version is checked in case of error also. So add check for return value of zynqmp_pm_get_api_version(). Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/1633509835-31949-1-git-send-email-rajan.vaja@xilinx.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
23c64d76 |
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22-Sep-2021 |
Piyush Mehta <piyush.mehta@xilinx.com> |
firmware: zynqmp: Add MMIO read and write support for PS_MODE pin Add Xilinx ZynqMP firmware MMIO APIs support to set and get PS_MODE pins value and status. These APIs create an interface path between mode pin controller driver and low-level API to access GPIO pins. Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
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#
74e78adc |
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24-Sep-2021 |
Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> |
firmware: xilinx: Add OSPI Mux selection support Add OSPI Mux selection API support to select the AXI interface to OSPI. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/1632478031-12242-2-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
2a8faf8d |
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05-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
firmware: xilinx: Fix incorrect names in kernel-doc There are some c&p issues reported by kernel-doc as: drivers/firmware/xilinx/zynqmp.c:676: warning: expecting prototype for zynqmp_pm_write_ggs(). Prototype was for zynqmp_pm_read_ggs() instead drivers/firmware/xilinx/zynqmp.c:710: warning: expecting prototype for zynqmp_pm_write_pggs(). Prototype was for zynqmp_pm_read_pggs() instead drivers/firmware/xilinx/zynqmp.c:1023: warning: expecting prototype for zynqmp_pm_aes(). Prototype was for zynqmp_pm_aes_engine() instead Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/a81edd4fc6cff4bd7e4984fceda941b9e9ab01bf.1628245954.git.michal.simek@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
2b9fc773 |
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26-Jun-2021 |
Nava kishore Manne <nava.manne@xilinx.com> |
drivers: firmware: Add PDI load API support This patch adds load PDI API support to enable full/partial PDI loading from linux. Programmable Device Image (PDI) is combination of headers, images and bitstream files to be loaded. Reviewed-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Link: https://lore.kernel.org/r/20210626155248.5004-2-nava.manne@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
fa989ae7 |
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22-Apr-2021 |
Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> |
firmware: xilinx: Add pinctrl support Adding pinctrl support to query platform specific information (pins) from firmware. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/1619080202-31924-2-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
f1f21bec |
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07-Feb-2021 |
Tejas Patel <tejas.patel@xilinx.com> |
firmware: xilinx: Fix dereferencing freed memory Fix smatch warning: drivers/firmware/xilinx/zynqmp.c:1288 zynqmp_firmware_remove() error: dereferencing freed memory 'feature_data' Use hash_for_each_safe for safe removal of hash entry. Fixes: acfdd18591ea ("firmware: xilinx: Use hash-table for api feature check") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Link: https://lore.kernel.org/r/1612765883-22018-1-git-send-email-rajan.vaja@xilinx.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
69fe24d1 |
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01-Dec-2020 |
Zou Wei <zou_wei@huawei.com> |
firmware: xilinx: Mark pm_api_features_map with static keyword Fix the following sparse warning: drivers/firmware/xilinx/zynqmp.c:32:1: warning: symbol 'pm_api_features_map' was not declared. Should it be static? Signed-off-by: Zou Wei <zou_wei@huawei.com> Link: https://lore.kernel.org/r/1606823513-121578-1-git-send-email-zou_wei@huawei.com Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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#
332bee16 |
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01-Dec-2020 |
Michal Simek <michal.simek@xilinx.com> |
firmware: xilinx: Fix kernel-doc warnings kernel-doc is reporting some style issues. The patch is fixing them. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/e606233d15bfdc594535dd34eb85472b42f61830.1606832997.git.michal.simek@xilinx.com
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#
acfdd185 |
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23-Nov-2020 |
Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com> |
firmware: xilinx: Use hash-table for api feature check Currently array of fix length PM_API_MAX is used to cache the pm_api version (valid or invalid). However ATF based PM APIs values are much higher then PM_API_MAX. So to include ATF based PM APIs also, use hash-table to store the pm_api version status. Signed-off-by: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com> Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ravi Patel <ravi.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Michal Simek <michal.simek@xilinx.com> Fixes: f3217d6f2f7a ("firmware: xilinx: fix out-of-bounds access") Cc: stable <stable@vger.kernel.org> Link: https://lore.kernel.org/r/1606197161-25976-1-git-send-email-rajan.vaja@xilinx.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
f4426311 |
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16-Nov-2020 |
Manish Narani <manish.narani@xilinx.com> |
firmware: xilinx: Fix SD DLL node reset issue Fix the SD DLL node reset issue where incorrect node is being referenced instead of SD DLL node. Fixes: 426c8d85df7a ("firmware: xilinx: Use APIs instead of IOCTLs") Signed-off-by: Manish Narani <manish.narani@xilinx.com> Link: https://lore.kernel.org/r/1605534744-15649-1-git-send-email-manish.narani@xilinx.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
f3217d6f |
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26-Oct-2020 |
Arnd Bergmann <arnd@arndb.de> |
firmware: xilinx: fix out-of-bounds access The zynqmp_pm_set_suspend_mode() and zynqmp_pm_get_trustzone_version() functions pass values as api_id into zynqmp_pm_invoke_fn that are beyond PM_API_MAX, resulting in an out-of-bounds access: drivers/firmware/xilinx/zynqmp.c: In function 'zynqmp_pm_set_suspend_mode': drivers/firmware/xilinx/zynqmp.c:150:24: warning: array subscript 2562 is above array bounds of 'u32[64]' {aka 'unsigned int[64]'} [-Warray-bounds] 150 | if (zynqmp_pm_features[api_id] != PM_FEATURE_UNCHECKED) | ~~~~~~~~~~~~~~~~~~^~~~~~~~ drivers/firmware/xilinx/zynqmp.c:28:12: note: while referencing 'zynqmp_pm_features' 28 | static u32 zynqmp_pm_features[PM_API_MAX]; | ^~~~~~~~~~~~~~~~~~ Replace the resulting undefined behavior with an error return. This may break some things that happen to work at the moment but seems better than randomly overwriting kernel data. I assume we need additional fixes for the two functions that now return an error. Fixes: 76582671eb5d ("firmware: xilinx: Add Zynqmp firmware driver") Fixes: e178df31cf41 ("firmware: xilinx: Implement ZynqMP power management APIs") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20201026155449.3703142-1-arnd@kernel.org Cc: stable <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
65f0539b |
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10-May-2020 |
Christophe JAILLET <christophe.jaillet@wanadoo.fr> |
firmware: xilinx: Fix an error handling path in 'zynqmp_firmware_probe()' If 'mfd_add_devices()' fails, we must undo 'zynqmp_pm_api_debugfs_init()' otherwise some debugfs directory and files will be left. Just move the call to 'zynqmp_pm_api_debugfs_init()' a few lines below to fix the issue. Fixes: e23d9c6d0d49 ("drivers: soc: xilinx: Add ZynqMP power domain driver") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/20200510130357.233364-1-christophe.jaillet@wanadoo.fr Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
56a9a806 |
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01-May-2020 |
Nathan Chancellor <nathan@kernel.org> |
firmware: xilinx: Export zynqmp_pm_fpga_{get_status,load} When building arm64 allmodconfig: ERROR: modpost: "zynqmp_pm_fpga_load" [drivers/fpga/zynqmp-fpga.ko] undefined! ERROR: modpost: "zynqmp_pm_fpga_get_status" [drivers/fpga/zynqmp-fpga.ko] undefined! These functions were added to drivers/fpga/zynqmp-fpga.c but not exported so the module build breaks. Export them so that they can be used in modules properly. Fixes: 4db8180ffe7c ("firmware: xilinx: Remove eemi ops for fpga related APIs") Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Reported-by: "kernelci.org bot" <bot@kernelci.org> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20200502025958.2714249-1-natechancellor@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
a2cc220a |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Add sysfs and API to set boot health status Add sysfs interface to set boot health status from user space. Add API used by this interface to communicate with firmware. If PMUFW is compiled with CHECK_HEALTHY_BOOT, it will check the healthy bit on FPD WDT expiration. If healthy bit is set by a user application running in Linux, PMUFW will do APU only restart. If healthy bit is not set during FPD WDT expiration, PMUFW will do system restart. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-26-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
b3ae24c4 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Add sysfs to set shutdown scope The Linux shutdown functionality implemented via PSCI system_off does not include an option to set a scope, i.e. which parts of the system to shut down. This patch creates sysfs that allows to set the shutdown scope for the next shutdown request. When the next shutdown is performed, the platform specific portion of PSCI-system_off can use the chosen shutdown scope. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-25-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
fdd2ed88 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Add system shutdown API interface Add system shutdown API interface which asks firmware to perform system shutdown/restart. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-24-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
ae5c961d |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Add sysfs interface Add firmware-ggs sysfs interface which provides read/write interface to global storage registers. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-23-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
4f680b72 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Add APIs to read/write GGS/PGGS registers Add APIs to read/write PGGS and GGS registers. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-22-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
4db8180f |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for fpga related APIs Use direct function call instead of using eemi ops for fpga related APIs. Also remove eemi ops structure. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-21-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
bc86f9c5 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for aes engine Use direct function call for aes engine instead of using eemi ops. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-20-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
cbbbda71 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for set_requirement Use direct function call instead of using eemi ops for set_requirement. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-19-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
07fb1a46 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for release_node Use direct function call instead of using eemi ops for release_node. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-18-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
bf8b27ed |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for request_node Use direct function call instead of using eemi ops for request_node. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-17-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
951d0a97 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for set_suspend_mode Use direct function call instead of eemi ops for set_suspend_mode. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-16-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
9474da95 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for init_finalize Use direct function call instead of eemi ops for init_finalize. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-15-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
1b413581 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for reset_get_status Use direct function call instead of using eemi ops for reset_get_status. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-14-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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cf23ec35 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for reset_assert Use direct function call instead of using eemi ops for reset_assert. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-13-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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426c8d85 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Use APIs instead of IOCTLs Remove IOCTL API and use individual APIs for better readability. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-12-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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70c0d364 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for clock set/get parent Use direct function call instead of eemi ops for clock set/get parent. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-11-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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7a1e1062 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for clock set/get rate Use direct function call instead of eemi ops for clock set/get rate. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-10-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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0667a8d1 |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for clock_getdivider Use direct function call instead of using eemi ops for clock_getdivider. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-9-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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fc9fb8fb |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for clock_setdivider Use direct function call instead of using eemi ops for clock_setdivider. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-8-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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5e76731d |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for clock_getstate Use direct function call instead of eemi ops for clock_getstate. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-7-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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f5ccd54b |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for clock_disable Use direct function call for clock_disable instead using of eemi ops. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-6-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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3637e84c |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for clock_enable Use direct function call for clock_enable instead of eemi ops. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-5-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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6366c1ba |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for query_data Use direct function call for query_data instead of using eemi ops. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-4-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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21cd93ba |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for get_chipid Use direct function call instead of eemi ops for get_chipid. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-3-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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b9b3a8be |
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24-Apr-2020 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Remove eemi ops for get_api_version Use direct function calls instead of using eemi ops. So remove eemi ops for get_api_version and use direct function call. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-2-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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0dc64c2b |
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21-Jan-2020 |
Manish Narani <manish.narani@xilinx.com> |
firmware: xilinx: Add DLL reset support SD DLL resets are required for some of the operations on ZynqMP platform. Add DLL reset support in ZynqMP firmware driver for SD DLL reset. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/1579602095-30060-3-git-send-email-manish.narani@xilinx.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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93660d83 |
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21-Jan-2020 |
Manish Narani <manish.narani@xilinx.com> |
firmware: xilinx: Add ZynqMP Tap Delay setup ioctl to the valid list The Tap Delay setup ioctl was not added to valid list due to which it may fail to set Tap Delays for SD. This patch fixes the same. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/1579602095-30060-2-git-send-email-manish.narani@xilinx.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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057a0fb6 |
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17-Feb-2020 |
Kalyani Akula <kalyani.akula@xilinx.com> |
firmware: xilinx: Add ZynqMP aes API for AES functionality Add ZynqMP firmware AES API to perform encryption/decryption of given data. Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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df2a4d94 |
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04-Dec-2019 |
Rajan Vaja <rajan.vaja@xilinx.com> |
clk: zynqmp: Warn user if clock user are more than allowed Warn user if clock is used by more than allowed devices. This check is done by firmware and returns respective error code. Upon receiving error code for excessive user, warn user for the same. This change is done to restrict VPLL use count. It is assumed that VPLL is used by one user only. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Link: https://lkml.kernel.org/r/1575527759-26452-4-git-send-email-rajan.vaja@xilinx.com Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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461011b1 |
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12-Nov-2019 |
Ravi Patel <ravi.patel@xilinx.com> |
drivers: firmware: xilinx: Add support for feature check Query for corresponding feature before calling EEMI API from the driver. Signed-off-by: Ravi Patel <ravi.patel@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
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af3f1afa |
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07-Oct-2019 |
Jolly Shah <jolly.shah@xilinx.com> |
firmware: xilinx: Add support for versal soc Versal is xilinx's next generation soc. This patch adds driver support required to be compatible with versal device. Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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e840decc |
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14-Apr-2019 |
Nava kishore Manne <nava.manne@xilinx.com> |
firmware: xilinx: Add fpga API's This Patch Adds fpga API's to support the Bitstream loading by using firmware interface. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Reviewed-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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3d031378 |
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04-Mar-2019 |
Rajan Vaja <rajan.vaja@xilinx.com> |
drivers: Defer probe if firmware is not ready Driver needs ZynqMP firmware interface to call EEMI APIs. In case firmware is not ready, dependent drivers should wait until the firmware is ready. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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e23d9c6d |
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01-Feb-2019 |
Jolly Shah <jolly.shah@xilinx.com> |
drivers: soc: xilinx: Add ZynqMP power domain driver The zynqmp-genpd driver communicates the usage requirements for logical power domains / devices to the platform FW. FW is responsible for choosing appropriate power states, taking Linux' usage information into account. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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c1986ac3 |
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01-Feb-2019 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Add APIs to control node status/power Add Xilinx ZynqMP firmware APIs to control node status and power. These APIs allows turning on/off power domain and setting capabilities of devices present in power domain. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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e178df31 |
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29-Jan-2019 |
Jolly Shah <jolly.shah@xilinx.com> |
firmware: xilinx: Implement ZynqMP power management APIs Add Xilinx ZynqMP firmware APIs to set suspend mode and inform firmware that master has initialized its own power management. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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fe6f42cf |
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06-Feb-2019 |
Nava kishore Manne <nava.manne@xilinx.com> |
firmware: xilinx: Add zynqmp_pm_get_chipid() API This patch adds a new API to provide access to the hardware related data like soc revision, IDCODE... etc. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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bc3843d4 |
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25-Jan-2019 |
Nava kishore Manne <nava.manne@xilinx.com> |
firmware: xilinx: Add reset API's This Patch Adds reset API's to support release, assert and status functionalities by using firmware interface. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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3b0296b8 |
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08-Oct-2018 |
Rajan Vaja <rajan.vaja@xilinx.com> |
firmware: xilinx: Add zynqmp IOCTL API for device control Add ZynqMP firmware IOCTL API to control and configure devices like PLLs, SD, Gem, etc. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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b3217252 |
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12-Sep-2018 |
Rajan Vaja <rajanv@xilinx.com> |
firmware: xilinx: Add debugfs interface Firmware-debug provides debugfs interface to all APIs. Debugfs can be used to call firmware APIs with required parameters. Usage: * Calling firmware API through debugfs: # echo "<api-name> <arg1> .. <argn>" > /sys/.../zynqmp-firmware/pm * Read output of last called firmware API: # cat /sys/.../zynqmp-firmware/pm Refer ug1200 for more information on these APIs: * https://www.xilinx.com/support/documentation/user_guides/ug1200-eemi-api.pdf Add basic debugfs file to get API version. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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f9627312 |
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12-Sep-2018 |
Rajan Vaja <rajanv@xilinx.com> |
firmware: xilinx: Add clock APIs Add clock APIs to control clocks through firmware interface. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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59ecdd77 |
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12-Sep-2018 |
Rajan Vaja <rajanv@xilinx.com> |
firmware: xilinx: Add query data API Add ZynqMP firmware query data API to query platform specific information(clocks, pins) from firmware. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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76582671 |
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12-Sep-2018 |
Rajan Vaja <rajanv@xilinx.com> |
firmware: xilinx: Add Zynqmp firmware driver This patch is adding communication layer with firmware. Firmware driver provides an interface to firmware APIs. Interface APIs can be used by any driver to communicate to PMUFW(Platform Management Unit). All requests go through ATF. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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