kernel/arm/paging: implement Modified Flag

* Introduce SWDBM flag similarly to the arm64 port
* Reuse TEX[2] for SWDBM flag which should be availble
to be used by the operating system if TEX remap
is enabled.
* Introduce SetAndClearPageTableEntryFlags for updating
accessed and modified flags atomically
* Startup sequence is handled similarly to accessed flag, i.e.
set Modified flag in initially mapped pages in bootloader and early map.
* Once the kernel initialization has progressed enough,
pages are mapped as read-only and modified flag handling is done
in the page fault handler.

Change-Id: I8f761e2c6325d1b91481abd569d5e8befded0761
Reviewed-on: https://review.haiku-os.org/c/haiku/+/6518
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Adrien Destugues <pulkomandy@pulkomandy.tk>

kernel/arm/paging: use simplified permission model

Change-Id: Ie0ed357ee9ca5bee4c10c6cbf74eaba77acdd179
Reviewed-on: https://review.haiku-os.org/c/haiku/+/6435
Reviewed-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: David Karoly <karolyd577@gmail.com>

kernel/arm: set PXN for user memory

* set PXN for all page tables below KERNEL_BASE
* also set PXN for physical page mapper

PXN, Privileged execute-never

When the PXN bit is 1, a Permission fault is generated if the processor
is executing at PL1 and attempts to execute an instruction fetched from
the corresponding memory region.

Change-Id: I3056cbed151004ac9edfbc81ebeada328aeb603c
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5607
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: waddlesplash <waddlesplash@gmail.com>

kernel/arm: implement memory attributes

Set AP[2:0] and XN flags based on page attributes.
PXN is not implemented as it seems to be available only
in L1 descriptors on ARMv7.

Set TEX, B, C flags based on memoryType:
* B_MTR_UC is mapped to Strongly Ordered (TEX=0, B=0, C=0)
* B_MTR_WC is mapped to Shareable Device Memory (TEX=0, B=1, C=0)
* B_MTR_WT is mapped to Outer and Inner Write-Through, no Write-Allocate (TEX=0, B=0, C=1)
* B_MTR_WB is mapped to Outer and Inner Write-Back, no Write-Allocate (TEx=0, B=1, C=1)
* B_MTR_WP has no direct equivalent on the ARM so it's mapped as B_MTR_WB
* default is Write-Back

Implement ARMPagingMethod32Bit::AttributesToPageTableEntryFlags()
for mapping from page attributes to AP[2:0] and XN flags.

Implement ARMPagingMethod32Bit::PageTableEntryFlagsToAttributes()
for the reverse mapping used in Query() and QueryInterrupt()
i.e. recover page attributes from AP[2:0] and XN flags.

Implement ARMPagingMethod32Bit::MemoryTypeToPageTableEntryFlags()
fr mapping from memoryType to TEX, B, C flags.

Implement ARMVMTranslationMap32Bit::Protect() which used to be commented out.

Accessed and modified flags are not implemented yet, so no such
flags are returned from Query() and QueryInterrupt().

Also because of this, we just invalidate TLB on any call to Protect()
without checking whether the page has been accessed.

Change-Id: I027af5c02bd6218d9f92a58044aeb26373e1956b
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5236
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>
Reviewed-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>

arm: enable enforcing memory access permissions

Bootloader:
* set permissions to kernel read/write, no user access
for initially mapped memory areas
* set permissions to kernel read/write, no execute,
no user access for UART

Kernel:
* physical memory mapper uses kernel read/write mapping
with no-execute bit enabled
* all other pages are mapped as read/write/execute for
kernel and user
* proper access permissions and memory types to be
implemented later

Enforce memory access permissions by setting DACR to
client mode for domain #0, no access for other domains.

see ARM Architecture Reference Manual, section B3.7 Memory access control
and in particular the following subsections:
B3.7.1 Access permissions
B3.7.2 Execute-never restrictions on instruction fetching
B3.7.3 Domains, Short-descriptor format only

Change-Id: I8127b4c72dc516d013cb9751d80d6f3a9ec835e6
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5233
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

Use the existing ARM MMU definitions and remove duplicates.

Header cleanup, rename macros for more consistency.

MMU: Clean up arm L1 MMU types

* Include map for each page table type
* Reduce MMU_TYPE define name length

* Add page directory/table helper macros.



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39137 a95241bf-73f2-0310-859d-f6bbb57e9c96

Patch by "notzed" (ticket #5368) (modified): Add bootloader support for BeagleBoard.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37319 a95241bf-73f2-0310-859d-f6bbb57e9c96

[ARM]
Move ARM MMU definitions to a separate header file.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32332 a95241bf-73f2-0310-859d-f6bbb57e9c96

Use the existing ARM MMU definitions and remove duplicates.

Header cleanup, rename macros for more consistency.

MMU: Clean up arm L1 MMU types

* Include map for each page table type
* Reduce MMU_TYPE define name length

* Add page directory/table helper macros.



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39137 a95241bf-73f2-0310-859d-f6bbb57e9c96

Patch by "notzed" (ticket #5368) (modified): Add bootloader support for BeagleBoard.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37319 a95241bf-73f2-0310-859d-f6bbb57e9c96

[ARM]
Move ARM MMU definitions to a separate header file.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32332 a95241bf-73f2-0310-859d-f6bbb57e9c96