Revert r330897:

This was intended to be a non-functional change. It wasn't. The commit
message was thus wrong. In addition it broke arm, and merged crypto
related code.

Revert with prejudice.

This revert skips files touched in r316370 since that commit was since
MFCed. This revert also skips files that require $FreeBSD$ property
changes.

Thank you to those who helped me get out of this mess including but not
limited to gonzo, kevans, rgrimes.

Requested by: gjb (re)

Partial merge of the SPDX changes

These changes are incomplete but are making it difficult
to determine what other changes can/should be merged.

No objections from: pfg

Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle.
Prune svn:mergeinfo from the new branch, as nothing has been merged
here.

Additional commits post-branch will follow.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Avoid using the bounce buffer when the source or destination buffer is
32-bits aligned. Merge the two bounce buffers into a single one. Some
rough tests showed that the DWC OTG throughput on RPI2 increased by
10% after this patch.

MFC after: 1 week

Fixes for HIGH speed ISOCHRONOUS traffic. HS ISOCHRONOUS traffic at
intervals less than 250us was not handled properly. Add support for
high-bandwidth ISOCHRONOUS packets. USB webcams, USB audio and USB DVB
devices are expected to work better. High-bandwidth INTERRUPT
endpoints is not yet supported.

MFC after: 2 weeks

Optimise the DWC OTG host mode driver's receive path:

Remove NAKing limit and pause IN and OUT transactions for 125us in
case of NAK response for BULK and CONTROL endpoints. This gets the
receive latency down and improves USB network throughput at the cost
of some CPU usage.

MFC after: 1 month

Optimise the DWC OTG host mode driver's transmit path:

1) Use the TX FIFO empty interrupts to poll the transmit FIFO usage,
instead of using own software counters and waiting for SOF
interrupts. Assume that enough FIFO space is available to execute one
USB OUT transfer of any kind when the TX FIFO is empty.

2) Use the host channel halted event to asynchronously wait for host
channels to be disabled instead of waiting for SOF interrupts. This
results in less turnaround time for re-using host channels and at the
same time increases the performance.

The network transmit performance measured by "iperf" for the "RPi-B v1
2011/12" board, increased from 45MBit/s to 65Mbit/s after applying the
changes above.

No regressions seen using:
- High Speed (BULK, CONTROL, INTERRUPT)
- Full Speed (All transfer types)
- Low Speed (Control and Interrupt)

MFC after: 1 month
Submitted by: Daisuke Aoyama <aoyama@peach.ne.jp>

Make the FIFO configuration a bit more flexible for the DWC OTG in
device side mode.

Some further DWC OTG improvements for full speed and low speed devices:
- Revert r265427. It appears we are halting the DWC OTG host
controller schedule if we process events only at every SOF. When doing
split transactions we rely on that events are processed quickly and
waiting too long might cause data loss.
- We are not always able to meet the timing requirements of interrupt
endpoint split transactions. Switch from INTERRUPT to CONTROL endpoint
type for interrupt endpoint events until further, hence CONTROL
endpoint events are more relaxed, reducing the chance of data
loss. See comment in code for more in-depth explanation.
- Simplify TT scheduling.

MFC after: 3 days

Try to fix DWC OTG regression issues with full and low speed devices:
- Remove double buffering interrupt and isochronous traffic via the
transaction translator. It can be avoided because the DWC OTG will
always delay the start split transactions for interrupt and
isochronous traffic, but will not delay the complete split
transactions, if we set the odd frame bit correctly.
- Need to check the transfer cache field in the device done function
to be sure all allocated channels are freed and not the transfer first
one. This seems to resolve the control endpoint transfer type quirk
which is now removed.
- Make sure any received data upon TX is dumped else RX path will
stop.
- Transmit isochronous data before receiving isochronous data as a
means to optimise the TT schedule.
- Implement a simple TT bandwidth scheduler.
- Cleanup use of old "td->error" variable.
- On interrupt IN traffic via the transaction translator we simply
ignore missed transfer opportunities and silently retry the
transaction upon next available time slot.

MFC after: 3 days

- Add softc pointer argument to FIFO functions as an optimisation.
- Implement support for interrupt filters in the DWC OTG driver, to
reduce the amount of CPU task switching when only feeding the FIFOs.
- Add common spinlock to the USB bus structure.

MFC after: 2 weeks

Optimise host mode data roundtrip time. When BULK data is submitted to
the main processing queue, clear the NAK counter for any associated
BULK or CONTROL transfers and poll the endpoint(s) for 1 millisecond
at 125us rate interval, before going into slow, 10ms, NAK polling mode
again. This has the effect that typical ping-ping protocols respond
quicker when initiated from the USB host.

MFC after: 2 weeks

Optimise host channel disabling:
- For non-periodic traffic we only need to wait two SOFs before
disabling the channel.
- Make sure we release the TX FIFO tracking level after the host
channel is disabled.
- Make sure the host channel state gets reset/disabled initially.
- Two minor code style changes.

MFC after: 2 weeks

Multiple DWC OTG host mode related fixes and improvements:

- Rework how we allocate and free USB host channels, so that we only
allocate a channel if there is a real packet going out on the USB
cable.

- Use BULK type for control data and status, due to instabilities in
the HW it appears.

- Split FIFO TX levels into one for the periodic FIFO and one for the
non-periodic FIFO.

- Use correct HFNUM mask when scheduling host transactions. The HFNUM
register does not count the full 16-bit range.

- Correct START/COMPLETION slot for TT transactions. For INTERRUPT and
ISOCHRONOUS type transactions the hardware always respects the ODDFRM
bit, which means we need to allocate multiple host channels when
processing such endpoints, to not miss any so-called complete split
opportunities.

- When doing ISOCHRONOUS OUT transfers through a TT send all data
payload in a single ALL-burst. This deacreases the likelyhood for
isochronous data underruns.

- Fixed unbalanced unlock in case of "dwc_otg_init_fifo()" failure.

- Increase interrupt priority.

MFC after: 2 weeks

Improve DWC OTG USB host side support for isochronous FULL and HIGH
speed data traffic going directly to a USB device or through a
so-called USB transaction translator.

Add checks that we are not overusing the TX FIFO.

MFC after: 2 weeks

Fix LOW and FULL speed USB INTERRUPT endpoint support for the
DWC OTG driver. Fix a hang issue when using LOW and FULL speed
BULK traffic. Make sure we don't ask for data in the last
microframe. This allows using devices like USB mice and USB
keyboards connected to the RPI-B.

Suggested by: gonzo @

Make sure we record NAK tokens in the TD structure for IN direction.
Improve host channel disabling. Wait two times 125us for channel to be
disabled. The DWC OTG doesn't like when channels are re-used too early.

Make sure the DWC OTG host mode channels are given enough time to disable.

DWC OTG host mode improvements. Add support for the 3-strikes and you are
gone rule. Optimise use of channels so that when a channel
is not ready another channel is used. Instead of using the SOF interrupt
use the system timer to drive the host statemachine. This might
give lower throughput and higher latency, but reduces the CPU usage
significantly. The DWC OTG host mode support should not be considered
for serious USB host controller applications. Some problems are still
seen with LOW speed USB devices.

DWC OTG improvements. Implement full support for SPLIT transactions, in other
words FULL/LOW speed devices through HIGH speed HUBs. Improve support for
suspend and resume in host mode.

Fix TX FIFO sizes. Correct FIFO handling in Host mode.

Reduce DWC OTG polling rate by using the SOF interrupt.

Fix missing parts of DWC OTG host mode support. The host mode support
of the DWC OTG is very simple in PIO mode, and we need to re-transmit
data when NAK is received among other things. We probably will need
to implement some kind of rate limitation on the NAK-ing.

Cleanup interrupt handling in Host Mode.

Add support for host mode to the DWC OTG controller driver.
The DWC OTG host mode support should still be considered
experimental. Isochronous support for DWC OTG is not
fully implemented. Some code added derives from
Aleksandr Rybalko's dotg.c driver.

Preparations for adding USB HOST mode to the DWC OTG driver.
Merge register file with external one and put all register
definitions in a separate file.

Submitted by: ray @

Fix for DWC OTG interrupt register programming.
Fix a compiler warning.
Add missing header file.

MFC after: 1 week

Add support for the DesignWare USB 2.0 OTG controller chipset.
Currently the code is not built by any modules. That will
be fixed later. The Atmel ARM bus interface file part of this
commit is just for sake of example. All registers and bits are
declared like macros and not C-structures like in official
Synopsis header files. This driver mostly origins from the
musb_otg.c driver in FreeBSD except that the chip specific
programming has been replaced by the one for DWC 2.0 USB OTG.
Some parts related to system suspend and resume have been left
like empty functions for the future. USB suspend and resume is
fully supported.