Copy stable/10@r272459 to releng/10.1 as part of
the 10.1-RELEASE process.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

MFC r257170, r257171, r257172, r257240, r257278, r257279, r257280, r257281,
r257282, r257332

Wait for DesignWare UART transfers completion before accessing line control

Enable UART busy detection handling for Armada XP - based board

Enable SATA interface on Armada XP
Run mvs SATA driver on Armada XP instead of old mv_sata

Retire arm_remap_nocache() and the data and constants associated with it.

Remove hard-coded mappings related to Armada XP support

Fix-up DTB for Armada XP registers' base according to the actual settings

Change Armada XP kernel load address to the u-boot's end address

Remove not working and deprecated PJ4Bv6 support

Switch off explicit broadcasting of the TLB flush operations for PJ4B CPU

Add missing ARMv6 CPU functions to ARM Makefile

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Add support for A10 uart.
A10 uart is derived from Synopsys DesignWare uart and requires
to read Uart Status Register when IIR_BUSY has detected.
Also this change includes FDT check, where it checks device
specific properties defined in dts and sets the busy_detect variable.
broken_txfifo is also needed to be set in order to make it work for
A10 uart case.

Reviewed by: marcel@
Approved by: gonzo@

Merge from projects/mips to head by hand:

Defintions for cavium uart (do they belong here?)

add %b formats for various registers

unifdef PC98

Allow uart(4)'s ns8250 driver to work with devices whose regshift is > 0.

- Rename REG_DL to REG_DLL and REG_DLH.
- Always treat DLL and DLH as two separate 8-bit registers instead of one
16-bit register.

Additionally, remove the probe for the high 4 bits of IER being 0 and don't
assume we can always read/write 0 to/from those bits.

These changes allow uart(4) to drive the UARTs on the Intel XScale PXA255.

Reviewed by: marcel

o Remove the com_thr, com_rhr, com_isr and com_lctl defines. They are
not used and aliases for other defines.
o Add REG_DATA as an alias for com_data. Likewise for other register
defines.
o Add LCR_SBREAK and make CFCR_SBREAK an alias for it. Likewise for
the other LCR register bits that are known with the CFCR prefix.
o Add MCR_IE and make MCR_IENABLE an alias for it.
o Add LSR_TEMT and make LSR_TSRE an alias for it.
o Add LSR_THRE and make LSR_TXRDY as alias for it.
o Add FCR_ENABLE and make FIFO_ENABLE as alias for it. Likewise for
the other FCR register bits that are known with the FIFO prefix.
o Add EFR_CTS and make EFR_AUTOCTS an alias for it.
o Add EFR_RTS and make EFR_AUTORTS an alias for it.

This is a first step in cleaning up the definitions in this file.

Remove advertising clause from University of California Regent's
license, per letter dated July 22, 1999 and email from Peter Wemm,
Alan Cox and Robert Watson.

Approved by: core, peter, alc, rwatson

Added definitions of most of the interesting 16950 register numbers
and some of their bits (i.e., fifo trigger levels, frequency multipliers
and divisors, and bits to select the registers for these). This
attempts to completely describe the 16950's complicated register selects
for 16950-specific registers only.

Added definitions for some 16650 features (mostly misfeatures). This
completes defining the 16650 register numbers but not all of their bits.

Fixed a minor error in the description of the EFR and a major error in
the description of the data latch registers (they were described as
readonly).

Added some better and worse aliases for standard registers, mostly taken
from the 16950 data sheet. Define deprecated aliases in terms of the
preferred one.

Don't define com_efr in terms of com_fifo. It is unrelated (in a
different bank).

Sorted register numbers together with the correspoding register bits.
Merged comments to match (put them at the right of the #defines instead
of duplicating them).

Sorted the resulting sections on UART type and register bank. Added a
comment for each bank.

Moved the definitions of the bits in the ns*50 registers from sioreg.h
to ns16550.h. The organization of these files was sort of backwards.
The bits in the registers have no driver or bus dependencies but they
but the offsets of the registers in bus space are very bus-dependent.
However, it does no harm to keep the definitions of the register offsets
in ns16550.h provided they are thought of as internal ns*50 offsets.

Move the com_scr register address definition over with the other seven.

Approved by: bde

Removed unneeded pc98 code (merged from i386/isa/ic/ns16550.h).

Move out the files from src/sys/isa/ic/ to src/sys/dev/ic/, so they
can be made userland-visible as <dev/ic/...>. Also, those files are
not supposed to contain any bus-specific details at all, so placing
them under .../isa/ has been a misnomer from the beginning.

The files in src/sys/dev/ic/ have been repo-copied from their old
location (this commit is a forced null commit there to record this
message).

$Id$ -> $FreeBSD$

Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not
ready for it yet.

Make the long-awaited change from $Id$ to $FreeBSD$

This will make a number of things easier in the future, as well as (finally!)
avoiding the Id-smashing problem which has plagued developers for so long.

Boy, I'm glad we're not using sup anymore. This update would have been
insane otherwise.

Another round of merge/update.

(1) Add PC98 support to apm_bios.h and ns16550.h, remove pc98/pc98/ic
(2) Move PC98 specific code out of cpufunc.h (to pc98.h)
(3) Let the boot subtrees look more alike

Submitted by: The FreeBSD(98) Development Team
<freebsd98-hackers@jp.freebsd.org>

Removed all patch kit headers, sccsid and rcsid strings, put $Id$ in, some
minor cleanup. Added $Id$ to files that did not have any version info, etc

This commit was generated by cvs2svn to compensate for changes in r4,
which included commits to RCS files with non-trunk default branches.

Initial import, 0.1 + pk 0.2.4-B1